diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2012-01-19 12:56:50 -0800 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2012-01-19 12:56:50 -0800 |
| commit | 282f445a779ed76fca9884fe377bf56a3088b208 (patch) | |
| tree | d9abcf526baee0100672851e0a8894c19e762a39 /arch/m68k/mm/cache.c | |
| parent | 68f30fbee19cc67849b9fa8e153ede70758afe81 (diff) | |
| parent | 90a4c0f51e8e44111a926be6f4c87af3938a79c3 (diff) | |
Merge remote-tracking branch 'linus/master' into x86/urgent
Diffstat (limited to 'arch/m68k/mm/cache.c')
| -rw-r--r-- | arch/m68k/mm/cache.c | 24 |
1 files changed, 21 insertions, 3 deletions
diff --git a/arch/m68k/mm/cache.c b/arch/m68k/mm/cache.c index 5437fff5fe0..95d0bf66e2e 100644 --- a/arch/m68k/mm/cache.c +++ b/arch/m68k/mm/cache.c @@ -74,8 +74,16 @@ static unsigned long virt_to_phys_slow(unsigned long vaddr) /* RZ: use cpush %bc instead of cpush %dc, cinv %ic */ void flush_icache_range(unsigned long address, unsigned long endaddr) { - - if (CPU_IS_040_OR_060) { + if (CPU_IS_COLDFIRE) { + unsigned long start, end; + start = address & ICACHE_SET_MASK; + end = endaddr & ICACHE_SET_MASK; + if (start > end) { + flush_cf_icache(0, end); + end = ICACHE_MAX_ADDR; + } + flush_cf_icache(start, end); + } else if (CPU_IS_040_OR_060) { address &= PAGE_MASK; do { @@ -100,7 +108,17 @@ EXPORT_SYMBOL(flush_icache_range); void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, unsigned long addr, int len) { - if (CPU_IS_040_OR_060) { + if (CPU_IS_COLDFIRE) { + unsigned long start, end; + start = addr & ICACHE_SET_MASK; + end = (addr + len) & ICACHE_SET_MASK; + if (start > end) { + flush_cf_icache(0, end); + end = ICACHE_MAX_ADDR; + } + flush_cf_icache(start, end); + + } else if (CPU_IS_040_OR_060) { asm volatile ("nop\n\t" ".chip 68040\n\t" "cpushp %%bc,(%0)\n\t" |