diff options
| author | Greg Ungerer <gerg@uclinux.org> | 2011-12-24 12:38:40 +1000 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2012-03-05 09:43:09 +1000 |
| commit | 2424f549020b6f87ea3b6e89fd7bd26ddf1f717b (patch) | |
| tree | c1adc43406e79ad5bf2d0e412852a748eca6f956 /arch/m68k/include | |
| parent | 36d175a4b249235927d75fb681484bd97cc4ea41 (diff) | |
m68knommu: make 5249 QSPI platform addressing consistent
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 5249 QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include')
| -rw-r--r-- | arch/m68k/include/asm/m5249sim.h | 11 | ||||
| -rw-r--r-- | arch/m68k/include/asm/mcfqspi.h | 2 |
2 files changed, 11 insertions, 2 deletions
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h index 3e31508619c..7f0c2c3660f 100644 --- a/arch/m68k/include/asm/m5249sim.h +++ b/arch/m68k/include/asm/m5249sim.h @@ -80,6 +80,17 @@ #define MCFUART_BASE1 (MCF_MBAR + 0x200) /* Base address UART1 */ /* + * QSPI module. + */ +#define MCFQSPI_BASE (MCF_MBAR + 0x300) /* Base address QSPI */ +#define MCFQSPI_SIZE 0x40 /* Register set size */ + +#define MCFQSPI_CS0 29 +#define MCFQSPI_CS1 24 +#define MCFQSPI_CS2 21 +#define MCFQSPI_CS3 22 + +/* * DMA unit base addresses. */ #define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */ diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h index 62148b72825..e9a7e1a2c99 100644 --- a/arch/m68k/include/asm/mcfqspi.h +++ b/arch/m68k/include/asm/mcfqspi.h @@ -23,8 +23,6 @@ #if defined(CONFIG_M527x) || defined(CONFIG_M528x) #define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) -#elif defined(CONFIG_M5249) -#define MCFQSPI_IOBASE (MCF_MBAR + 0x300) #elif defined(CONFIG_M532x) #define MCFQSPI_IOBASE 0xFC058000 #endif |