Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

27 files changed, 75408 insertions, 0 deletions

diff --git a/arch/m68k/ifpsp060/CHANGES b/arch/m68k/ifpsp060/CHANGES
new file mode 100644
index 00000000000..c1e712dfc2e
--- /dev/null
+++ b/arch/m68k/ifpsp060/CHANGES
@@ -0,0 +1,120 @@
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
+M68000 Hi-Performance Microprocessor Division
+M68060 Software Package
+Production Release P1.00 -- October 10, 1994
+
+M68060 Software Package Copyright © 1993, 1994 Motorola Inc.  All rights reserved.
+
+THE SOFTWARE is provided on an "AS IS" basis and without warranty.
+To the maximum extent permitted by applicable law,
+MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
+INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+and any warranty against infringement with regard to the SOFTWARE
+(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
+
+To the maximum extent permitted by applicable law,
+IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
+(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
+BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
+ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
+Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
+
+You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
+so long as this entire notice is retained without alteration in any modified and/or
+redistributed versions, and that such modified versions are clearly identified as such.
+No licenses are granted by implication, estoppel or otherwise under any patents
+or trademarks of Motorola, Inc.
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+CHANGES SINCE LAST RELEASE:
+---------------------------
+
+1) "movep" emulation where data was being read from memory
+was reading the intermediate bytes. Emulation now only
+reads the required bytes.
+
+2) "flogn", "flog2", and "flog10" of "1" was setting the
+Inexact FPSR bit. Emulation now does not set Inexact for
+this case.
+
+3) For an opclass three FP instruction where the effective addressing
+mode was pre-decrement or post-increment and the address register
+was A0 or A1, the address register was not being updated as a result
+of the operation. This has been corrected.
+
+4) Beta B.2 version had the following erratum:
+
+	Scenario:
+	---------
+	If {i,d}mem_{read,write}_{byte,word,long}() returns
+	a failing value to the 68060SP, the package ignores
+	this return value and continues with program execution
+	as if it never received a failing value.
+
+	Effect:
+	-------
+	For example, if a user executed "fsin.x ADDR,fp0" where
+	ADDR should cause a "segmentation violation", the memory read
+	requested by the package should return a failing value
+	to the package. Since the package currently ignores this
+	return value, the user program will continue to the
+	next instruction, and the result created in fp0 will be
+	undefined.
+
+	Fix:
+	----
+	This has been fixed in the current release.
+
+	Notes:
+	------
+	Upon receiving a non-zero (failing) return value from
+	a {i,d}mem_{read,write}_{byte,word,long}() "call-out",
+	the package creates a 16-byte access error stack frame
+	from the current exception stack frame and exits
+	through the "call-out" _real_access(). This is the process
+	as described in the MC68060 User's Manual.
+
+	For instruction read access errors, the info stacked is:
+		SR	= SR at time of exception
+		PC	= PC of instruction being emulated
+		VOFF	= $4008 (stack frame format type)
+		ADDRESS	= PC of instruction being emulated
+		FSLW	= FAULT STATUS LONGWORD
+
+	The valid FSLW bits are:
+		bit 27		= 1	(misaligned bit)
+		bit 24		= 1	(read)
+		bit 23		= 0	(write)
+		bit 22:21	= 10	(SIZE = word)
+		bit 20:19	= 00	(TT)
+		bit 18:16	= x10	(TM; x = 1 for supervisor mode)
+		bit 15		= 1	(IO)
+		bit 0		= 1	(Software Emulation Error)
+
+	all other bits are EQUAL TO ZERO and can be set by the _real_access()
+	"call-out" stub by the user as appropriate. The MC68060 User's Manual
+	stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
+	other bits.
+
+	For data read/write access errors, the info stacked is:
+		SR	= SR at time of exception
+		PC	= PC of instruction being emulated
+		VOFF	= $4008 (stack frame format type)
+		ADDRESS	= Address of source or destination operand
+		FSLW	= FAULT STATUS LONGWORD
+
+	The valid FSLW bits are:
+		bit 27		= 0	(misaligned bit)
+		bit 24		= x	(read; 1 if read, 0 if write)
+		bit 23		= x	(write; 1 if write, 0 if read)
+		bit 22:21	= xx	(SIZE; see MC68060 User's Manual)
+		bit 20:19	= 00	(TT)
+		bit 18:16	= x01	(TM; x = 1 for supervisor mode)
+		bit 15		= 0	(IO)
+		bit 0		= 1	(Software Emulation Error)
+
+	all other bits are EQUAL TO ZERO and can be set by the _real_access()
+	"call-out" stub by the user as appropriate. The MC68060 User's Manual
+	stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
+	other bits.
diff --git a/arch/m68k/ifpsp060/MISC b/arch/m68k/ifpsp060/MISC
new file mode 100644
index 00000000000..b7e644b94ae
--- /dev/null
+++ b/arch/m68k/ifpsp060/MISC
@@ -0,0 +1,201 @@
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
+M68000 Hi-Performance Microprocessor Division
+M68060 Software Package
+Production Release P1.00 -- October 10, 1994
+
+M68060 Software Package Copyright © 1993, 1994 Motorola Inc.  All rights reserved.
+
+THE SOFTWARE is provided on an "AS IS" basis and without warranty.
+To the maximum extent permitted by applicable law,
+MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
+INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+and any warranty against infringement with regard to the SOFTWARE
+(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
+
+To the maximum extent permitted by applicable law,
+IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
+(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
+BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
+ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
+Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
+
+You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
+so long as this entire notice is retained without alteration in any modified and/or
+redistributed versions, and that such modified versions are clearly identified as such.
+No licenses are granted by implication, estoppel or otherwise under any patents
+or trademarks of Motorola, Inc.
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+RELEASE FILE VERSIONS:
+-----------------------
+
+fpsp.sa
+----------
+freal.s     : 2.4
+hdr.fpu     : 2.4
+x_fovfl.s   : 2.16
+x_funfl.s   : 2.19
+x_funsupp.s : 2.27
+x_effadd.s  : 2.21
+x_foperr.s  : 2.9
+x_fsnan.s   : 2.12
+x_finex.s   : 2.14
+x_fdz.s     : 2.5
+x_fline.s   : 2.5
+x_funimp.s  : 2.27
+fsin.s      : 2.6
+ftan.s      : 2.6
+fatan.s     : 2.3
+fasin.s     : 2.3
+facos.s     : 2.5
+fetox.s     : 2.4
+fgetem.s    : 2.5
+fcosh.s     : 2.4
+fsinh.s     : 2.5
+ftanh.s     : 2.3
+flogn.s     : 2.6
+fatanh.s    : 2.4
+flog2.s     : 2.4
+ftwotox.s   : 2.4
+fmovecr.s   : 2.5
+fscale.s    : 2.5
+frem_mod.s  : 2.6
+fkern.s     : 2.6
+fkern2.s    : 2.5
+fgen_except.s: 2.7
+foptbl.s    : 2.3
+fmul.s      : 2.5
+fin.s       : 2.4
+fdiv.s      : 2.5
+fneg.s      : 2.4
+ftst.s      : 2.3
+fint.s      : 2.3
+fintrz.s    : 2.3
+fabs.s      : 2.4
+fcmp.s      : 2.4
+fsglmul.s   : 2.5
+fsgldiv.s   : 2.8
+fadd.s      : 2.6
+fsub.s      : 2.6
+fsqrt.s     : 2.4
+fmisc.s     : 2.3
+fdbcc.s     : 2.8
+ftrapcc.s   : 2.5
+fscc.s      : 2.6
+fmovm.s     : 2.15
+fctrl.s     : 2.6
+fcalc_ea.s  : 2.7
+fmem.s      : 2.9
+fout.s      : 2.9
+ireg.s      : 2.6
+fdenorm.s   : 2.3
+fround.s    : 2.4
+fnorm.s     : 2.3
+foptag_set.s: 2.4
+fresult.s   : 2.3
+fpack.s     : 2.6
+fdecbin.s   : 2.4
+fbindec.s   : 2.5
+fbinstr.s   : 2.3
+faccess.s   : 2.3
+
+pfpsp.sa
+----------
+freal.s     : 2.4
+hdr.fpu     : 2.4
+x_fovfl.s   : 2.16
+x_funfl.s   : 2.19
+x_funsupp.s : 2.27
+x_effadd.s  : 2.21
+x_foperr.s  : 2.9
+x_fsnan.s   : 2.12
+x_finex.s   : 2.14
+x_fdz.s     : 2.5
+x_fline2.s  : 2.3
+fcalc_ea.s  : 2.7
+foptbl2.s   : 2.4
+fmovm.s     : 2.15
+fctrl.s     : 2.6
+fmisc.s     : 2.3
+fdenorm.s   : 2.3
+fround.s    : 2.4
+fnorm.s     : 2.3
+foptag_set.s: 2.4
+fresult.s   : 2.3
+fout.s      : 2.9
+fmul.s      : 2.5
+fin.s       : 2.4
+fdiv.s      : 2.5
+fneg.s      : 2.4
+ftst.s      : 2.3
+fint.s      : 2.3
+fintrz.s    : 2.3
+fabs.s      : 2.4
+fcmp.s      : 2.4
+fsglmul.s   : 2.5
+fsgldiv.s   : 2.8
+fadd.s      : 2.6
+fsub.s      : 2.6
+fsqrt.s     : 2.4
+ireg.s      : 2.6
+fpack.s     : 2.6
+fdecbin.s   : 2.4
+fbindec.s   : 2.5
+fbinstr.s   : 2.3
+faccess.s   : 2.3
+
+fplsp.sa
+----------
+lfptop.s    : 2.3
+hdr.fpu     : 2.4
+fsin.s      : 2.6
+ftan.s      : 2.6
+fatan.s     : 2.3
+fasin.s     : 2.3
+facos.s     : 2.5
+fetox.s     : 2.4
+fgetem.s    : 2.5
+fcosh.s     : 2.4
+fsinh.s     : 2.5
+ftanh.s     : 2.3
+flogn.s     : 2.6
+fatanh.s    : 2.4
+flog2.s     : 2.4
+ftwotox.s   : 2.4
+fscale.s    : 2.5
+frem_mod.s  : 2.6
+l_support.s : 2.15
+fnorm.s     : 2.3
+
+isp.sa
+----------
+ireal.s     : 2.4
+hdr.int     : 2.4
+x_uieh.s    : 2.13
+icalc_ea.s  : 2.11
+imovep.s    : 2.8
+ichk2cmp2.s : 2.6
+idiv64.s    : 2.10
+imul64.s    :
+icas2.s     : 2.11
+icas.s      : 2.12
+icas2_core.s: 2.6
+icas_core.s : 2.6
+
+ilsp.sa
+----------
+litop.s     : 2.2
+l_idiv64.s  : 2.8
+l_imul64.s  : 2.6
+l_ichk2cmp2.s: 2.5
+
+ex. files
+----------
+wrk/fskeleton.s: 2.2
+wrk/iskeleton.s: 2.2
+wrk/os.s    : 2.1
+
+tests
+----------
+itest.s     : 2.2
+ftest.s     : 2.1
diff --git a/arch/m68k/ifpsp060/Makefile b/arch/m68k/ifpsp060/Makefile
new file mode 100644
index 00000000000..2fe8472cb5e
--- /dev/null
+++ b/arch/m68k/ifpsp060/Makefile
@@ -0,0 +1,10 @@
+# Makefile for 680x0 Linux 68060 integer/floating point support package
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "README.legal" in the main directory of this archive
+# for more details.
+
+obj-y := fskeleton.o iskeleton.o os.o
+
+EXTRA_AFLAGS := -traditional
+EXTRA_LDFLAGS := -x
diff --git a/arch/m68k/ifpsp060/README b/arch/m68k/ifpsp060/README
new file mode 100644
index 00000000000..e3bced429bd
--- /dev/null
+++ b/arch/m68k/ifpsp060/README
@@ -0,0 +1,71 @@
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
+M68000 Hi-Performance Microprocessor Division
+M68060 Software Package
+Production Release P1.00 -- October 10, 1994
+
+M68060 Software Package Copyright © 1993, 1994 Motorola Inc.  All rights reserved.
+
+THE SOFTWARE is provided on an "AS IS" basis and without warranty.
+To the maximum extent permitted by applicable law,
+MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
+INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+and any warranty against infringement with regard to the SOFTWARE
+(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
+
+To the maximum extent permitted by applicable law,
+IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
+(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
+BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
+ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
+Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
+
+You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
+so long as this entire notice is retained without alteration in any modified and/or
+redistributed versions, and that such modified versions are clearly identified as such.
+No licenses are granted by implication, estoppel or otherwise under any patents
+or trademarks of Motorola, Inc.
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Files in this directory:
+-------------------------
+
+fpsp.sa		Full FP Kernel Module - hex image
+fpsp.s		Full FP Kernel Module - source code
+fpsp.doc	Full FP Kernel Module - on-line documentation
+
+pfpsp.sa	Partial FP Kernel Module - hex image
+pfpsp.s		Partial FP Kernel Module - source code
+
+fplsp.sa	FP Library Module - hex image
+fplsp.s		FP Library Module - source code
+fplsp.doc	FP Library Module - on-line documentation
+
+isp.sa		Integer Unimplemented Kernel Module - hex image
+isp.s		Integer Unimplemented Kernel Module - source code
+isp.doc		Integer Unimplemented Kernel Module - on-line doc
+
+ilsp.sa		Integer Unimplemented Library Module - hex image
+ilsp.s		Integer Unimplemented Library Module - source code
+ilsp.doc	Integer Unimplemented Library Module - on-line doc
+
+fskeleton.s	Sample Call-outs needed by fpsp.sa and pfpsp.sa
+
+iskeleton.s	Sample Call-outs needed by isp.sa
+
+os.s		Sample Call-outs needed by fpsp.sa, pfpsp.sa, and isp.sa
+
+ftest.sa	Simple test program to test that {p}fpsp.sa
+		was connected properly; hex image
+ftest.s		above test; source code
+
+itest.sa	Simple test program to test that isp.sa was
+		connected properly; hex image
+itest.s		above test; source code
+
+test.doc	on-line documentation for {i,f}test.sa
+
+README		This file
+
+ERRATA		Known errata for this release
+
+MISC		Release file version numbers
diff --git a/arch/m68k/ifpsp060/TEST.DOC b/arch/m68k/ifpsp060/TEST.DOC
new file mode 100644
index 00000000000..5e5900cb2dc
--- /dev/null
+++ b/arch/m68k/ifpsp060/TEST.DOC
@@ -0,0 +1,208 @@
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
+M68000 Hi-Performance Microprocessor Division
+M68060 Software Package
+Production Release P1.00 -- October 10, 1994
+
+M68060 Software Package Copyright © 1993, 1994 Motorola Inc.  All rights reserved.
+
+THE SOFTWARE is provided on an "AS IS" basis and without warranty.
+To the maximum extent permitted by applicable law,
+MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
+INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+and any warranty against infringement with regard to the SOFTWARE
+(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
+
+To the maximum extent permitted by applicable law,
+IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
+(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
+BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
+ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
+Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
+
+You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
+so long as this entire notice is retained without alteration in any modified and/or
+redistributed versions, and that such modified versions are clearly identified as such.
+No licenses are granted by implication, estoppel or otherwise under any patents
+or trademarks of Motorola, Inc.
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+68060 SOFTWARE PACKAGE (Kernel version) SIMPLE TESTS
+-----------------------------------------------------
+
+The files itest.sa and ftest.sa contain simple tests to check
+the state of the 68060ISP and 68060FPSP once they have been installed.
+
+Release file format:
+--------------------
+The release files itest.sa and ftest.sa are essentially
+hexadecimal images of the actual tests. This format is the
+ONLY format that will be supported. The hex images were created
+by assembling the source code and then converting the resulting
+binary output images into ASCII text files. The hexadecimal
+numbers are listed using the Motorola Assembly syntax assembler
+directive "dc.l" (define constant longword). The files can be
+converted to other assembly syntaxes by using any word processor
+with a global search and replace function.
+
+To assist in assembling and linking these modules with other modules,
+the installer should add symbolic labels to the top of the files.
+This will allow the calling routines to access the entry points
+of these packages.
+
+The source code itest.s and ftest.s have been included but only
+for documentation purposes.
+
+Release file structure:
+-----------------------
+
+(top of module)
+	-----------------
+	|		| - 128 byte-sized section
+   (1)  |   Call-Out	| - 4 bytes per entry (user fills these in)
+	|		|
+	-----------------
+	|		| - 8 bytes per entry
+   (2)  | Entry Point	| - user does "bsr" or "jsr" to this address
+	|		|
+	-----------------
+	|		| - code section
+   (3)  ~		~
+	|		|
+	-----------------
+(bottom of module)
+
+The first section of this module is the "Call-out" section. This section
+is NOT INCLUDED in {i,f}test.sa (an example "Call-out" section is provided at
+the end of this file). The purpose of this section is to allow the test
+routines to reference external printing functions that must be provided
+by the host operating system. This section MUST be exactly 128 bytes in
+size. There are 32 fields, each 4 bytes in size. Each field corresponds
+to a function required by the test packages (these functions and their
+location are listed in "68060{ISP,FPSP}-TEST call-outs" below). Each field
+entry should contain the address of the corresponding function RELATIVE to
+the starting address of the "call-out" section. The "Call-out" section must
+sit adjacent to the {i,f}test.sa image in memory. Since itest.sa and ftest.sa
+are individual tests, they each require their own "Call-out" sections.
+
+The second section, the "Entry-point" section, is used by external routines
+to access the test routines. Since the {i,f}test.sa hex files contain
+no symbol names, this section contains function entry points that are fixed
+with respect to the top of the package. The currently defined entry-points
+are listed in section "68060{ISP,FPSP}-TEST entry points" below. A calling
+routine would simply execute a "bsr" or "jsr" that jumped to the selected
+function entry-point.
+
+For example, to run the 060ISP test, write a program that includes the
+itest.sa data and execute something similar to:
+
+	bsr	_060ISP_TEST+128+0
+
+(_060ISP_TEST is the starting address of the "Call-out" section; the "Call-out"
+section is 128 bytes long; and the 68060ISP test entry point is located
+0 bytes from the top of the "Entry-point" section.)
+
+The third section is the code section. After entering through an "Entry-point",
+the entry code jumps to the appropriate test code within the code section.
+
+68060ISP-TEST Call-outs:
+------------------------
+0x0: _print_string()
+0x4: _print_number()
+
+68060FPSP-TEST Call-outs:
+-------------------------
+0x0: _print_string()
+0x4: _print_number()
+
+The test packages call _print_string() and _print_number()
+as subroutines and expect the main program to print a string
+or a number to a file or to the screen.
+In "C"-like fashion, the test program calls:
+
+	print_string("Test passed");
+
+		or
+
+	print_number(20);
+
+For _print_string(), the test programs pass a longword address
+of the string on the stack. For _print_number(), the test programs pass
+a longword number to be printed.
+
+For debugging purposes, after the main program performs a "print"
+for a test package, it should flush the output so that it's not
+buffered. In this way, if the test program crashes, at least the previous
+statements printed will be seen.
+
+68060ISP-TEST Entry-points:
+---------------------------
+0x0: integer test
+
+68060FPSP-TEST Entry-points:
+----------------------------
+0x00: main fp test
+0x08: FP unimplemented test
+0x10: FP enabled snan/operr/ovfl/unfl/dz/inex
+
+The floating-point unit test has 3 entry points which will require
+3 different calls to the package if each of the three following tests
+is desired:
+
+main fp test: tests (1) unimp effective address exception
+		    (2) unsupported data type exceptions
+		    (3) non-maskable overflow/underflow exceptions
+
+FP unimplemented: tests FP unimplemented exception. this one is
+		  separate from the previous tests for systems that don't
+		  want FP unimplemented instructions.
+
+FP enabled: tests enabled snan/operr/ovfl/unfl/dz/inex.
+	    basically, it enables each of these exceptions and forces
+	    each using an implemented FP instruction. this process
+	    exercises _fpsp_{snan,operr,ovfl,unfl,dz,inex}() and
+	    _real_{snan,operr,ovfl,unfl,dz,inex}(). the test expects
+	    _real_XXXX() to do nothing except clear the exception
+	    and "rte". if a system's _real_XXXX() handler creates an
+	    alternate result, the test will print "failed" but this
+	    is acceptable.
+
+Miscellaneous:
+--------------
+Again, itest.sa and ftest.sa are simple tests and do not thoroughly
+test all 68060SP connections. For example, they do not test connections
+to _real_access(), _real_trace(), _real_trap(), etc. because these
+will be system-implemented several different ways and the test packages
+must remain system independent.
+
+Example test package set-up:
+----------------------------
+_print_str:
+	.			# provided by system
+	rts
+
+_print_num:
+	.			# provided by system
+	rts
+
+	.
+	.
+	bsr	_060FPSP_TEST+128+0
+	.
+	.
+	rts
+
+# beginning of "Call-out" section; provided by integrator.
+# MUST be 128 bytes long.
+_060FPSP_TEST:
+	long	_print_str - _060FPSP_TEST
+	long	_print_num - _060FPSP_TEST
+	space	120
+
+# ftest.sa starts here; start of "Entry-point" section.
+	long	0x60ff0000, 0x00002346
+	long	0x60ff0000, 0x00018766
+	long	0x60ff0000, 0x00023338
+	long	0x24377299, 0xab2643ea
+		.
+		.
+		.
diff --git a/arch/m68k/ifpsp060/fplsp.doc b/arch/m68k/ifpsp060/fplsp.doc
new file mode 100644
index 00000000000..fb637c43676
--- /dev/null
+++ b/arch/m68k/ifpsp060/fplsp.doc
@@ -0,0 +1,231 @@
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
+M68000 Hi-Performance Microprocessor Division
+M68060 Software Package
+Production Release P1.00 -- October 10, 1994
+
+M68060 Software Package Copyright © 1993, 1994 Motorola Inc.  All rights reserved.
+
+THE SOFTWARE is provided on an "AS IS" basis and without warranty.
+To the maximum extent permitted by applicable law,
+MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
+INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+and any warranty against infringement with regard to the SOFTWARE
+(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
+
+To the maximum extent permitted by applicable law,
+IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
+(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
+BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
+ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
+Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
+
+You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
+so long as this entire notice is retained without alteration in any modified and/or
+redistributed versions, and that such modified versions are clearly identified as such.
+No licenses are granted by implication, estoppel or otherwise under any patents
+or trademarks of Motorola, Inc.
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+68060 FLOATING-POINT SOFTWARE PACKAGE (Library version)
+--------------------------------------------------------
+
+The file fplsp.sa contains the "Library version" of the
+68060SP Floating-Point Software Package. The routines
+included in this module can be used to emulate the
+FP instructions not implemented in 68060 hardware. These
+instructions normally take exception vector #11
+"FP Unimplemented Instruction".
+
+By re-compiling a program that uses these instructions, and
+making subroutine calls in place of the unimplemented
+instructions, a program can avoid the overhead associated
+with taking the exception.
+
+Release file format:
+--------------------
+The file fplsp.sa is essentially a hexadecimal image of the
+release package. This is the ONLY format which will be supported.
+The hex image was created by assembling the source code and
+then converting the resulting binary output image into an
+ASCII text file. The hexadecimal numbers are listed
+using the Motorola Assembly Syntax assembler directive "dc.l"
+(define constant longword). The file can be converted to other
+assembly syntaxes by using any word processor with a global
+search and replace function.
+
+To assist in assembling and linking this module with other modules,
+the installer should add a symbolic label to the top of the file.
+This will allow calling routines to access the entry points
+of this package.
+
+The source code fplsp.s has also been included but only for
+documentation purposes.
+
+Release file structure:
+-----------------------
+The file fplsp.sa contains an "Entry-Point" section and a
+code section. The FPLSP has no "Call-Out" section. The first section
+is the "Entry-Point" section. In order to access a function in the
+package, a program must "bsr" or "jsr" to the location listed
+below in "68060FPLSP entry points" that corresponds to the desired
+function. A branch instruction located at the selected entry point
+within the package will then enter the correct emulation code routine.
+
+The entry point addresses at the beginning of the package will remain
+fixed so that a program calling the routines will not have to be
+re-compiled with every new 68060FPLSP release.
+
+There are 3 entry-points for each instruction type: single precision,
+double precision, and extended precision.
+
+As an example, the "fsin" library instruction can be passed an
+extended precision operand if program executes:
+
+# fsin.x fp0
+
+	fmovm.x	&0x01,-(%sp)	# pass operand on stack
+	bsr.l	_060FPLSP_TOP+0x1a8 # branch to fsin routine
+	add.l	&0xc,%sp	# clear operand from stack
+
+Upon return, fp0 holds the correct result. The FPSR is
+set correctly. The FPCR is unchanged. The FPIAR is undefined.
+
+Another example. This time, a dyadic operation:
+
+# frem.s %fp1,%fp0
+
+	fmov.s	%fp1,-(%sp)	# pass src operand
+	fmov.s	%fp0,-(%sp)	# pass dst operand
+	bsr.l	_060FPLSP_TOP+0x168 # branch to frem routine
+	addq.l	&0x8,%sp	# clear operands from stack
+
+Again, the result is returned in fp0. Note that BOTH operands
+are passed in single precision format.
+
+Exception reporting:
+--------------------
+The package takes exceptions according to the FPCR value upon subroutine
+entry. If an exception should be reported, then the package forces
+this exception using implemented floating-point instructions.
+For example, if the instruction being emulated should cause a
+floating-point Operand Error exception, then the library routine
+executes an FMUL of a zero and an infinity to force the OPERR
+exception. Although the FPIAR will be undefined for the enabled
+Operand Error exception handler, the user will at least be able
+to record that the event occurred.
+
+Miscellaneous:
+--------------
+The package does not attempt to correctly emulate instructions
+with Signalling NAN inputs. Use of SNANs should be avoided with
+this package.
+
+The fabs/fadd/fdiv/fint/fintrz/fmul/fneg/fsqrt/fsub entry points
+are provided for the convenience of older compilers that make
+subroutine calls for all fp instructions. The code does NOT emulate
+the instruction but rather simply executes it.
+
+68060FPLSP entry points:
+------------------------
+_060FPLSP_TOP:
+0x000:	_060LSP__facoss_
+0x008:	_060LSP__facosd_
+0x010:	_060LSP__facosx_
+0x018:	_060LSP__fasins_
+0x020:	_060LSP__fasind_
+0x028:	_060LSP__fasinx_
+0x030:	_060LSP__fatans_
+0x038:	_060LSP__fatand_
+0x040:	_060LSP__fatanx_
+0x048:	_060LSP__fatanhs_
+0x050:	_060LSP__fatanhd_
+0x058:	_060LSP__fatanhx_
+0x060:	_060LSP__fcoss_
+0x068:	_060LSP__fcosd_
+0x070:	_060LSP__fcosx_
+0x078:	_060LSP__fcoshs_
+0x080:	_060LSP__fcoshd_
+0x088:	_060LSP__fcoshx_
+0x090:	_060LSP__fetoxs_
+0x098:	_060LSP__fetoxd_
+0x0a0:	_060LSP__fetoxx_
+0x0a8:	_060LSP__fetoxm1s_
+0x0b0:	_060LSP__fetoxm1d_
+0x0b8:	_060LSP__fetoxm1x_
+0x0c0:	_060LSP__fgetexps_
+0x0c8:	_060LSP__fgetexpd_
+0x0d0:	_060LSP__fgetexpx_
+0x0d8:	_060LSP__fgetmans_
+0x0e0:	_060LSP__fgetmand_
+0x0e8:	_060LSP__fgetmanx_
+0x0f0:	_060LSP__flog10s_
+0x0f8:	_060LSP__flog10d_
+0x100:	_060LSP__flog10x_
+0x108:	_060LSP__flog2s_
+0x110:	_060LSP__flog2d_
+0x118:	_060LSP__flog2x_
+0x120:	_060LSP__flogns_
+0x128:	_060LSP__flognd_
+0x130:	_060LSP__flognx_
+0x138:	_060LSP__flognp1s_
+0x140:	_060LSP__flognp1d_
+0x148:	_060LSP__flognp1x_
+0x150:	_060LSP__fmods_
+0x158:	_060LSP__fmodd_
+0x160:	_060LSP__fmodx_
+0x168:	_060LSP__frems_
+0x170:	_060LSP__fremd_
+0x178:	_060LSP__fremx_
+0x180:	_060LSP__fscales_
+0x188:	_060LSP__fscaled_
+0x190:	_060LSP__fscalex_