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| author | Simon Arlott <simon@fire.lp0.eu> | 2007-10-20 01:08:50 +0200 |
|---|---|---|
| committer | Adrian Bunk <bunk@kernel.org> | 2007-10-20 01:08:50 +0200 |
| commit | 49b4ff3304b52b18c490fc4deb400b61bb7ed142 (patch) | |
| tree | ec9bf61cec6c195e34630882bea801fadf44629a /arch/cris/arch-v32/kernel/time.c | |
| parent | c3a2ddee16e67c86f3b469ccdd396cda034756a9 (diff) | |
spelling fixes: arch/cris/
Spelling fixes in arch/cris/.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'arch/cris/arch-v32/kernel/time.c')
| -rw-r--r-- | arch/cris/arch-v32/kernel/time.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c index be0a01657d4..2f7e8e200f2 100644 --- a/arch/cris/arch-v32/kernel/time.c +++ b/arch/cris/arch-v32/kernel/time.c @@ -99,7 +99,7 @@ unsigned long do_slow_gettimeoffset(void) /* From timer MDS describing the hardware watchdog: * 4.3.1 Watchdog Operation * The watchdog timer is an 8-bit timer with a configurable start value. - * Once started the whatchdog counts downwards with a frequency of 763 Hz + * Once started the watchdog counts downwards with a frequency of 763 Hz * (100/131072 MHz). When the watchdog counts down to 1, it generates an * NMI (Non Maskable Interrupt), and when it counts down to 0, it resets the * chip. |