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authorIngo Molnar <mingo@elte.hu>2011-05-26 13:51:31 +0200
committerIngo Molnar <mingo@elte.hu>2011-05-26 13:51:35 +0200
commitde66ee979d0ea45171cc2501750e9f9f22f5a690 (patch)
tree5ab1a5c6b596b9b786902fb380274e1e1f4ceb13 /arch/blackfin/mach-bf548/include/mach/anomaly.h
parent916f676f8dc016103f983c7ec54c18ecdbb6e349 (diff)
parent4db70f73e56961b9bcdfd0c36c62847a18b7dbb5 (diff)
Merge branch 'linus' into x86/urgent
Merge reason: we want to queue up a dependent patch. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/blackfin/mach-bf548/include/mach/anomaly.h')
-rw-r--r--arch/blackfin/mach-bf548/include/mach/anomaly.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index ffd0537295a..9e70785bdde 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -5,13 +5,13 @@
* and can be replaced with that version at any time
* DO NOT EDIT THIS FILE
*
- * Copyright 2004-2010 Analog Devices Inc.
+ * Copyright 2004-2011 Analog Devices Inc.
* Licensed under the ADI BSD license.
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
*/
/* This file should be up to date with:
- * - Revision I, 07/23/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
+ * - Revision J, 06/03/2010; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
*/
#ifndef _MACH_ANOMALY_H_
@@ -220,6 +220,8 @@
#define ANOMALY_05000481 (1)
/* Possible USB Data Corruption When Multiple Endpoints Are Accessed by the Core */
#define ANOMALY_05000483 (1)
+/* DDR Trim May Not Be Performed for Certain VLEV Values in OTP Page PBS00L */
+#define ANOMALY_05000484 (__SILICON_REVISION__ < 3)
/* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */
#define ANOMALY_05000485 (__SILICON_REVISION__ >= 2)
/* IFLUSH sucks at life */
@@ -274,6 +276,8 @@
#define ANOMALY_05000412 (0)
#define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0)
+#define ANOMALY_05000440 (0)
#define ANOMALY_05000475 (0)
+#define ANOMALY_05000480 (0)
#endif