diff options
author | David Woodhouse <David.Woodhouse@intel.com> | 2010-10-30 12:35:11 +0100 |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2010-10-30 12:35:11 +0100 |
commit | 67577927e8d7a1f4b09b4992df640eadc6aacb36 (patch) | |
tree | 2e9efe6b5745965faf0dcc084d4613d9356263f9 /arch/blackfin/mach-bf533/include/mach/cdefBF532.h | |
parent | 6fe4c590313133ebd5dadb769031489ff178ece1 (diff) | |
parent | 51f00a471ce8f359627dd99aeac322947a0e491b (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Conflicts:
drivers/mtd/mtd_blkdevs.c
Merge Grant's device-tree bits so that we can apply the subsequent fixes.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch/blackfin/mach-bf533/include/mach/cdefBF532.h')
-rw-r--r-- | arch/blackfin/mach-bf533/include/mach/cdefBF532.h | 91 |
1 files changed, 0 insertions, 91 deletions
diff --git a/arch/blackfin/mach-bf533/include/mach/cdefBF532.h b/arch/blackfin/mach-bf533/include/mach/cdefBF532.h index feb2392c43e..401e524f532 100644 --- a/arch/blackfin/mach-bf533/include/mach/cdefBF532.h +++ b/arch/blackfin/mach-bf533/include/mach/cdefBF532.h @@ -7,11 +7,6 @@ #ifndef _CDEF_BF532_H #define _CDEF_BF532_H -#include <asm/blackfin.h> - -/*include all Core registers and bit definitions*/ -#include "defBF532.h" - /*include core specific register pointer definitions*/ #include <asm/cdef_LPBlackfin.h> @@ -655,90 +650,4 @@ /* These need to be last due to the cdef/linux inter-dependencies */ #include <asm/irq.h> -#if ANOMALY_05000311 -#define BFIN_WRITE_FIO_FLAG(name) \ -static inline void bfin_write_FIO_FLAG_##name(unsigned short val) \ -{ \ - unsigned long flags; \ - local_irq_save_hw(flags); \ - bfin_write16(FIO_FLAG_##name, val); \ - bfin_read_CHIPID(); \ - local_irq_restore_hw(flags); \ -} -BFIN_WRITE_FIO_FLAG(D) -BFIN_WRITE_FIO_FLAG(C) -BFIN_WRITE_FIO_FLAG(S) -BFIN_WRITE_FIO_FLAG(T) - -#define BFIN_READ_FIO_FLAG(name) \ -static inline u16 bfin_read_FIO_FLAG_##name(void) \ -{ \ - unsigned long flags; \ - u16 ret; \ - local_irq_save_hw(flags); \ - ret = bfin_read16(FIO_FLAG_##name); \ - bfin_read_CHIPID(); \ - local_irq_restore_hw(flags); \ - return ret; \ -} -BFIN_READ_FIO_FLAG(D) -BFIN_READ_FIO_FLAG(C) -BFIN_READ_FIO_FLAG(S) -BFIN_READ_FIO_FLAG(T) - -#else -#define bfin_write_FIO_FLAG_D(val) bfin_write16(FIO_FLAG_D, val) -#define bfin_write_FIO_FLAG_C(val) bfin_write16(FIO_FLAG_C, val) -#define bfin_write_FIO_FLAG_S(val) bfin_write16(FIO_FLAG_S, val) -#define bfin_write_FIO_FLAG_T(val) bfin_write16(FIO_FLAG_T, val) -#define bfin_read_FIO_FLAG_T() bfin_read16(FIO_FLAG_T) -#define bfin_read_FIO_FLAG_C() bfin_read16(FIO_FLAG_C) -#define bfin_read_FIO_FLAG_S() bfin_read16(FIO_FLAG_S) -#define bfin_read_FIO_FLAG_D() bfin_read16(FIO_FLAG_D) -#endif - -/* Writing to PLL_CTL initiates a PLL relock sequence. */ -static __inline__ void bfin_write_PLL_CTL(unsigned int val) -{ - unsigned long flags, iwr; - - if (val == bfin_read_PLL_CTL()) - return; - - local_irq_save_hw(flags); - /* Enable the PLL Wakeup bit in SIC IWR */ - iwr = bfin_read32(SIC_IWR); - /* Only allow PPL Wakeup) */ - bfin_write32(SIC_IWR, IWR_ENABLE(0)); - - bfin_write16(PLL_CTL, val); - SSYNC(); - asm("IDLE;"); - - bfin_write32(SIC_IWR, iwr); - local_irq_restore_hw(flags); -} - -/* Writing to VR_CTL initiates a PLL relock sequence. */ -static __inline__ void bfin_write_VR_CTL(unsigned int val) -{ - unsigned long flags, iwr; - - if (val == bfin_read_VR_CTL()) - return; - - local_irq_save_hw(flags); - /* Enable the PLL Wakeup bit in SIC IWR */ - iwr = bfin_read32(SIC_IWR); - /* Only allow PPL Wakeup) */ - bfin_write32(SIC_IWR, IWR_ENABLE(0)); - - bfin_write16(VR_CTL, val); - SSYNC(); - asm("IDLE;"); - - bfin_write32(SIC_IWR, iwr); - local_irq_restore_hw(flags); -} - #endif /* _CDEF_BF532_H */ |