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authorLinus Torvalds <torvalds@linux-foundation.org>2009-02-04 07:56:25 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2009-02-04 07:56:25 -0800
commiteda58a85ec3fc05855a26654d97a2b53f0e715b9 (patch)
treede995f6f0e38c3f35e866519c6de7e331ce6cc91 /arch/blackfin/kernel/reboot.c
parent024bb9617e01716c5ac7d235f54483cc6018978f (diff)
parentc8e674125e03c5f36ccfd61d83b933e6956074b0 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (40 commits) Blackfin arch: Remove outdated code Blackfin arch: Fix udelay implementation Blackfin arch: Update Copyright information Blackfin arch: Add BF561 PPI POLS, POLC Masks Blackfin arch: Update CM-BF527 kernel config Blackfin arch: define bfin_memmap as static since it is only used here Blackfin arch: cplb mananger: use a do...while loop rather than a for loop Blackfin arch: fix bug - traps test case 19 for exception 0x2d fails Blackfin arch: add platform device bfin_mii-bus and KSZ8893M switch driver platform resources to board files Blackfin arch: build jtag tty driver as a module by default Blackfin arch: fix 2 bugs related to debug Blackfin arch: Add ANOMALY_05000380 to BF54x to kill the compile warning Blackfin arch: Fix bug - 561 SMP kernel can't boot from jffs2 Blackfin arch: base SIC_IWR# programming on whether the MMR exists Blackfin arch: read SYSCR on newer parts that mirror the bits of SWRST in it Blackfin arch: fixup board init function name Blackfin arch: drop CONFIG_I2C_BOARDINFO ifdefs Blackfin arch: bfin_reset->_bfin_reset redirection no longer needed Blackfin arch: sync reboot handler with version in u-boot Blackfin arch: Faster Implementation of csum_tcpudp_nofold() ...
Diffstat (limited to 'arch/blackfin/kernel/reboot.c')
-rw-r--r--arch/blackfin/kernel/reboot.c30
1 files changed, 14 insertions, 16 deletions
diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c
index eeee8cb4336..53d08dee853 100644
--- a/arch/blackfin/kernel/reboot.c
+++ b/arch/blackfin/kernel/reboot.c
@@ -20,8 +20,8 @@
* reset while the Core B bit (on dual core parts) is cleared by
* the core reset.
*/
-__attribute__((l1_text))
-static void _bfin_reset(void)
+__attribute__ ((__l1_text__, __noreturn__))
+static void bfin_reset(void)
{
/* Wait for completion of "system" events such as cache line
* line fills so that we avoid infinite stalls later on as
@@ -30,7 +30,11 @@ static void _bfin_reset(void)
*/
__builtin_bfin_ssync();
- while (1) {
+ /* The bootrom checks to see how it was reset and will
+ * automatically perform a software reset for us when
+ * it starts executing after the core reset.
+ */
+ if (ANOMALY_05000353 || ANOMALY_05000386) {
/* Initiate System software reset. */
bfin_write_SWRST(0x7);
@@ -50,6 +54,11 @@ static void _bfin_reset(void)
/* Clear System software reset */
bfin_write_SWRST(0);
+ /* The BF526 ROM will crash during reset */
+#if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
+ bfin_read_SWRST();
+#endif
+
/* Wait for the SWRST write to complete. Cannot rely on SSYNC
* though as the System state is all reset now.
*/
@@ -60,22 +69,11 @@ static void _bfin_reset(void)
: "a" (15 * 1)
: "LC1", "LB1", "LT1"
);
+ }
+ while (1)
/* Issue core reset */
asm("raise 1");
- }
-}
-
-static void bfin_reset(void)
-{
- if (ANOMALY_05000353 || ANOMALY_05000386)
- _bfin_reset();
- else
- /* the bootrom checks to see how it was reset and will
- * automatically perform a software reset for us when
- * it starts executing boot
- */
- asm("raise 1;");
}
__attribute__((weak))