diff options
| author | Steven Whitehouse <swhiteho@redhat.com> | 2006-07-03 10:25:08 -0400 |
|---|---|---|
| committer | Steven Whitehouse <swhiteho@redhat.com> | 2006-07-03 10:25:08 -0400 |
| commit | 0a1340c185734a57fbf4775927966ad4a1347b02 (patch) | |
| tree | d9ed8f0dd809a7c542a3356601125ea5b5aaa804 /arch/arm | |
| parent | af18ddb8864b096e3ed4732e2d4b21c956dcfe3a (diff) | |
| parent | 29454dde27d8e340bb1987bad9aa504af7081eba (diff) | |
Merge rsync://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
include/linux/kernel.h
Diffstat (limited to 'arch/arm')
404 files changed, 27007 insertions, 3760 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 08b7cc900ca..f81a62380ad 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -47,6 +47,18 @@ config MCA <file:Documentation/mca.txt> (and especially the web page given there) before attempting to build an MCA bus kernel. +config GENERIC_HARDIRQS + bool + default y + +config HARDIRQS_SW_RESEND + bool + default y + +config GENERIC_IRQ_PROBE + bool + default y + config RWSEM_GENERIC_SPINLOCK bool default y @@ -93,15 +105,49 @@ choice prompt "ARM system type" default ARCH_VERSATILE +config ARCH_AAEC2000 + bool "Agilent AAEC-2000 based" + select ARM_AMBA + help + This enables support for systems based on the Agilent AAEC-2000 + +config ARCH_INTEGRATOR + bool "ARM Ltd. Integrator family" + select ARM_AMBA + select ICST525 + help + Support for ARM's Integrator platform. + +config ARCH_REALVIEW + bool "ARM Ltd. RealView family" + select ARM_AMBA + select ICST307 + help + This enables support for ARM Ltd RealView boards. + +config ARCH_VERSATILE + bool "ARM Ltd. Versatile family" + select ARM_AMBA + select ARM_VIC + select ICST307 + help + This enables support for ARM Ltd Versatile board. + +config ARCH_AT91 + bool "Atmel AT91" + help + This enables support for systems based on the Atmel AT91RM9200 + and AT91SAM9xxx processors. + config ARCH_CLPS7500 - bool "Cirrus-CL-PS7500FE" + bool "Cirrus CL-PS7500FE" select TIMER_ACORN select ISA help Support for the Cirrus Logic PS7500FE system-on-a-chip. config ARCH_CLPS711X - bool "CLPS711x/EP721x-based" + bool "Cirrus Logic CLPS711x/EP721x-based" help Support for Cirrus Logic 711x/721x based boards. @@ -135,32 +181,46 @@ config ARCH_FOOTBRIDGE Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. -config ARCH_INTEGRATOR - bool "Integrator" - select ARM_AMBA - select ICST525 +config ARCH_NETX + bool "Hilscher NetX based" + select ARM_VIC help - Support for ARM's Integrator platform. + This enables support for systems based on the Hilscher NetX Soc + +config ARCH_H720X + bool "Hynix HMS720x-based" + select ISA_DMA_API + help + This enables support for systems based on the Hynix HMS720x + +config ARCH_IMX + bool "IMX" + help + Support for Motorola's i.MX family of processors (MX1, MXL). config ARCH_IOP3XX bool "IOP3xx-based" + depends on MMU select PCI help Support for Intel's IOP3XX (XScale) family of processors. config ARCH_IXP4XX bool "IXP4xx-based" + depends on MMU help Support for Intel's IXP4XX (XScale) family of processors. config ARCH_IXP2000 bool "IXP2400/2800-based" + depends on MMU select PCI help Support for Intel's IXP2400/2800 (XScale) family of processors. config ARCH_IXP23XX bool "IXP23XX-based" + depends on MMU select PCI help Support for Intel's IXP23xx (XScale) family of processors. @@ -178,8 +238,14 @@ config ARCH_L7200 If you have any questions or comments about the Linux kernel port to this board, send e-mail to <sjhill@cotw.com>. +config ARCH_PNX4008 + bool "Philips Nexperia PNX4008 Mobile" + help + This enables support for Philips PNX4008 mobile platform. + config ARCH_PXA bool "PXA2xx-based" + depends on MMU select ARCH_MTD_XIP help Support for Intel's PXA2XX processor line. @@ -204,7 +270,7 @@ config ARCH_SA1100 Support for StrongARM 11x0 based boards. config ARCH_S3C2410 - bool "Samsung S3C2410" + bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442" help Samsung S3C2410X CPU based systems, such as the Simtec Electronics BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or @@ -232,44 +298,6 @@ config ARCH_OMAP help Support for TI's OMAP platform (OMAP1 and OMAP2). -config ARCH_VERSATILE - bool "Versatile" - select ARM_AMBA - select ARM_VIC - select ICST307 - help - This enables support for ARM Ltd Versatile board. - -config ARCH_REALVIEW - bool "RealView" - select ARM_AMBA - select ICST307 - help - This enables support for ARM Ltd RealView boards. - -config ARCH_IMX - bool "IMX" - help - Support for Motorola's i.MX family of processors (MX1, MXL). - -config ARCH_H720X - bool "Hynix-HMS720x-based" - select ISA_DMA_API - help - This enables support for systems based on the Hynix HMS720x - -config ARCH_AAEC2000 - bool "Agilent AAEC-2000 based" - select ARM_AMBA - help - This enables support for systems based on the Agilent AAEC-2000 - -config ARCH_AT91RM9200 - bool "AT91RM9200" - help - Say Y here if you intend to run this kernel on an Atmel - AT91RM9200-based board. - endchoice source "arch/arm/mach-clps711x/Kconfig" @@ -314,6 +342,8 @@ source "arch/arm/mach-realview/Kconfig" source "arch/arm/mach-at91rm9200/Kconfig" +source "arch/arm/mach-netx/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool @@ -326,6 +356,10 @@ config XSCALE_PMU depends on CPU_XSCALE && !XSCALE_PMU_TIMER default y +if !MMU +source "arch/arm/Kconfig-nommu" +endif + endmenu source "arch/arm/common/Kconfig" @@ -359,7 +393,7 @@ config ISA_DMA_API bool config PCI - bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB + bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside @@ -525,7 +559,7 @@ config LEDS ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ - ARCH_AT91RM9200 + ARCH_AT91RM9200 || MACH_TRIZEPS4 help If you say Y here, the LEDs on your machine will be used to provide useful information about your current system status. @@ -656,7 +690,7 @@ config XIP_PHYS_ADDR endmenu -if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1) +if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP) menu "CPU Frequency scaling" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 6f8e84c1c1f..3345c6d0fd1 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -114,8 +114,10 @@ endif machine-$(CONFIG_ARCH_H720X) := h720x machine-$(CONFIG_ARCH_AAEC2000) := aaec2000 machine-$(CONFIG_ARCH_REALVIEW) := realview - machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200 + machine-$(CONFIG_ARCH_AT91) := at91rm9200 machine-$(CONFIG_ARCH_EP93XX) := ep93xx + machine-$(CONFIG_ARCH_PNX4008) := pnx4008 + machine-$(CONFIG_ARCH_NETX) := netx ifeq ($(CONFIG_ARCH_EBSA110),y) # This is what happens if you forget the IOCS16 line. @@ -175,7 +177,7 @@ boot := arch/arm/boot # them changed. We use .arch to indicate when they were updated # last, otherwise make uses the target directory mtime. -include/asm-arm/.arch: $(wildcard include/config/arch/*.h) include/config/MARKER +include/asm-arm/.arch: $(wildcard include/config/arch/*.h) include/config/auto.conf @echo ' SYMLINK include/asm-arm/arch -> include/asm-arm/$(INCDIR)' ifneq ($(KBUILD_SRC),) $(Q)mkdir -p include/asm-arm diff --git a/arch/arm/boot/compressed/head-at91rm9200.S b/arch/arm/boot/compressed/head-at91rm9200.S index 2119ea62b54..d68b9acd826 100644 --- a/arch/arm/boot/compressed/head-at91rm9200.S +++ b/arch/arm/boot/compressed/head-at91rm9200.S @@ -49,6 +49,24 @@ cmp r7, r3 beq 99f + @ Embest ATEB9200 : 923 + mov r3, #(MACH_TYPE_ATEB9200 & 0xff) + orr r3, r3, #(MACH_TYPE_ATEB9200 & 0xff00) + cmp r7, r3 + beq 99f + + @ Sperry-Sun KAFA : 662 + mov r3, #(MACH_TYPE_KAFA & 0xff) + orr r3, r3, #(MACH_TYPE_KAFA & 0xff00) + cmp r7, r3 + beq 99f + + @ Ajeco 1ARM : 1075 + mov r3, #(MACH_TYPE_ONEARM & 0xff) + orr r3, r3, #(MACH_TYPE_ONEARM & 0xff00) + cmp r7, r3 + beq 99f + @ Unknown board, use the AT91RM9200DK board @ mov r7, #MACH_TYPE_AT91RM9200 mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff) diff --git a/arch/arm/boot/compressed/head-clps7500.S b/arch/arm/boot/compressed/head-clps7500.S index 4a8a689d15e..941c5f5cbac 100644 --- a/arch/arm/boot/compressed/head-clps7500.S +++ b/arch/arm/boot/compressed/head-clps7500.S @@ -4,7 +4,6 @@ * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd */ -#include <linux/config.h> /* There are three different ways the kernel can be booted on a 7500 system: from Angel (loaded in RAM), from diff --git a/arch/arm/boot/compressed/head-l7200.S b/arch/arm/boot/compressed/head-l7200.S index b08bd23f8d1..d0e3b20856c 100644 --- a/arch/arm/boot/compressed/head-l7200.S +++ b/arch/arm/boot/compressed/head-l7200.S @@ -7,7 +7,6 @@ * is merged with head.S by the linker. */ -#include <linux/config.h> #include <asm/mach-types.h> #ifndef CONFIG_ARCH_L7200 diff --git a/arch/arm/boot/compressed/head-sa1100.S b/arch/arm/boot/compressed/head-sa1100.S index 5aefffd4604..4c8c0e46027 100644 --- a/arch/arm/boot/compressed/head-sa1100.S +++ b/arch/arm/boot/compressed/head-sa1100.S @@ -7,7 +7,6 @@ * */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/mach-types.h> diff --git a/arch/arm/boot/compressed/head-sharpsl.S b/arch/arm/boot/compressed/head-sharpsl.S index 59ad69640d6..eb0084ea1ec 100644 --- a/arch/arm/boot/compressed/head-sharpsl.S +++ b/arch/arm/boot/compressed/head-sharpsl.S @@ -12,7 +12,6 @@ * */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/mach-types.h> diff --git a/arch/arm/boot/compressed/head-xscale.S b/arch/arm/boot/compressed/head-xscale.S index d3fe2533907..73c5d9e0201 100644 --- a/arch/arm/boot/compressed/head-xscale.S +++ b/arch/arm/boot/compressed/head-xscale.S @@ -5,7 +5,6 @@ * */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/mach-types.h> diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index b56f5e691d6..14a9ff9c68d 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -8,7 +8,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/linkage.h> /* @@ -448,8 +447,11 @@ __common_mmu_cache_on: mov r1, #-1 mcr p15, 0, r3, c2, c0, 0 @ load page table pointer mcr p15, 0, r1, c3, c0, 0 @ load domain access control - mcr p15, 0, r0, c1, c0, 0 @ load control register - mov pc, lr + b 1f + .align 5 @ cache line aligned +1: mcr p15, 0, r0, c1, c0, 0 @ load control register + mrc p15, 0, r0, c1, c0, 0 @ and read it back to + sub pc, lr, r0, lsr #32 @ properly flush pipeline /* * All code following this line is relocatable. It is relocated by @@ -605,8 +607,8 @@ proc_types: b __armv4_mmu_cache_off b __armv4_mmu_cache_flush - .word 0x00070000 @ ARMv6 - .word 0x000f0000 + .word 0x0007b000 @ ARMv6 + .word 0x0007f000 b __armv4_mmu_cache_on b __armv4_mmu_cache_off b __armv6_mmu_cache_flush diff --git a/arch/arm/boot/compressed/ll_char_wr.S b/arch/arm/boot/compressed/ll_char_wr.S index d7bbd9da2fc..8517c8606b4 100644 --- a/arch/arm/boot/compressed/ll_char_wr.S +++ b/arch/arm/boot/compressed/ll_char_wr.S @@ -77,7 +77,7 @@ Lrow4bpplp: subne r1, r1, #1 ldrneb r7, [r6, r1] bne Lrow4bpplp - LOADREGS(fd, sp!, {r4 - r7, pc}) + ldmfd sp!, {r4 - r7, pc} @ @ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc) @@ -105,7 +105,7 @@ Lrow8bpplp: subne r1, r1, #1 ldrneb r7, [r6, r1] bne Lrow8bpplp - LOADREGS(fd, sp!, {r4 - r7, pc}) + ldmfd sp!, {r4 - r7, pc} @ @ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc) @@ -127,7 +127,7 @@ Lrow1bpp: strb r7, [r0], r5 mov r7, r7, lsr #8 strb r7, [r0], r5 - LOADREGS(fd, sp!, {r4 - r7, pc}) + ldmfd sp!, {r4 - r7, pc} .bss ENTRY(con_charconvtable) diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 847e3e6356c..e1289a256ce 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile @@ -16,3 +16,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o obj-$(CONFIG_SHARPSL_PM) += sharpsl_pm.o obj-$(CONFIG_SHARP_SCOOP) += scoop.o obj-$(CONFIG_ARCH_IXP2000) += uengine.o +obj-$(CONFIG_ARCH_IXP23XX) += uengine.o diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index 7971d0dc689..5b7c26395b4 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c @@ -77,6 +77,8 @@ struct dmabounce_device_info { #endif struct dmabounce_pool small; struct dmabounce_pool large; + + rwlock_t lock; }; static LIST_HEAD(dmabounce_devs); @@ -116,6 +118,7 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr, struct safe_buffer *buf; struct dmabounce_pool *pool; struct device *dev = device_info->dev; + unsigned long flags; dev_dbg(dev, "%s(ptr=%p, size=%d, dir=%d)\n", __func__, ptr, size, dir); @@ -163,8 +166,12 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr, print_alloc_stats(device_info); #endif + write_lock_irqsave(&device_info->lock, flags); + list_add(&buf->node, &device_info->safe_buffers); + write_unlock_irqrestore(&device_info->lock, flags); + return buf; } @@ -172,22 +179,32 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr, static inline struct safe_buffer * find_safe_buffer(struct dmabounce_device_info *device_info, dma_addr_t safe_dma_addr) { - struct safe_buffer *b; + struct safe_buffer *b = NULL; + unsigned long flags; + + read_lock_irqsave(&device_info->lock, flags); list_for_each_entry(b, &device_info->safe_buffers, node) if (b->safe_dma_addr == safe_dma_addr) - return b; + break; - return NULL; + read_unlock_irqrestore(&device_info->lock, flags); + return b; } static inline void free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer *buf) { + unsigned long flags; + dev_dbg(device_info->dev, "%s(buf=%p)\n", __func__, buf); + write_lock_irqsave(&device_info->lock, flags); + list_del(&buf->node); + write_unlock_irqrestore(&device_info->lock, flags); + if (buf->pool) dma_pool_free(buf->pool->pool, buf->safe, buf->safe_dma_addr); else @@ -396,7 +413,6 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, enum dma_data_direction dir) { - unsigned long flags; dma_addr_t dma_addr; dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", @@ -404,12 +420,8 @@ dma_map_single(struct device *dev, void *ptr, size_t size, BUG_ON(dir == DMA_NONE); - local_irq_save(flags); - dma_addr = map_single(dev, ptr, size, dir); - local_irq_restore(flags); - return dma_addr; } @@ -424,25 +436,18 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, enum dma_data_direction dir) { - unsigned long flags; - dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", __func__, (void *) dma_addr, size, dir); BUG_ON(dir == DMA_NONE); - local_irq_save(flags); - unmap_single(dev, dma_addr, size, dir); - - local_irq_restore(flags); } int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir) { - unsigned long flags; int i; dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", @@ -450,8 +455,6 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, BUG_ON(dir == DMA_NONE); - local_irq_save(flags); - for (i = 0; i < nents; i++, sg++) { struct page *page = sg->page; unsigned int offset = sg->offset; @@ -462,8 +465,6 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, map_single(dev, ptr, length, dir); } - local_irq_restore(flags); - return nents; } @@ -471,7 +472,6 @@ void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir) { - unsigned long flags; int i; dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", @@ -479,55 +479,38 @@ dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, BUG_ON(dir == DMA_NONE); - local_irq_save(flags); - for (i = 0; i < nents; i++, sg++) { dma_addr_t dma_addr = sg->dma_address; unsigned int length = sg->length; unmap_single(dev, dma_addr, length, dir); } - - local_irq_restore(flags); } void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_addr, size_t size, enum dma_data_direction dir) { - unsigned long flags; - dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", __func__, (void *) dma_addr, size, dir); - local_irq_save(flags); - sync_single(dev, dma_addr, size, dir); - - local_irq_restore(flags); } void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_addr, size_t size, enum dma_data_direction dir) { - unsigned long flags; - dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", __func__, (void *) dma_addr, size, dir); - local_irq_save(flags); - sync_single(dev, dma_addr, size, dir); - - local_irq_restore(flags); } void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir) { - unsigned long flags; int i; dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", @@ -535,23 +518,18 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, BUG_ON(dir == DMA_NONE); - local_irq_save(flags); - for (i = 0; i < nents; i++, sg++) { dma_addr_t dma_addr = sg->dma_address; unsigned int length = sg->length; sync_single(dev, dma_addr, length, dir); } - - local_irq_restore(flags); } void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir) { - unsigned long flags; int i; dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", @@ -559,16 +537,12 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, BUG_ON(dir == DMA_NONE); - local_irq_save(flags); - for (i = 0; i < nents; i++, sg++) { dma_addr_t dma_addr = sg->dma_address; unsigned int length = sg->length; sync_single(dev, dma_addr, length, dir); } - - local_irq_restore(flags); } static int @@ -622,6 +596,7 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, device_info->dev = dev; INIT_LIST_HEAD(&device_info->safe_buffers); + rwlock_init(&device_info->lock); #ifdef STATS device_info->total_allocs = 0; diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index c02dc8116a1..f3c1ebfdd0a 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -33,6 +33,7 @@ static void __iomem *gic_dist_base; static void __iomem *gic_cpu_base; +static DEFINE_SPINLOCK(irq_controller_lock); /* * Routines to acknowledge, disable and enable interrupts @@ -52,32 +53,45 @@ static void __iomem *gic_cpu_base; static void gic_ack_irq(unsigned int irq) { u32 mask = 1 << (irq % 32); + + spin_lock(&irq_controller_lock); writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4); writel(irq, gic_cpu_base + GIC_CPU_EOI); + spin_unlock(&irq_controller_lock); } static void gic_mask_irq(unsigned int irq) { u32 mask = 1 << (irq % 32); + + spin_lock(&irq_controller_lock); writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4); + spin_unlock(&irq_controller_lock); } static void gic_unmask_irq(unsigned int irq) { u32 mask = 1 << (irq % 32); + + spin_lock(&irq_controller_lock); writel(mask, gic_dist_base + GIC_DIST_ENABLE_SET + (irq / 32) * 4); + spin_unlock(&irq_controller_lock); } #ifdef CONFIG_SMP -static void gic_set_cpu(struct irqdesc *desc, unsigned int irq, unsigned int cpu) +static void gic_set_cpu(unsigned int irq, cpumask_t mask_val) { void __iomem *reg = gic_dist_base + GIC_DIST_TARGET + (irq & ~3); unsigned int shift = (irq % 4) * 8; + unsigned int cpu = first_cpu(mask_val); u32 val; + spin_lock(&irq_controller_lock); + irq_desc[irq].cpu = cpu; val = readl(reg) & ~(0xff << shift); val |= 1 << (cpu + shift); writel(val, reg); + spin_unlock(&irq_controller_lock); } #endif @@ -86,7 +100,7 @@ static struct irqchip gic_chip = { .mask = gic_mask_irq, .unmask = gic_unmask_irq, #ifdef CONFIG_SMP - .set_cpu = gic_set_cpu, + .set_affinity = gic_set_cpu, #endif }; diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index a7dc1370695..fbc3ab0e101 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c @@ -15,7 +15,6 @@ * Based on sa1111.c */ -#include <linux/config.h> #include <linux/module.h> #include <linux/init.h> #include <linux/kernel.h> @@ -629,21 +628,6 @@ static int locomo_resume(struct platform_device *dev) #endif -#define LCM_ALC_EN 0x8000 - -void frontlight_set(struct locomo *lchip, int duty, int vr, int bpwf) -{ - unsigned long flags; - - spin_lock_irqsave(&lchip->lock, flags); - locomo_writel(bpwf, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); - udelay(100); - locomo_writel(duty, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALD); - locomo_writel(bpwf | LCM_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); - spin_unlock_irqrestore(&lchip->lock, flags); -} - - /** * locomo_probe - probe for a single LoCoMo chip. * @phys_addr: physical address of device. @@ -698,14 +682,10 @@ __locomo_probe(struct device *me, struct resource *mem, int irq) , lchip->base + LOCOMO_GPD); locomo_writel(0, lchip->base + LOCOMO_GIE); - /* FrontLight */ + /* Frontlight */ locomo_writel(0, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); locomo_writel(0, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALD); - /* Same constants can be used for collie and poodle - (depending on CONFIG options in original sharp code)? */ - frontlight_set(lchip, 163, 0, 148); - /* Longtime timer */ locomo_writel(0, lchip->base + LOCOMO_LTINT); /* SPI */ @@ -1063,6 +1043,30 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int } /* + * Frontlight control + */ + +static struct locomo *locomo_chip_driver(struct locomo_dev *ldev); + +void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf) +{ + unsigned long flags; + struct locomo *lchip = locomo_chip_driver(dev); + + if (vr) + locomo_gpio_write(dev, LOCOMO_GPIO_FL_VR, 1); + else + locomo_gpio_write(dev, LOCOMO_GPIO_FL_VR, 0); + + spin_lock_irqsave(&lchip->lock, flags); + locomo_writel(bpwf, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); + udelay(100); + locomo_writel(duty, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALD); + locomo_writel(bpwf | LOCOMO_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); + spin_unlock_irqrestore(&lchip->lock, flags); +} + +/* * LoCoMo "Register Access Bus." * * We model this as a regular bus type, and hang devices directly diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 3f68db84e5e..1cdb26a47e1 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c @@ -14,7 +14,6 @@ * All initialization functions provided here are intended to be called * from machine specific code with proper arguments when required. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/init.h> #include <linux/kernel.h> @@ -151,7 +150,7 @@ static void sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) { unsigned int stat0, stat1, i; - void __iomem *base = desc->data; + void __iomem *base = get_irq_data(irq); stat0 = sa1111_readl(base + SA1111_INTSTATCLR0); stat1 = sa1111_readl(base + SA1111_INTSTATCLR1); @@ -169,11 +168,11 @@ sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) if (stat0 & 1) - do_edge_IRQ(i, irq_desc + i, regs); + handle_edge_irq(i, irq_desc + i, regs); for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) if (stat1 & 1) - do_edge_IRQ(i, irq_desc + i, regs); + handle_edge_irq(i, irq_desc + i, regs); /* For level-based interrupts */ desc->chip->unmask(irq); diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c index 3cd8c9ee451..045e37e0733 100644 --- a/arch/arm/common/sharpsl_pm.c +++ b/arch/arm/common/sharpsl_pm.c @@ -49,13 +49,6 @@ #define SHARPSL_CHARGE_CO_CHECK_TIME 5 /* 5 msec */ #define SHARPSL_CHARGE_RETRY_CNT 1 /* eqv. 10 min */ -#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ -#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ -#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */ -#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */ -#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */ -#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */ - /* * Prototypes */ @@ -82,12 +75,13 @@ DEFINE_LED_TRIGGER(sharpsl_charge_led_trigger); static int get_percentage(int voltage) { int i = sharpsl_pm.machinfo->bat_levels - 1; + int bl_status = sharpsl_pm.machinfo->backlight_get_status ? sharpsl_pm.machinfo->backlight_get_status() : 0; struct battery_thresh *thresh; if (sharpsl_pm.charge_mode == CHRG_ON) - thresh=sharpsl_pm.machinfo->bat_levels_acin; + thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_acin_bl : sharpsl_pm.machinfo->bat_levels_acin; else - thresh=sharpsl_pm.machinfo->bat_levels_noac; + thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_noac_bl : sharpsl_pm.machinfo->bat_levels_noac; while (i > 0 && (voltage > thresh[i].voltage)) i--; @@ -131,7 +125,7 @@ static void sharpsl_battery_thread(void *private_) sharpsl_pm.battstat.ac_status = (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN) ? APM_AC_ONLINE : APM_AC_OFFLINE); /* Corgi cannot confirm when battery fully charged so periodically kick! */ - if (machine_is_corgi() && (sharpsl_pm.charge_mode == CHRG_ON) + if (!sharpsl_pm.machinfo->batfull_irq && (sharpsl_pm.charge_mode == CHRG_ON) && time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_ON_TIME_INTERVAL)) schedule_work(&toggle_charger); @@ -166,11 +160,11 @@ static void sharpsl_battery_thread(void *private_) && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) || (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) { if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) { - corgibl_limit_intensity(1); + sharpsl_pm.machinfo->backlight_limit(1); sharpsl_pm.flags |= SHARPSL_BL_LIMIT; } } else if (sharpsl_pm.flags & SHARPSL_BL_LIMIT) { - corgibl_limit_intensity(0); + sharpsl_pm.machinfo->backlight_limit(0); sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT; } @@ -418,7 +412,7 @@ static int sharpsl_check_battery_temp(void) val = get_select_val(buff); dev_dbg(sharpsl_pm.dev, "Temperature: %d\n", val); - if (val > SHARPSL_CHARGE_ON_TEMP) + if (val > sharpsl_pm.machinfo->charge_on_temp) return -1; return 0; @@ -450,7 +444,7 @@ static int sharpsl_check_battery_voltage(void) val = get_select_val(buff); dev_dbg(sharpsl_pm.dev, "Battery Voltage: %d\n", val); - if (val < SHARPSL_CHARGE_ON_VOLT) + if (val < sharpsl_pm.machinfo->charge_on_volt) return -1; return 0; @@ -468,7 +462,7 @@ static int sharpsl_ac_check(void) temp = get_select_val(buff); dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n",temp); - if ((temp > SHARPSL_CHARGE_ON_ACIN_HIGH) || (temp < SHARPSL_CHARGE_ON_ACIN_LOW)) { + if ((temp > sharpsl_pm.machinfo->charge_acin_high) || (temp < sharpsl_pm.machinfo->charge_acin_low)) { dev_err(sharpsl_pm.dev, "Error: AC check failed.\n"); return -1; } @@ -627,8 +621,8 @@ static int sharpsl_fatal_check(void) temp = get_select_val(buff); dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %d\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT)); - if ((acin && (temp < SHARPSL_FATAL_ACIN_VOLT)) || - (!acin && (temp < SHARPSL_FATAL_NOACIN_VOLT))) + if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) || + (!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt))) return -1; return 0; } diff --git a/arch/arm/common/time-acorn.c b/arch/arm/common/time-acorn.c index 486add853fb..3f60dd9aca8 100644 --- a/arch/arm/common/time-acorn.c +++ b/arch/arm/common/time-acorn.c @@ -16,6 +16,7 @@ #include <linux/timex.h> #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <asm/hardware.h> #include <asm/io.h> @@ -76,7 +77,7 @@ ioc_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction ioc_timer_irq = { .name = "timer", - .flags = SA_INTERRUPT, + .flags = IRQF_DISABLED, .handler = ioc_timer_interrupt }; diff --git a/arch/arm/common/uengine.c b/arch/arm/common/uengine.c index a1310b71004..95c8508c29b 100644 --- a/arch/arm/common/uengine.c +++ b/arch/arm/common/uengine.c @@ -11,17 +11,32 @@ * License, or (at your option) any later version. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/module.h> #include <linux/string.h> #include <asm/hardware.h> -#include <asm/arch/ixp2000-regs.h> +#include <asm/arch/hardware.h> #include <asm/hardware/uengine.h> #include <asm/io.h> +#if defined(CONFIG_ARCH_IXP2000) +#define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE +#define IXP_PRODUCT_ID IXP2000_PRODUCT_ID +#define IXP_MISC_CONTROL IXP2000_MISC_CONTROL +#define IXP_RESET1 IXP2000_RESET1 +#else +#if defined(CONFIG_ARCH_IXP23XX) +#define IXP_UENGINE_CSR_VIRT_BASE IXP23XX_UENGINE_CSR_VIRT_BASE +#define IXP_PRODUCT_ID IXP23XX_PRODUCT_ID +#define IXP_MISC_CONTROL IXP23XX_MISC_CONTROL +#define IXP_RESET1 IXP23XX_RESET1 +#else +#error unknown platform +#endif +#endif + #define USTORE_ADDRESS 0x000 #define USTORE_DATA_LOWER 0x004 #define USTORE_DATA_UPPER 0x008 @@ -43,7 +58,7 @@ u32 ixp2000_uengine_mask; static void *ixp2000_uengine_csr_area(int uengine) { - return ((void *)IXP2000_UENGINE_CSR_VIRT_BASE) + (uengine << 10); + return ((void *)IXP_UENGINE_CSR_VIRT_BASE) + (uengine << 10); } /* @@ -91,8 +106,13 @@ EXPORT_SYMBOL(ixp2000_uengine_csr_write); void ixp2000_uengine_reset(u32 uengine_mask) { - ixp2000_reg_wrb(IXP2000_RESET1, uengine_mask & ixp2000_uengine_mask); - ixp2000_reg_wrb(IXP2000_RESET1, 0); + u32 value; + + value = ixp2000_reg_read(IXP_RESET1) & ~ixp2000_uengine_mask; + + uengine_mask &= ixp2000_uengine_mask; + ixp2000_reg_wrb(IXP_RESET1, value | uengine_mask); + ixp2000_reg_wrb(IXP_RESET1, value); } EXPORT_SYMBOL(ixp2000_uengine_reset); @@ -235,11 +255,12 @@ static int check_ixp_type(struct ixp2000_uengine_code *c) u32 product_id; u32 rev; - product_id = ixp2000_reg_read(IXP2000_PRODUCT_ID); + product_id = ixp2000_reg_read(IXP_PRODUCT_ID); if (((product_id >> 16) & 0x1f) != 0) return 0; switch ((product_id >> 8) & 0xff) { +#ifdef CONFIG_ARCH_IXP2000 case 0: /* IXP2800 */ if (!(c->cpu_model_bitmask & 4)) return 0; @@ -254,6 +275,14 @@ static int check_ixp_type(struct ixp2000_uengine_code *c) if (!(c->cpu_model_bitmask & 2)) return 0; break; +#endif + +#ifdef CONFIG_ARCH_IXP23XX + case 4: /* IXP23xx */ + if (!(c->cpu_model_bitmask & 0x3f0)) + return 0; + break; +#endif default: return 0; @@ -432,7 +461,8 @@ static int __init ixp2000_uengine_init(void) /* * Determine number of microengines present. */ - switch ((ixp2000_reg_read(IXP2000_PRODUCT_ID) >> 8) & 0x1fff) { + switch ((ixp2000_reg_read(IXP_PRODUCT_ID) >> 8) & 0x1fff) { +#ifdef CONFIG_ARCH_IXP2000 case 0: /* IXP2800 */ case 1: /* IXP2850 */ ixp2000_uengine_mask = 0x00ff00ff; @@ -441,10 +471,17 @@ static int __init ixp2000_uengine_init(void) case 2: /* IXP2400 */ ixp2000_uengine_mask = 0x000f000f; break; +#endif + +#ifdef CONFIG_ARCH_IXP23XX + case 4: /* IXP23xx */ + ixp2000_uengine_mask = (*IXP23XX_EXP_CFG_FUSE >> 8) & 0xf; + break; +#endif default: printk(KERN_INFO "Detected unknown IXP2000 model (%.8x)\n", - (unsigned int)ixp2000_reg_read(IXP2000_PRODUCT_ID)); + (unsigned int)ixp2000_reg_read(IXP_PRODUCT_ID)); ixp2000_uengine_mask = 0x00000000; break; } @@ -457,15 +494,15 @@ static int __init ixp2000_uengine_init(void) /* * Synchronise timestamp counters across all microengines. */ - value = ixp2000_reg_read(IXP2000_MISC_CONTROL); - ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value & ~0x80); + value = ixp2000_reg_read(IXP_MISC_CONTROL); + ixp2000_reg_wrb(IXP_MISC_CONTROL, value & ~0x80); for (uengine = 0; uengine < 32; uengine++) { if (ixp2000_uengine_mask & (1 << uengine)) { ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0); ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0); } } - ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value | 0x80); + ixp2000_reg_wrb(IXP_MISC_CONTROL, value | 0x80); return 0; } diff --git a/arch/arm/common/via82c505.c b/arch/arm/common/via82c505.c index ef716a5b07a..ba2e62986a5 100644 --- a/arch/arm/common/via82c505.c +++ b/arch/arm/common/via82c505.c @@ -1,4 +1,3 @@ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/pci.h> #include <linux/ptrace.h> diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig index 9e1c1cceb73..4f3d8d37741 100644 --- a/arch/arm/configs/at91rm9200dk_defconfig +++ b/arch/arm/configs/at91rm9200dk_defconfig @@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_IMX is not set # CONFIG_ARCH_H720X is not set # CONFIG_ARCH_AAEC2000 is not set +CONFIG_ARCH_AT91=y CONFIG_ARCH_AT91RM9200=y # diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig index 6e0805a971d..08b5dc38876 100644 --- a/arch/arm/configs/at91rm9200ek_defconfig +++ b/arch/arm/configs/at91rm9200ek_defconfig @@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_IMX is not set # CONFIG_ARCH_H720X is not set # CONFIG_ARCH_AAEC2000 is not set +CONFIG_ARCH_AT91=y CONFIG_ARCH_AT91RM9200=y # diff --git a/arch/arm/configs/ateb9200_defconfig b/arch/arm/configs/ateb9200_defconfig new file mode 100644 index 00000000000..bee7813d040 --- /dev/null +++ b/arch/arm/configs/ateb9200_defconfig @@ -0,0 +1,1313 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.17-rc3 +# Sun May 7 16:53:18 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_VECTORS_BASE=0xffff0000 + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +# CONFIG_BLK_DEV_IO_TRACE is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set +CONFIG_ARCH_AT91=y +CONFIG_ARCH_AT91RM9200=y + +# +# AT91RM9200 Implementations +# + +# +# AT91RM9200 Board Type +# +# CONFIG_ARCH_AT91RM9200DK is not set +# CONFIG_MACH_AT91RM9200EK is not set +# CONFIG_MACH_CSB337 is not set +# CONFIG_MACH_CSB637 is not set +# CONFIG_MACH_CARMEVA is not set +# CONFIG_MACH_KB9200 is not set +CONFIG_MACH_ATEB9200=y +# CONFIG_MACH_KAFA is not set + +# +# AT91 Feature Selections +# +# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM920T=y +CONFIG_CPU_32v4=y +CONFIG_CPU_ABRT_EV4T=y +CONFIG_CPU_CACHE_V4WT=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +CONFIG_PCCARD=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=m +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# +CONFIG_AT91_CF=m + +# +# Kernel Features +# +CONFIG_PREEMPT=y +CONFIG_NO_IDLE_HZ=y +CONFIG_HZ=100 +# CONFIG_AEABI is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +CONFIG_PM=y +CONFIG_PM_LEGACY=y +# CONFIG_PM_DEBUG is not set +# CONFIG_APM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +CONFIG_NET_KEY=y +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_BRIDGE=m +CONFIG_VLAN_8021Q=m +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=m +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +# CONFIG_IEEE80211_SOFTMAC is not set +CONFIG_WIRELESS_EXT=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +# CONFIG_MTD_BLOCK is not set +CONFIG_MTD_BLOCK_RO=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_AT91_DATAFLASH=y +# CONFIG_MTD_AT91_DATAFLASH_CARD is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=m +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_DEBUG is not set + +# +# PCMCIA SCSI adapter support +# +# CONFIG_PCMCIA_AHA152X is not set +# CONFIG_PCMCIA_FDOMAIN is not set +# CONFIG_PCMCIA_NINJA_SCSI is not set +# CONFIG_PCMCIA_QLOGIC is not set +# CONFIG_PCMCIA_SYM53C500 is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +CONFIG_DUMMY=m +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m + +# +# PHY device support +# +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +CONFIG_DAVICOM_PHY=y +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_ARM_AT91_ETHER=y +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y +# CONFIG_NET_WIRELESS_RTNETLINK is not set + +# +# Obsolete Wireless cards support (pre-802.11) +# +# CONFIG_STRIP is not set +# CONFIG_PCMCIA_WAVELAN is not set +# CONFIG_PCMCIA_NETWAVE is not set + +# +# Wireless 802.11 Frequency Hopping cards support +# +# CONFIG_PCMCIA_RAYCS is not set + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set + +# +# Wireless 802.11b Pcmcia/Cardbus cards support +# +# CONFIG_AIRO_CS is not set +# CONFIG_PCMCIA_WL3501 is not set +# CONFIG_HOSTAP is not set +CONFIG_NET_WIRELESS=y + +# +# PCMCIA network device support +# +# CONFIG_NET_PCMCIA is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +CONFIG_PPP=m +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +# CONFIG_PPP_MPPE is not set +CONFIG_PPPOE=m +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_AT91=y +CONFIG_SERIAL_AT91_CONSOLE=y +# CONFIG_SERIAL_AT91_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set +CONFIG_AT91_SPI=y +CONFIG_AT91_SPIDEV=y + +# +# I2C support +# +CONFIG_I2C=m +CONFIG_I2C_CHARDEV=m + +# +# I2C Algorithms +# +CONFIG_I2C_ALGOBIT=m +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m + +# +# I2C Hardware Bus support +# +CONFIG_I2C_AT91=m +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +# CONFIG_SND is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_DPCM=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +CONFIG_USB_HIDINPUT=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +CONFIG_HID_FF=y +CONFIG_HID_PID=y +CONFIG_LOGITECH_FF=y +CONFIG_THRUSTMASTER_FF=y +CONFIG_USB_HIDDEV=y + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_CDCETHER=y +CONFIG_USB_NET_GL620A=y +CONFIG_USB_NET_NET1080=y +CONFIG_USB_NET_PLUSB=y +CONFIG_USB_NET_RNDIS_HOST=y +CONFIG_USB_NET_CDC_SUBSET=y +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_NET_ZAURUS=y +# CONFIG_USB_ZD1201 is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_AIRPRIME is not set +# CONFIG_USB_SERIAL_ANYDATA is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +CONFIG_USB_SERIAL_CP2101=m +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=m +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=m +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGETKIT is not set +# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +CONFIG_USB_GADGET_AT91=y +CONFIG_USB_AT91=m +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m + +# +# MMC/SD Card support +# +CONFIG_MMC=m +CONFIG_MMC_DEBUG=y +CONFIG_MMC_BLOCK=m +CONFIG_MMC_AT91RM9200=m + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y + +# +# RTC drivers +# +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_AT91=y +# CONFIG_RTC_DRV_TEST is not set + +# +# File systems +# +CONFIG_EXT2_FS=m +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=m +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_JBD=m +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=m +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_ZISOFS_FS=m +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=m +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_RW=y + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=m +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_DIRECTIO=y +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_NFSD_TCP=y +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_RPCSEC_GSS_KRB5=m +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=m +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +CONFIG_NLS_CODEPAGE_932=m +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=m +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m + +# +# Profiling support +# +CONFIG_PROFILING=y +CONFIG_OPROFILE=m + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_FS is not set +CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_CRC_CCITT=m +CONFIG_CRC16=m +CONFIG_CRC32=y +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m diff --git a/arch/arm/configs/carmeva_defconfig b/arch/arm/configs/carmeva_defconfig new file mode 100644 index 00000000000..8a075c8ecc6 --- /dev/null +++ b/arch/arm/configs/carmeva_defconfig @@ -0,0 +1,724 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.12-rc4 +# Tue Jun 14 12:05:24 2005 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_IOMAP=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_SWAP=y +# CONFIG_SYSVIPC is not set +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_SYSCTL is not set +# CONFIG_AUDIT is not set +# CONFIG_HOTPLUG is not set +CONFIG_KOBJECT_UEVENT=y +# CONFIG_IKCONFIG is not set +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SHMEM=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +CONFIG_ARCH_AT91=y +CONFIG_ARCH_AT91RM9200=y + +# +# AT91RM9200 Implementations +# +# CONFIG_ARCH_AT91RM9200DK is not set +# CONFIG_MACH_AT91RM9200EK is not set +# CONFIG_MACH_CSB337 is not set +# CONFIG_MACH_CSB637 is not set +CONFIG_MACH_CARMEVA=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM920T=y +CONFIG_CPU_32v4=y +CONFIG_CPU_ABRT_EV4T=y +CONFIG_CPU_CACHE_V4WT=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set + +# +# Bus support +# +CONFIG_ISA_DMA_API=y + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_SMP is not set +# CONFIG_PREEMPT is not set +# CONFIG_DISCONTIGMEM is not set +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_AT91_DATAFLASH=y +# CONFIG_MTD_AT91_DATAFLASH_CARD is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_ATA_OVER_ETH is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_PACKET is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_IP_TCPDIAG=y +# CONFIG_IP_TCPDIAG_IPV6 is not set +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_ARM_AT91_ETHER=y +CONFIG_ARM_AT91_ETHER_RMII=y +# CONFIG_SMC91X is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=m +CONFIG_SERIO_SERPORT=m +# CONFIG_SERIO_LIBPS2 is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_AT91=y +CONFIG_SERIAL_AT91_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_AT91_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +CONFIG_AT91_SPI=y +CONFIG_AT91_SPIDEV=y + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB is not set + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +CONFIG_MMC=m +CONFIG_MMC_DEBUG=y +CONFIG_MMC_BLOCK=m +CONFIG_MMC_AT91RM9200=m + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +# CONFIG_EXT2_FS_POSIX_ACL is not set +# CONFIG_EXT2_FS_SECURITY is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set + +# +# XFS support +# +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_QUOTA is not set +# CONFIG_DNOTIFY is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +# CONFIG_DEVFS_FS is not set +CONFIG_DEVPTS_FS_XATTR=y +CONFIG_DEVPTS_FS_SECURITY=y +# CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS_FS=y +CONFIG_JFFS_FS_VERBOSE=0 +CONFIG_JFFS_PROC_FS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_NAND=y +# CONFIG_JFFS2_FS_NOR_ECC is not set +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=y +# CONFIG_NFSD_V3 is not set +CONFIG_NFSD_TCP=y +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff --git a/arch/arm/configs/csb337_defconfig b/arch/arm/configs/csb337_defconfig index 94bd9932a40..3594155a813 100644 --- a/arch/arm/configs/csb337_defconfig +++ b/arch/arm/configs/csb337_defconfig @@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_IMX is not set # CONFIG_ARCH_H720X is not set # CONFIG_ARCH_AAEC2000 is not set +CONFIG_ARCH_AT91=y CONFIG_ARCH_AT91RM9200=y # diff --git a/arch/arm/configs/csb637_defconfig b/arch/arm/configs/csb637_defconfig index 1519124c550..640d70c1f06 100644 --- a/arch/arm/configs/csb637_defconfig +++ b/arch/arm/configs/csb637_defconfig @@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_IMX is not set # CONFIG_ARCH_H720X is not set # CONFIG_ARCH_AAEC2000 is not set +CONFIG_ARCH_AT91=y CONFIG_ARCH_AT91RM9200=y # diff --git a/arch/arm/configs/kafa_defconfig b/arch/arm/configs/kafa_defconfig new file mode 100644 index 00000000000..1db633e2c94 --- /dev/null +++ b/arch/arm/configs/kafa_defconfig @@ -0,0 +1,885 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.17-rc3 +# Sun May 7 16:54:53 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_VECTORS_BASE=0xffff0000 + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set + +# +# Block layer +# +# CONFIG_BLK_DEV_IO_TRACE is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +CONFIG_IOSCHED_DEADLINE=y +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +CONFIG_DEFAULT_DEADLINE=y +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="deadline" + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set +CONFIG_ARCH_AT91=y +CONFIG_ARCH_AT91RM9200=y + +# +# AT91RM9200 Implementations +# + +# +# AT91RM9200 Board Type +# +# CONFIG_ARCH_AT91RM9200DK is not set +# CONFIG_MACH_AT91RM9200EK is not set +# CONFIG_MACH_CSB337 is not set +# CONFIG_MACH_CSB637 is not set +# CONFIG_MACH_CARMEVA is not set +# CONFIG_MACH_KB9200 is not set +# CONFIG_MACH_ATEB9200 is not set +CONFIG_MACH_KAFA=y + +# +# AT91 Feature Selections +# +# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM920T=y +CONFIG_CPU_32v4=y +CONFIG_CPU_ABRT_EV4T=y +CONFIG_CPU_CACHE_V4WT=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_PREEMPT=y +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +CONFIG_LEDS=y +# CONFIG_LEDS_TIMER is not set +CONFIG_LEDS_CPU=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20800000,10M root=/dev/ram0 rw" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=y +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set +# CONFIG_APM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +# CONFIG_MTD_BLOCK is not set +CONFIG_MTD_BLOCK_RO=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_AT91_DATAFLASH=y +# CONFIG_MTD_AT91_DATAFLASH_CARD is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +CONFIG_DAVICOM_PHY=y +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_ARM_AT91_ETHER=y +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_AT91=y +CONFIG_SERIAL_AT91_CONSOLE=y +# CONFIG_SERIAL_AT91_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=32 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_AT91_WATCHDOG=y +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set +CONFIG_AT91_SPI=y +CONFIG_AT91_SPIDEV=y + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +CONFIG_I2C_AT91=y +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set + +# +# Misc devices +# + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y + +# +# RTC drivers +# +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_AT91=y +# CONFIG_RTC_DRV_TEST is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_INOTIFY is not set +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=m +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=m +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_FS is not set +CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y diff --git a/arch/arm/configs/kb9202_defconfig b/arch/arm/configs/kb9202_defconfig new file mode 100644 index 00000000000..45396e08719 --- /dev/null +++ b/arch/arm/configs/kb9202_defconfig @@ -0,0 +1,781 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.13-rc2 +# Sun Aug 14 19:26:59 2005 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y + +# +# Code maturity level options +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +# CONFIG_SWAP is not set +# CONFIG_SYSVIPC is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_HOTPLUG=y +# CONFIG_KOBJECT_UEVENT is not set +# CONFIG_IKCONFIG is not set +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SHMEM=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set +CONFIG_ARCH_AT91=y +CONFIG_ARCH_AT91RM9200=y + +# +# AT91RM9200 Implementations +# +# CONFIG_ARCH_AT91RM9200DK is not set +# CONFIG_MACH_AT91RM9200EK is not set +# CONFIG_MACH_CSB337 is not set +# CONFIG_MACH_CSB637 is not set +# CONFIG_MACH_CARMEVA is not set +CONFIG_MACH_KB9200=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM920T=y +CONFIG_CPU_32v4=y +CONFIG_CPU_ABRT_EV4T=y +CONFIG_CPU_CACHE_V4WT=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set + +# +# Bus support +# +CONFIG_ISA_DMA_API=y + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_NO_IDLE_HZ is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x10000000 +CONFIG_ZBOOT_ROM_BSS=0x20040000 +CONFIG_ZBOOT_ROM=y +CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram rw initrd=0x20210000,654933" + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_AOUT=y +CONFIG_BINFMT_MISC=y +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +CONFIG_DEBUG_DRIVER=y + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +CONFIG_BLK_DEV_NBD=y +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_ATA_OVER_ETH is not set + +# +# SCSI device support +# +CONFIG_SCSI=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_IP_TCPDIAG is not set +# CONFIG_IP_TCPDIAG_IPV6 is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_ARM_AT91_ETHER=y +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_AT91=y +CONFIG_SERIAL_AT91_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_AT91_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_AT91_SPI is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB=y +CONFIG_USB_DEBUG=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_BLUETOOTH_TTY is not set +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE_DEBUG=y +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_DPCM is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_MTOUCH is not set +# CONFIG_USB_ITMTOUCH is not set +# CONFIG_USB_EGALAX is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MICROTEK is not set + +# +# USB Multimedia devices +# +# CONFIG_USB_DABUSB is not set + +# +# Video4Linux support is needed for USB Multimedia device support +# + +# +# USB Network Adapters +# +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGETKIT is not set +# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_IDMOUSE is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +# CONFIG_EXT2_FS_POSIX_ACL is not set +# CONFIG_EXT2_FS_SECURITY is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set + +# +# XFS support +# +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +CONFIG_AUTOFS_FS=y +CONFIG_AUTOFS4_FS=y + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_DEVPTS_FS_XATTR=y +# CONFIG_DEVPTS_FS_SECURITY is not set +CONFIG_TMPFS=y +# CONFIG_TMPFS_XATTR is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_HFSPLUS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_FS is not set +CONFIG_FRAME_POINTER=y +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_WAITQ is not set +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set diff --git a/arch/arm/configs/lpd270_defconfig b/arch/arm/configs/lpd270_defconfig new file mode 100644 index 00000000000..d08bbe59483 --- /dev/null +++ b/arch/arm/configs/lpd270_defconfig @@ -0,0 +1,963 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.17-git2 +# Wed Jun 21 22:20:18 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +# CONFIG_MODULE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set + +# +# Block layer +# +# CONFIG_BLK_DEV_IO_TRACE is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91RM9200 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set + +# +# Intel PXA2xx Implementations +# +# CONFIG_ARCH_LUBBOCK is not set +CONFIG_MACH_LOGICPD_PXA270=y +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +CONFIG_PXA27x=y +CONFIG_IWMMXT=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +CONFIG_XSCALE_PMU=y + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_PREEMPT is not set +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +# CONFIG_APM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +# CONFIG_PACKET is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +# CONFIG_MTD_CFI_I1 is not set +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +# CONFIG_IDEDISK_MULTI_MODE is not set +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_IDE_TASK_IOCTL is not set + +# +# IDE chipset support/bugfixes +# +# CONFIG_IDE_GENERIC is not set +# CONFIG_IDE_ARM is not set +# CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_SMC91X=y +# CONFIG_DM9000 is not set +# CONFIG_SMC911X is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_V4L2=y + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +CONFIG_FB=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_MACMODES is not set +CONFIG_FB_FIRMWARE_EDID=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +# CONFIG_FB_PXA_PARAMETERS is not set +# CONFIG_FB_VIRTUAL is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y + +# +# Logo configuration +# +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +# CONFIG_SND_SUPPORT_OLD_API is not set +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +CONFIG_SND_AC97_CODEC=y +CONFIG_SND_AC97_BUS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +CONFIG_SND_PXA2XX_PCM=y +CONFIG_SND_PXA2XX_AC97=y + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +# CONFIG_VFAT_FS is not set +CONFIG_FAT_DEFAULT_CODEPAGE=437 +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +# CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set +CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_WAITQ is not set +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff --git a/arch/arm/configs/lpd7a400_defconfig b/arch/arm/configs/lpd7a400_defconfig index 67eaa26c264..bf9cf9c6d2d 100644 --- a/arch/arm/configs/lpd7a400_defconfig +++ b/arch/arm/configs/lpd7a400_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.12-rc1-bk2 -# Mon Mar 28 00:06:33 2005 +# Linux kernel version: 2.6.12 +# Thu Nov 3 14:15:32 2005 # CONFIG_ARM=y CONFIG_MMU=y @@ -17,6 +17,7 @@ CONFIG_EXPERIMENTAL=y CONFIG_CLEAN_COMPILE=y CONFIG_BROKEN_ON_SMP=y CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 # # General setup @@ -36,6 +37,8 @@ CONFIG_EMBEDDED=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y # CONFIG_EPOLL is not set @@ -71,6 +74,7 @@ CONFIG_BASE_SMALL=0 # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set # CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7952X is not set CONFIG_ARCH_LH7A40X=y # CONFIG_ARCH_OMAP is not set # CONFIG_ARCH_VERSATILE is not set @@ -84,6 +88,7 @@ CONFIG_ARCH_LH7A40X=y CONFIG_MACH_LPD7A400=y # CONFIG_MACH_LPD7A404 is not set CONFIG_ARCH_LH7A400=y +CONFIG_LPD7A40X_CPLD_SSP=y # CONFIG_LH7A40X_CONTIGMEM is not set # CONFIG_LH7A40X_ONE_BANK_PER_NODE is not set @@ -110,6 +115,8 @@ CONFIG_ARM_THUMB=y # # Bus support # +CONFIG_ARM_AMBA=y +CONFIG_ISA_DMA_API=y # # PCCARD (PCMCIA/CardBus) support @@ -119,6 +126,7 @@ CONFIG_ARM_THUMB=y # # Kernel Features # +# CONFIG_SMP is not set CONFIG_PREEMPT=y CONFIG_DISCONTIGMEM=y CONFIG_ALIGNMENT_TRAP=y @@ -175,7 +183,7 @@ CONFIG_MTD=y # CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_AFS_PARTS is not set # @@ -217,7 +225,10 @@ CONFIG_MTD_CFI_UTIL=y # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x00000000 +CONFIG_MTD_PHYSMAP_LEN=0x04000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=4 # CONFIG_MTD_ARM_INTEGRATOR is not set # CONFIG_MTD_EDB7312 is not set @@ -254,7 +265,6 @@ CONFIG_MTD_CFI_UTIL=y # # Block devices # -# CONFIG_BLK_DEV_FD is not set # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set @@ -288,13 +298,15 @@ CONFIG_BLK_DEV_IDEDISK=y # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_BLK_DEV_IDESCSI is not set # CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_POLL=y # # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y -# CONFIG_IDE_ARM is not set +CONFIG_IDE_ARM=y # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -302,7 +314,37 @@ CONFIG_IDE_GENERIC=y # # SCSI device support # -# CONFIG_SCSI is not set +CONFIG_SCSI=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +# CONFIG_BLK_DEV_SD is not set +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_DEBUG is not set # # Multi-device support (RAID and LVM) @@ -331,7 +373,6 @@ CONFIG_NET=y # CONFIG_PACKET=y # CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set CONFIG_UNIX=y # CONFIG_NET_KEY is not set CONFIG_INET=y @@ -438,13 +479,10 @@ CONFIG_INPUT=y # # Userland interfaces # -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set +CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set # @@ -453,7 +491,13 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_ADS7843_LH7=y +CONFIG_HAS_TOUCHSCREEN_ADS7843_LH7=y # CONFIG_INPUT_MISC is not set # @@ -461,7 +505,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # # CONFIG_SERIO is not set # CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y # # Character devices @@ -479,6 +522,8 @@ CONFIG_HW_CONSOLE=y # # Non-8250 serial port support # +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_LH7A40X=y @@ -510,7 +555,6 @@ CONFIG_RTC=y # # TPM devices # -# CONFIG_TCG_TPM is not set # # I2C support @@ -534,18 +578,73 @@ CONFIG_RTC=y # # Graphics support # -# CONFIG_FB is not set +CONFIG_FB=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SOFT_CURSOR=y +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set +CONFIG_FB_ARMCLCD=y +CONFIG_FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT=y +# CONFIG_FB_ARMCLCD_SHARP_LQ057Q3DC02 is not set +# CONFIG_FB_ARMCLCD_SHARP_LQ64D343 is not set +# CONFIG_FB_ARMCLCD_SHARP_LQ10D368 is not set +# CONFIG_FB_ARMCLCD_SHARP_LQ121S1DG41 is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set # # Console display driver support # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE is not set + +# +# Logo configuration +# +# CONFIG_LOGO is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound # -# CONFIG_SOUND is not set +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +# CONFIG_SND_RTCTIMER is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_AC97_CODEC=y + +# +# ALSA ARM devices +# +CONFIG_SND_LH7A40X_AC97=y + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set # # USB support diff --git a/arch/arm/configs/lpd7a404_defconfig b/arch/arm/configs/lpd7a404_defconfig index 208d591ebfc..3a57be32e84 100644 --- a/arch/arm/configs/lpd7a404_defconfig +++ b/arch/arm/configs/lpd7a404_defconfig @@ -1,52 +1,58 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.12-rc1-bk2 -# Mon Mar 28 00:14:08 2005 +# Linux kernel version: 2.6.16 +# Thu Mar 23 17:50:31 2006 # CONFIG_ARM=y CONFIG_MMU=y -CONFIG_UID16=y CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_IOMAP=y # # Code maturity level options # CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y CONFIG_BROKEN_ON_SMP=y CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 # # General setup # CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y # CONFIG_SWAP is not set CONFIG_SYSVIPC=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y # CONFIG_AUDIT is not set -# CONFIG_HOTPLUG is not set -CONFIG_KOBJECT_UEVENT=y CONFIG_IKCONFIG=y # CONFIG_IKCONFIG_PROC is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_EMBEDDED=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set +# CONFIG_HOTPLUG is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y # CONFIG_EPOLL is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SHMEM=y CONFIG_CC_ALIGN_FUNCTIONS=0 CONFIG_CC_ALIGN_LABELS=0 CONFIG_CC_ALIGN_LOOPS=0 CONFIG_CC_ALIGN_JUMPS=0 +CONFIG_SLAB=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set +CONFIG_OBSOLETE_INTERMODULE=y # # Loadable module support @@ -54,6 +60,23 @@ CONFIG_BASE_SMALL=0 # CONFIG_MODULES is not set # +# Block layer +# + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" + +# # System Type # # CONFIG_ARCH_CLPS7500 is not set @@ -71,11 +94,15 @@ CONFIG_BASE_SMALL=0 # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set # CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7952X is not set CONFIG_ARCH_LH7A40X=y # CONFIG_ARCH_OMAP is not set # CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_IMX is not set # CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_AT91RM9200 is not set # # LH7A40X Implementations @@ -110,6 +137,7 @@ CONFIG_ARM_THUMB=y # # Bus support # +CONFIG_ARM_AMBA=y # # PCCARD (PCMCIA/CardBus) support @@ -120,7 +148,18 @@ CONFIG_ARM_THUMB=y # Kernel Features # CONFIG_PREEMPT=y +# CONFIG_NO_IDLE_HZ is not set +# CONFIG_AEABI is not set +CONFIG_ARCH_DISCONTIGMEM_ENABLE=y +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_DISCONTIGMEM_MANUAL=y +# CONFIG_SPARSEMEM_MANUAL is not set CONFIG_DISCONTIGMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_NEED_MULTIPLE_NODES=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 CONFIG_ALIGNMENT_TRAP=y # @@ -154,6 +193,84 @@ CONFIG_BINFMT_ELF=y # Power management options # # CONFIG_PM is not set +# CONFIG_APM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set # # Device Drivers @@ -168,6 +285,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_DEBUG_DRIVER is not set # +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# # Memory Technology Devices (MTD) # CONFIG_MTD=y @@ -175,7 +297,7 @@ CONFIG_MTD=y # CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_AFS_PARTS is not set # @@ -186,6 +308,7 @@ CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set # # RAM/ROM/Flash chip drivers @@ -211,15 +334,18 @@ CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_XIP is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set # # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x00000000 +CONFIG_MTD_PHYSMAP_LEN=0x04000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=4 # CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_EDB7312 is not set +# CONFIG_MTD_PLATRAM is not set # # Self-contained MTD device drivers @@ -243,6 +369,11 @@ CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_NAND is not set # +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# # Parallel port support # # CONFIG_PARPORT is not set @@ -254,7 +385,6 @@ CONFIG_MTD_CFI_UTIL=y # # Block devices # -# CONFIG_BLK_DEV_FD is not set # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set @@ -262,16 +392,7 @@ CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_UB is not set # CONFIG_BLK_DEV_RAM is not set CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_INITRAMFS_SOURCE="" # CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set -# CONFIG_IOSCHED_DEADLINE is not set -CONFIG_IOSCHED_CFQ=y # CONFIG_ATA_OVER_ETH is not set # @@ -291,12 +412,13 @@ CONFIG_BLK_DEV_IDEDISK=y # CONFIG_BLK_DEV_IDEFLOPPY is not set # CONFIG_BLK_DEV_IDESCSI is not set # CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_POLL=y # # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y -# CONFIG_IDE_ARM is not set +CONFIG_IDE_ARM=y # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -304,6 +426,7 @@ CONFIG_IDE_GENERIC=y # # SCSI device support # +# CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y # CONFIG_SCSI_PROC_FS is not set @@ -315,6 +438,7 @@ CONFIG_SCSI=y # CONFIG_CHR_DEV_OSST is not set # CONFIG_BLK_DEV_SR is not set # CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set # # Some SCSI devices (e.g. CD jukebox) support multiple LUNs @@ -329,10 +453,12 @@ CONFIG_SCSI=y # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set # # SCSI low-level drivers # +# CONFIG_ISCSI_TCP is not set # CONFIG_SCSI_SATA is not set # CONFIG_SCSI_DEBUG is not set @@ -344,6 +470,7 @@ CONFIG_SCSI=y # # Fusion MPT device support # +# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -354,70 +481,8 @@ CONFIG_SCSI=y # # -# Networking support +# Network device support # -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_IP_TCPDIAG is not set -# CONFIG_IP_TCPDIAG_IPV6 is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set CONFIG_NETDEVICES=y # CONFIG_DUMMY is not set # CONFIG_BONDING is not set @@ -425,11 +490,17 @@ CONFIG_NETDEVICES=y # CONFIG_TUN is not set # +# PHY device support +# +# CONFIG_PHYLIB is not set + +# # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y CONFIG_MII=y CONFIG_SMC91X=y +# CONFIG_DM9000 is not set # # Ethernet (1000 Mbit) @@ -456,6 +527,8 @@ CONFIG_SMC91X=y # CONFIG_SLIP is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set # # ISDN subsystem @@ -470,10 +543,13 @@ CONFIG_INPUT=y # # Userland interfaces # -# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set +CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set # @@ -482,7 +558,13 @@ CONFIG_INPUT=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_ADC_LH7=y +CONFIG_HAS_TOUCHSCREEN_ADC_LH7=y # CONFIG_INPUT_MISC is not set # @@ -490,7 +572,6 @@ CONFIG_INPUT=y # # CONFIG_SERIO is not set # CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y # # Character devices @@ -508,6 +589,8 @@ CONFIG_HW_CONSOLE=y # # Non-8250 serial port support # +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_LH7A40X=y @@ -533,13 +616,13 @@ CONFIG_RTC=y # # Ftape, the floppy tape device driver # -# CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set # # TPM devices # # CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set # # I2C support @@ -547,10 +630,33 @@ CONFIG_RTC=y # CONFIG_I2C is not set # +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# # Misc devices # # +# Multimedia Capabilities Port drivers +# + +# # Multimedia devices # # CONFIG_VIDEO_DEV is not set @@ -563,18 +669,83 @@ CONFIG_RTC=y # # Graphics support # -# CONFIG_FB is not set +CONFIG_FB=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set +CONFIG_FB_ARMCLCD=y +CONFIG_FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT=y +# CONFIG_FB_ARMCLCD_SHARP_LQ057Q3DC02 is not set +# CONFIG_FB_ARMCLCD_SHARP_LQ64D343 is not set +# CONFIG_FB_ARMCLCD_SHARP_LQ10D368 is not set +# CONFIG_FB_ARMCLCD_SHARP_LQ121S1DG41 is not set +# CONFIG_FB_ARMCLCD_AUO_A070VW01_WIDE is not set +# CONFIG_FB_ARMCLCD_HITACHI is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set # # Console display driver support # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE is not set + +# +# Logo configuration +# +# CONFIG_LOGO is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound # -# CONFIG_SOUND is not set +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +# CONFIG_SND_RTCTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +CONFIG_SND_AC97_CODEC=y +CONFIG_SND_AC97_BUS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +# CONFIG_SND_ARMAACI is not set +CONFIG_SND_LH7A40X_AC97=y + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set # # USB support @@ -595,6 +766,7 @@ CONFIG_USB_DEVICEFS=y # # USB Host Controller Drivers # +# CONFIG_USB_ISP116X_HCD is not set CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_BIG_ENDIAN is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y @@ -603,16 +775,19 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y # # USB Device Class drivers # -# CONFIG_USB_BLUETOOTH_TTY is not set +# CONFIG_OBSOLETE_OSS_USB_DRIVER is not set # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set # -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information # CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE_DEBUG=y -# CONFIG_USB_STORAGE_RW_DETECT is not set CONFIG_USB_STORAGE_DATAFAB=y # CONFIG_USB_STORAGE_FREECOM is not set # CONFIG_USB_STORAGE_ISD200 is not set @@ -621,22 +796,32 @@ CONFIG_USB_STORAGE_DATAFAB=y # CONFIG_USB_STORAGE_SDDR09 is not set # CONFIG_USB_STORAGE_SDDR55 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_LIBUSUAL is not set # # USB Input Devices # CONFIG_USB_HID=y CONFIG_USB_HIDINPUT=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set # CONFIG_HID_FF is not set # CONFIG_USB_HIDDEV is not set # CONFIG_USB_AIPTEK is not set # CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set # CONFIG_USB_KBTAB is not set # CONFIG_USB_POWERMATE is not set # CONFIG_USB_MTOUCH is not set +# CONFIG_USB_ITMTOUCH is not set # CONFIG_USB_EGALAX is not set +# CONFIG_USB_YEALINK is not set # CONFIG_USB_XPAD is not set # CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set # # USB Imaging devices @@ -686,16 +871,33 @@ CONFIG_USB_MON=y # CONFIG_USB_PHIDGETKIT is not set # CONFIG_USB_PHIDGETSERVO is not set # CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_LD is not set # CONFIG_USB_TEST is not set # -# USB ATM/DSL drivers +# USB DSL modem support # # # USB Gadget Support # -# CONFIG_USB_GADGET is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +CONFIG_USB_GADGET_LH7=y +CONFIG_USB_LH7=y +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +CONFIG_USB_ZERO=y +# CONFIG_USB_ETH is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set # # MMC/SD Card support @@ -707,6 +909,7 @@ CONFIG_USB_MON=y # CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_POSIX_ACL is not set @@ -716,17 +919,17 @@ CONFIG_JBD=y CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set - -# -# XFS support -# +# CONFIG_FS_POSIX_ACL is not set # CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y # CONFIG_QUOTA is not set CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set # # CD-ROM/DVD Filesystems @@ -749,12 +952,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_PROC_FS=y CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set CONFIG_TMPFS=y -# CONFIG_TMPFS_XATTR is not set # CONFIG_HUGETLB_PAGE is not set CONFIG_RAMFS=y +# CONFIG_RELAYFS_FS is not set +# CONFIG_CONFIGFS_FS is not set # # Miscellaneous filesystems @@ -769,8 +971,8 @@ CONFIG_RAMFS=y # CONFIG_JFFS_FS is not set CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 -# CONFIG_JFFS2_FS_NAND is not set -# CONFIG_JFFS2_FS_NOR_ECC is not set +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_SUMMARY is not set # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set CONFIG_JFFS2_ZLIB=y CONFIG_JFFS2_RTIME=y @@ -787,12 +989,14 @@ CONFIG_CRAMFS=y # CONFIG_NFS_FS=y CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set # CONFIG_NFS_DIRECTIO is not set # CONFIG_NFSD is not set CONFIG_ROOT_NFS=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set @@ -801,6 +1005,7 @@ CONFIG_SUNRPC=y # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set # # Partition Types @@ -820,6 +1025,7 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_SGI_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set # @@ -875,19 +1081,24 @@ CONFIG_NLS_DEFAULT="iso8859-1" # Kernel hacking # # CONFIG_PRINTK_TIME is not set -CONFIG_DEBUG_KERNEL=y CONFIG_MAGIC_SYSRQ=y -CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_DETECT_SOFTLOCKUP=y # CONFIG_SCHEDSTATS is not set # CONFIG_DEBUG_SLAB is not set CONFIG_DEBUG_PREEMPT=y +CONFIG_DEBUG_MUTEXES=y # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set CONFIG_DEBUG_USER=y # CONFIG_DEBUG_WAITQ is not set CONFIG_DEBUG_ERRORS=y @@ -912,6 +1123,7 @@ CONFIG_DEBUG_ERRORS=y # Library routines # # CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set CONFIG_CRC32=y # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y diff --git a/arch/arm/configs/netx_defconfig b/arch/arm/configs/netx_defconfig new file mode 100644 index 00000000000..61115a77338 --- /dev/null +++ b/arch/arm/configs/netx_defconfig @@ -0,0 +1,926 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.17-rc6 +# Tue Jun 6 15:26:53 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_VECTORS_BASE=0xffff0000 + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set +CONFIG_OBSOLETE_INTERMODULE=y + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +# CONFIG_BLK_DEV_IO_TRACE is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_AT91RM9200 is not set +CONFIG_ARCH_NETX=y + +# +# NetX Implementations +# +CONFIG_MACH_NXDKN=y +CONFIG_MACH_NXDB500=y +CONFIG_MACH_NXEB500HMI=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +CONFIG_ARM_VIC=y + +# +# Bus support +# +CONFIG_ARM_AMBA=y + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_PREEMPT=y +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttySMX0,115200" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set +# CONFIG_APM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=m +CONFIG_NET_KEY=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +CONFIG_NET_IPGRE=m +# CONFIG_NET_IPGRE_BROADCAST is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +CONFIG_INET_XFRM_TUNNEL=y +CONFIG_INET_TUNNEL=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y + +# +# IP: Virtual Server Configuration +# +# CONFIG_IP_VS is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +# CONFIG_IPV6_TUNNEL is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK is not set +# CONFIG_NETFILTER_XTABLES is not set + +# +# IP: Netfilter Configuration +# +CONFIG_IP_NF_CONNTRACK=m +# CONFIG_IP_NF_CT_ACCT is not set +# CONFIG_IP_NF_CONNTRACK_MARK is not set +# CONFIG_IP_NF_CONNTRACK_EVENTS is not set +# CONFIG_IP_NF_CT_PROTO_SCTP is not set +CONFIG_IP_NF_FTP=m +CONFIG_IP_NF_IRC=m +# CONFIG_IP_NF_NETBIOS_NS is not set +CONFIG_IP_NF_TFTP=m +CONFIG_IP_NF_AMANDA=m +# CONFIG_IP_NF_PPTP is not set +# CONFIG_IP_NF_H323 is not set +CONFIG_IP_NF_QUEUE=m + +# +# IPv6: Netfilter Configuration (EXPERIMENTAL) +# +# CONFIG_IP6_NF_QUEUE is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +CONFIG_MTD_PLATRAM=y + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_CRYPTOLOOP=m +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_SMC91X is not set +CONFIG_NET_NETX=y +# CONFIG_DM9000 is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_AMBAKMI is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_NETX=y +CONFIG_SERIAL_NETX_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +CONFIG_NVRAM=m +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set + +# +# Misc devices +# + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_V4L2=y + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +CONFIG_FB=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_MACMODES is not set +CONFIG_FB_FIRMWARE_EDID=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set +CONFIG_FB_ARMCLCD=y +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y + +# +# Logo configuration +# +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=m + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=m +CONFIG_RTC_INTF_PROC=m +CONFIG_RTC_INTF_DEV=m + +# +# RTC drivers +# +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_NETX=m +# CONFIG_RTC_DRV_TEST is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_NFS_DIRECTIO=y +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set +CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_WAITQ is not set +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_CRC32C=m +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff --git a/arch/arm/configs/omap_h2_1610_defconfig b/arch/arm/configs/omap_h2_1610_defconfig index ee3ecbd9002..05adb0b34e7 100644 --- a/arch/arm/configs/omap_h2_1610_defconfig +++ b/arch/arm/configs/omap_h2_1610_defconfig @@ -1,19 +1,20 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.14 -# Wed Nov 9 18:53:40 2005 +# Linux kernel version: 2.6.17 +# Thu Jun 29 15:25:18 2006 # CONFIG_ARM=y CONFIG_MMU=y -CONFIG_UID16=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # # Code maturity level options # CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y CONFIG_BROKEN_ON_SMP=y CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 @@ -29,26 +30,26 @@ CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y # CONFIG_AUDIT is not set -# CONFIG_HOTPLUG is not set -CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_EMBEDDED is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y +CONFIG_ELF_CORE=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_EPOLL=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 +CONFIG_SLAB=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set # # Loadable module support @@ -56,7 +57,6 @@ CONFIG_BASE_SMALL=0 CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_KMOD is not set @@ -64,6 +64,7 @@ CONFIG_OBSOLETE_MODPARM=y # # Block layer # +# CONFIG_BLK_DEV_IO_TRACE is not set # # IO Schedulers @@ -81,16 +82,26 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # # System Type # +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91RM9200 is not set # CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set # CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set # CONFIG_ARCH_IOP3XX is not set # CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set # CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set @@ -98,11 +109,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_AAEC2000 is not set # # TI OMAP Implementations @@ -141,6 +147,7 @@ CONFIG_ARCH_OMAP16XX=y CONFIG_MACH_OMAP_H2=y # CONFIG_MACH_OMAP_H3 is not set # CONFIG_MACH_OMAP_OSK is not set +# CONFIG_MACH_NOKIA770 is not set # CONFIG_MACH_OMAP_GENERIC is not set # @@ -177,7 +184,6 @@ CONFIG_ARM_THUMB=y # # Bus support # -CONFIG_ISA_DMA_API=y # # PCCARD (PCMCIA/CardBus) support @@ -189,6 +195,8 @@ CONFIG_ISA_DMA_API=y # CONFIG_PREEMPT=y CONFIG_NO_IDLE_HZ=y +CONFIG_HZ=128 +# CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y @@ -249,6 +257,8 @@ CONFIG_BINFMT_AOUT=y # Power management options # CONFIG_PM=y +CONFIG_PM_LEGACY=y +# CONFIG_PM_DEBUG is not set # CONFIG_APM is not set # @@ -259,9 +269,12 @@ CONFIG_NET=y # # Networking options # +# CONFIG_NETDEBUG is not set CONFIG_PACKET=y # CONFIG_PACKET_MMAP is not set CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set # CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set @@ -278,12 +291,18 @@ CONFIG_IP_PNP_BOOTP=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set # CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_BIC=y # CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set # CONFIG_NETFILTER is not set # @@ -295,6 +314,11 @@ CONFIG_TCP_CONG_BIC=y # SCTP Configuration (EXPERIMENTAL) # # CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set # CONFIG_VLAN_8021Q is not set @@ -312,7 +336,6 @@ CONFIG_TCP_CONG_BIC=y # QoS and/or fair queueing # # CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set # # Network testing @@ -333,6 +356,12 @@ CONFIG_TCP_CONG_BIC=y CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set # # Memory Technology Devices (MTD) @@ -526,6 +555,7 @@ CONFIG_SERIO_SERPORT=y CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set # CONFIG_SERIAL_NONSTANDARD is not set # @@ -534,6 +564,7 @@ CONFIG_HW_CONSOLE=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 # CONFIG_SERIAL_8250_EXTENDED is not set # @@ -559,8 +590,8 @@ CONFIG_WATCHDOG_NOWAYOUT=y # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set +# CONFIG_HW_RANDOM is not set # CONFIG_NVRAM is not set -# CONFIG_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set @@ -572,6 +603,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y # # TPM devices # +# CONFIG_TCG_TPM is not set # CONFIG_TELCLOCK is not set # @@ -580,10 +612,22 @@ CONFIG_WATCHDOG_NOWAYOUT=y # CONFIG_I2C is not set # +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# + +# # Hardware Monitoring support # CONFIG_HWMON=y # CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_F71805F is not set # CONFIG_HWMON_DEBUG_CHIP is not set # @@ -591,13 +635,23 @@ CONFIG_HWMON=y # # -# Multimedia Capabilities Port drivers +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers # # # Multimedia devices # # CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_V4L2=y # # Digital Video Broadcasting Devices @@ -607,11 +661,13 @@ CONFIG_HWMON=y # # Graphics support # +CONFIG_FIRMWARE_EDID=y CONFIG_FB=y # CONFIG_FB_CFB_FILLRECT is not set # CONFIG_FB_CFB_COPYAREA is not set # CONFIG_FB_CFB_IMAGEBLIT is not set # CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set CONFIG_FB_MODE_HELPERS=y # CONFIG_FB_TILEBLITTING is not set # CONFIG_FB_S1D13XXX is not set @@ -635,7 +691,6 @@ CONFIG_FONT_8x16=y # CONFIG_FONT_SUN8x16 is not set # CONFIG_FONT_SUN12x22 is not set # CONFIG_FONT_10x18 is not set -# CONFIG_FONT_RL is not set # # Logo configuration @@ -660,16 +715,15 @@ CONFIG_SOUND=y # Open Sound System # CONFIG_SOUND_PRIME=y -# CONFIG_OBSOLETE_OSS_DRIVER is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set -# CONFIG_SOUND_OSS is not set # # USB support # CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set # CONFIG_USB is not set # @@ -680,17 +734,6 @@ CONFIG_USB_ARCH_HAS_OHCI=y # USB Gadget Support # # CONFIG_USB_GADGET is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_PXA2XX is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -# CONFIG_USB_ZERO is not set -# CONFIG_USB_ETH is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set # # MMC/SD Card support @@ -698,20 +741,27 @@ CONFIG_USB_ARCH_HAS_OHCI=y # CONFIG_MMC is not set # +# Real Time Clock +# +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# # File systems # CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT2_FS_XIP is not set # CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set # CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set # CONFIG_MINIX_FS is not set CONFIG_ROMFS_FS=y CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set @@ -741,7 +791,7 @@ CONFIG_SYSFS=y # CONFIG_TMPFS is not set # CONFIG_HUGETLB_PAGE is not set CONFIG_RAMFS=y -# CONFIG_RELAYFS_FS is not set +# CONFIG_CONFIGFS_FS is not set # # Miscellaneous filesystems @@ -843,10 +893,13 @@ CONFIG_NLS_DEFAULT="iso8859-1" # Kernel hacking # # CONFIG_PRINTK_TIME is not set +# CONFIG_MAGIC_SYSRQ is not set # CONFIG_DEBUG_KERNEL is not set CONFIG_LOG_BUF_SHIFT=14 CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_FS is not set CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set # CONFIG_DEBUG_USER is not set # diff --git a/arch/arm/configs/onearm_defconfig b/arch/arm/configs/onearm_defconfig new file mode 100644 index 00000000000..2b4a63be03f --- /dev/null +++ b/arch/arm/configs/onearm_defconfig @@ -0,0 +1,1054 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.17-git10 +# Mon Jun 26 13:45:44 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_VECTORS_BASE=0xffff0000 + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +# CONFIG_BLK_DEV_IO_TRACE is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARCH_AT91=y +CONFIG_ARCH_AT91RM9200=y +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set + +# +# AT91RM9200 Implementations +# + +# +# AT91RM9200 Board Type +# +CONFIG_MACH_ONEARM=y +# CONFIG_ARCH_AT91RM9200DK is not set +# CONFIG_MACH_AT91RM9200EK is not set +# CONFIG_MACH_CSB337 is not set +# CONFIG_MACH_CSB637 is not set +# CONFIG_MACH_CARMEVA is not set +# CONFIG_MACH_KB9200 is not set +# CONFIG_MACH_ATEB9200 is not set +# CONFIG_MACH_KAFA is not set + +# +# AT91RM9200 Feature Selections +# +CONFIG_AT91_PROGRAMMABLE_CLOCKS=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM920T=y +CONFIG_CPU_32v4=y +CONFIG_CPU_ABRT_EV4T=y +CONFIG_CPU_CACHE_V4WT=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# +CONFIG_AT91_CF=y + +# +# Kernel Features +# +# CONFIG_PREEMPT is not set +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +CONFIG_LEDS=y +CONFIG_LEDS_TIMER=y +# CONFIG_LEDS_CPU is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp mem=64M" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set +# CONFIG_APM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_ARM_AT91_ETHER=y +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# PCMCIA network device support +# +# CONFIG_NET_PCMCIA is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_AT91=y +CONFIG_SERIAL_AT91_CONSOLE=y +# CONFIG_SERIAL_AT91_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_AT91_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_V4L2=y + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +CONFIG_USB_DEBUG=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_STORAGE is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGETKIT is not set +# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +CONFIG_USB_GADGET_AT91=y +CONFIG_USB_AT91=y +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set + +# +# MMC/SD Card support +# +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_BLOCK=y +CONFIG_MMC_AT91RM9200=y + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set +CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_WAITQ is not set +# CONFIG_DEBUG_ERRORS is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y diff --git a/arch/arm/configs/pnx4008_defconfig b/arch/arm/configs/pnx4008_defconfig new file mode 100644 index 00000000000..8a078d479d5 --- /dev/null +++ b/arch/arm/configs/pnx4008_defconfig @@ -0,0 +1,2072 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.17-rc1 +# Thu Apr 6 17:05:58 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_VECTORS_BASE=0xffff0000 + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +CONFIG_SYSCTL=y +CONFIG_AUDIT=y +# CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set +CONFIG_OBSOLETE_INTERMODULE=m + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y + +# +# Block layer +# +# CONFIG_BLK_DEV_IO_TRACE is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_AT91RM9200 is not set +CONFIG_ARCH_PNX4008=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +CONFIG_PCCARD=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=m +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# + +# +# Kernel Features +# +CONFIG_PREEMPT=y +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="mem=64M console=ttyS0,115200" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_MISC=m +# CONFIG_ARTHUR is not set + +# +# Power management options +# +CONFIG_PM=y +CONFIG_PM_LEGACY=y +# CONFIG_PM_DEBUG is not set +CONFIG_APM=m + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=m +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=m +CONFIG_XFRM=y +CONFIG_XFRM_USER=m +CONFIG_NET_KEY=m +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_FWMARK=y +CONFIG_IP_ROUTE_MULTIPATH=y +# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set +CONFIG_IP_ROUTE_VERBOSE=y +# CONFIG_IP_PNP is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y + +# +# IP: Virtual Server Configuration +# +CONFIG_IP_VS=m +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m +CONFIG_IPV6=m +CONFIG_IPV6_PRIVACY=y +# CONFIG_IPV6_ROUTER_PREF is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_IPV6_TUNNEL=m +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK is not set +# CONFIG_NETFILTER_XTABLES is not set + +# +# IP: Netfilter Configuration +# +CONFIG_IP_NF_CONNTRACK=m +CONFIG_IP_NF_CT_ACCT=y +CONFIG_IP_NF_CONNTRACK_MARK=y +# CONFIG_IP_NF_CONNTRACK_EVENTS is not set +CONFIG_IP_NF_CT_PROTO_SCTP=m +CONFIG_IP_NF_FTP=m +CONFIG_IP_NF_IRC=m +# CONFIG_IP_NF_NETBIOS_NS is not set +CONFIG_IP_NF_TFTP=m +CONFIG_IP_NF_AMANDA=m +# CONFIG_IP_NF_PPTP is not set +# CONFIG_IP_NF_H323 is not set +CONFIG_IP_NF_QUEUE=m + +# +# IPv6: Netfilter Configuration (EXPERIMENTAL) +# +CONFIG_IP6_NF_QUEUE=m + +# +# DECnet: Netfilter Configuration +# +CONFIG_DECNET_NF_GRABULATOR=m + +# +# Bridge: Netfilter Configuration +# +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +# CONFIG_BRIDGE_EBT_ULOG is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SCTP_HMAC_MD5=y + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +CONFIG_ATM=y +CONFIG_ATM_CLIP=y +# CONFIG_ATM_CLIP_NO_ICMP is not set +CONFIG_ATM_LANE=m +CONFIG_ATM_MPOA=m +CONFIG_ATM_BR2684=m +# CONFIG_ATM_BR2684_IPFILTER is not set +CONFIG_BRIDGE=m +CONFIG_VLAN_8021Q=m +CONFIG_DECNET=m +# CONFIG_DECNET_ROUTER is not set +CONFIG_LLC=m +CONFIG_LLC2=m +CONFIG_IPX=m +# CONFIG_IPX_INTERN is not set +CONFIG_ATALK=m +CONFIG_DEV_APPLETALK=y +CONFIG_IPDDP=m +CONFIG_IPDDP_ENCAP=y +CONFIG_IPDDP_DECAP=y +CONFIG_X25=m +CONFIG_LAPB=m +# CONFIG_NET_DIVERT is not set +CONFIG_ECONET=m +CONFIG_ECONET_AUNUDP=y +CONFIG_ECONET_NATIVE=y +CONFIG_WAN_ROUTER=m + +# +# QoS and/or fair queueing +# +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_CLK_JIFFIES=y +# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set +# CONFIG_NET_SCH_CLK_CPU is not set + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_ATM=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_INGRESS=m + +# +# Classification +# +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_BASIC is not set +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +# CONFIG_CLS_U32_PERF is not set +# CONFIG_CLS_U32_MARK is not set +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_CLS_ACT is not set +CONFIG_NET_CLS_POLICE=y +# CONFIG_NET_CLS_IND is not set +CONFIG_NET_ESTIMATOR=y + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +CONFIG_HAMRADIO=y + +# +# Packet Radio protocols +# +CONFIG_AX25=m +# CONFIG_AX25_DAMA_SLAVE is not set +CONFIG_NETROM=m +CONFIG_ROSE=m + +# +# AX.25 network device drivers +# +CONFIG_MKISS=m +CONFIG_6PACK=m +CONFIG_BPQETHER=m +CONFIG_BAYCOM_SER_FDX=m +CONFIG_BAYCOM_SER_HDX=m +CONFIG_BAYCOM_PAR=m +CONFIG_BAYCOM_EPP=m +CONFIG_YAM=m +CONFIG_IRDA=m + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRNET=m +CONFIG_IRCOMM=m +# CONFIG_IRDA_ULTRA is not set + +# +# IrDA options +# +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_FAST_RR=y +CONFIG_IRDA_DEBUG=y + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +CONFIG_IRTTY_SIR=m + +# +# Dongle support +# +CONFIG_DONGLE=y +CONFIG_ESI_DONGLE=m +CONFIG_ACTISYS_DONGLE=m +CONFIG_TEKRAM_DONGLE=m +# CONFIG_TOIM3232_DONGLE is not set +CONFIG_LITELINK_DONGLE=m +CONFIG_MA600_DONGLE=m +CONFIG_GIRBIL_DONGLE=m +CONFIG_MCP2120_DONGLE=m +CONFIG_OLD_BELKIN_DONGLE=m +CONFIG_ACT200L_DONGLE=m + +# +# Old SIR device drivers +# +CONFIG_IRPORT_SIR=m + +# +# Old Serial dongle support +# +# CONFIG_DONGLE_OLD is not set + +# +# FIR device drivers +# +CONFIG_USB_IRDA=m +CONFIG_SIGMATEL_FIR=m +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_CMTP=m +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIBCM203X=m +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIDTL1=m +CONFIG_BT_HCIBT3C=m +CONFIG_BT_HCIBLUECARD=m +CONFIG_BT_HCIBTUART=m +CONFIG_BT_HCIVHCI=m +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +# CONFIG_IEEE80211_CRYPT_WEP is not set +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +# CONFIG_IEEE80211_SOFTMAC is not set +CONFIG_WIRELESS_EXT=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_DEBUG_DRIVER is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=m +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=m +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=m +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=m +CONFIG_MTD_BLOCK=m +CONFIG_MTD_BLOCK_RO=m +CONFIG_FTL=m +CONFIG_NFTL=m +CONFIG_NFTL_RW=y +CONFIG_INFTL=m +# CONFIG_RFD_FTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=m +CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_GEN_PROBE=m +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_AMDSTD=m +CONFIG_MTD_CFI_STAA=m +CONFIG_MTD_CFI_UTIL=m +CONFIG_MTD_RAM=m +CONFIG_MTD_ROM=m +CONFIG_MTD_ABSENT=m +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=m +CONFIG_MTD_PHYSMAP_START=0x8000000 +CONFIG_MTD_PHYSMAP_LEN=0x4000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +CONFIG_MTD_SLRAM=m +CONFIG_MTD_PHRAM=m +CONFIG_MTD_MTDRAM=m +CONFIG_MTDRAM_TOTAL_SIZE=4096 +CONFIG_MTDRAM_ERASE_SIZE=128 +CONFIG_MTD_BLKMTD=m +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +CONFIG_MTD_DOC2000=m +CONFIG_MTD_DOC2001=m +CONFIG_MTD_DOC2001PLUS=m +CONFIG_MTD_DOCPROBE=m +CONFIG_MTD_DOCECC=m +# CONFIG_MTD_DOCPROBE_ADVANCED is not set +CONFIG_MTD_DOCPROBE_ADDRESS=0 + +# +# NAND Flash Device Drivers +# +CONFIG_MTD_NAND=m +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +CONFIG_MTD_NAND_IDS=m +CONFIG_MTD_NAND_DISKONCHIP=m +# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 +# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set +# CONFIG_MTD_NAND_NANDSIM is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +CONFIG_PARPORT=m +CONFIG_PARPORT_PC=m +CONFIG_PARPORT_PC_FIFO=y +# CONFIG_PARPORT_PC_SUPERIO is not set +CONFIG_PARPORT_PC_PCMCIA=m +CONFIG_PARPORT_NOT_PC=y +# CONFIG_PARPORT_ARC is not set +# CONFIG_PARPORT_GSC is not set +CONFIG_PARPORT_1284=y + +# +# Plug and Play support +# + +# +# Block devices +# +CONFIG_PARIDE=m +CONFIG_PARIDE_PARPORT=m + +# +# Parallel IDE high-level drivers +# +CONFIG_PARIDE_PD=m +CONFIG_PARIDE_PCD=m +CONFIG_PARIDE_PF=m +CONFIG_PARIDE_PT=m +CONFIG_PARIDE_PG=m + +# +# Parallel IDE protocol modules +# +CONFIG_PARIDE_ATEN=m +CONFIG_PARIDE_BPCK=m +CONFIG_PARIDE_BPCK6=m +CONFIG_PARIDE_COMM=m +CONFIG_PARIDE_DSTR=m +CONFIG_PARIDE_FIT2=m +CONFIG_PARIDE_FIT3=m +CONFIG_PARIDE_EPAT=m +# CONFIG_PARIDE_EPATC8 is not set +CONFIG_PARIDE_EPIA=m +CONFIG_PARIDE_FRIQ=m +CONFIG_PARIDE_FRPW=m +CONFIG_PARIDE_KBIC=m +CONFIG_PARIDE_KTTI=m +CONFIG_PARIDE_ON20=m +CONFIG_PARIDE_ON26=m +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_CRYPTOLOOP=m +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_BLK_DEV_INITRD=y +CONFIG_CDROM_PKTCDVD=m +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +CONFIG_IDE=m +CONFIG_BLK_DEV_IDE=m + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=m +# CONFIG_IDEDISK_MULTI_MODE is not set +CONFIG_BLK_DEV_IDECS=m +CONFIG_BLK_DEV_IDECD=m +CONFIG_BLK_DEV_IDETAPE=m +CONFIG_BLK_DEV_IDEFLOPPY=m +CONFIG_BLK_DEV_IDESCSI=m +# CONFIG_IDE_TASK_IOCTL is not set + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=m +# CONFIG_IDE_ARM is not set +# CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +CONFIG_CHR_DEV_ST=m +CONFIG_CHR_DEV_OSST=m +CONFIG_BLK_DEV_SR=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=m +CONFIG_CHR_DEV_SCH=m + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y + +# +# SCSI Transport Attributes +# +CONFIG_SCSI_SPI_ATTRS=m +CONFIG_SCSI_FC_ATTRS=m +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +CONFIG_SCSI_SATA=m +CONFIG_SCSI_PPA=m +CONFIG_SCSI_IMM=m +# CONFIG_SCSI_IZIP_EPP16 is not set +# CONFIG_SCSI_IZIP_SLOW_CTR is not set +CONFIG_SCSI_DEBUG=m + +# +# PCMCIA SCSI adapter support +# +CONFIG_PCMCIA_AHA152X=m +CONFIG_PCMCIA_FDOMAIN=m +CONFIG_PCMCIA_NINJA_SCSI=m +CONFIG_PCMCIA_QLOGIC=m +CONFIG_PCMCIA_SYM53C500=m + +# +# Multi-device support (RAID and LVM) +# +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID5=m +# CONFIG_MD_RAID5_RESHAPE is not set +CONFIG_MD_RAID6=m +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +CONFIG_BLK_DEV_DM=m +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_MIRROR=m +CONFIG_DM_ZERO=m +# CONFIG_DM_MULTIPATH is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +CONFIG_DUMMY=m +CONFIG_BONDING=m +CONFIG_EQUALIZER=m +CONFIG_TUN=m + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=m +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +CONFIG_NET_POCKET=y +CONFIG_DE600=m +CONFIG_DE620=m + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y +# CONFIG_NET_WIRELESS_RTNETLINK is not set + +# +# Obsolete Wireless cards support (pre-802.11) +# +CONFIG_STRIP=m +CONFIG_PCMCIA_WAVELAN=m +CONFIG_PCMCIA_NETWAVE=m + +# +# Wireless 802.11 Frequency Hopping cards support +# +CONFIG_PCMCIA_RAYCS=m + +# +# Wireless 802.11b ISA/PCI cards support +# +CONFIG_HERMES=m +CONFIG_ATMEL=m + +# +# Wireless 802.11b Pcmcia/Cardbus cards support +# +CONFIG_PCMCIA_HERMES=m +# CONFIG_PCMCIA_SPECTRUM is not set +CONFIG_AIRO_CS=m +CONFIG_PCMCIA_ATMEL=m +CONFIG_PCMCIA_WL3501=m +# CONFIG_HOSTAP is not set +CONFIG_NET_WIRELESS=y + +# +# PCMCIA network device support +# +CONFIG_NET_PCMCIA=y +CONFIG_PCMCIA_3C589=m +CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_FMVJ18X=m +CONFIG_PCMCIA_PCNET=m +CONFIG_PCMCIA_NMCLAN=m +CONFIG_PCMCIA_SMC91C92=m +CONFIG_PCMCIA_XIRC2PS=m +CONFIG_PCMCIA_AXNET=m + +# +# Wan interfaces +# +CONFIG_WAN=y +CONFIG_SYNCLINK_SYNCPPP=m +CONFIG_HDLC=m +CONFIG_HDLC_RAW=y +CONFIG_HDLC_RAW_ETH=y +CONFIG_HDLC_CISCO=y +CONFIG_HDLC_FR=y +CONFIG_HDLC_PPP=y +CONFIG_HDLC_X25=y +CONFIG_DLCI=m +CONFIG_DLCI_COUNT=24 +CONFIG_DLCI_MAX=8 +CONFIG_WAN_ROUTER_DRIVERS=y +CONFIG_LAPBETHER=m +CONFIG_X25_ASY=m + +# +# ATM drivers +# +# CONFIG_ATM_DUMMY is not set +CONFIG_ATM_TCP=m +CONFIG_PLIP=m +CONFIG_PPP=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_MPPE=m +CONFIG_PPPOE=m +CONFIG_PPPOATM=m +CONFIG_SLIP=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_SMART=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_SHAPER=m +CONFIG_NETCONSOLE=m +CONFIG_NETPOLL=y +# CONFIG_NETPOLL_RX is not set +# CONFIG_NETPOLL_TRAP is not set +CONFIG_NET_POLL_CONTROLLER=y + +# +# ISDN subsystem +# +CONFIG_ISDN=m + +# +# Old ISDN4Linux +# +CONFIG_ISDN_I4L=m +CONFIG_ISDN_PPP=y +CONFIG_ISDN_PPP_VJ=y +CONFIG_ISDN_MPP=y +CONFIG_IPPP_FILTER=y +CONFIG_ISDN_PPP_BSDCOMP=m +CONFIG_ISDN_AUDIO=y +CONFIG_ISDN_TTY_FAX=y +CONFIG_ISDN_X25=y + +# +# ISDN feature submodules +# +CONFIG_ISDN_DRV_LOOP=m +CONFIG_ISDN_DIVERSION=m + +# +# ISDN4Linux hardware drivers +# + +# +# Passive cards +# +CONFIG_ISDN_DRV_HISAX=m + +# +# D-channel protocol features +# +CONFIG_HISAX_EURO=y +CONFIG_DE_AOC=y +# CONFIG_HISAX_NO_SENDCOMPLETE is not set +# CONFIG_HISAX_NO_LLC is not set +# CONFIG_HISAX_NO_KEYPAD is not set +CONFIG_HISAX_1TR6=y +CONFIG_HISAX_NI1=y +CONFIG_HISAX_MAX_CARDS=8 + +# +# HiSax supported cards +# +CONFIG_HISAX_16_3=y +CONFIG_HISAX_S0BOX=y +CONFIG_HISAX_FRITZPCI=y +CONFIG_HISAX_AVM_A1_PCMCIA=y +CONFIG_HISAX_ELSA=y +CONFIG_HISAX_DIEHLDIVA=y +CONFIG_HISAX_SEDLBAUER=y +CONFIG_HISAX_NICCY=y +CONFIG_HISAX_GAZEL=y +CONFIG_HISAX_HFC_SX=y +# CONFIG_HISAX_DEBUG is not set + +# +# HiSax PCMCIA card service modules +# +CONFIG_HISAX_SEDLBAUER_CS=m +CONFIG_HISAX_ELSA_CS=m +CONFIG_HISAX_AVM_A1_CS=m +CONFIG_HISAX_TELES_CS=m + +# +# HiSax sub driver modules +# +CONFIG_HISAX_ST5481=m +CONFIG_HISAX_HFCUSB=m +# CONFIG_HISAX_HFC4S8S is not set +CONFIG_HISAX_HDLC=y + +# +# Active cards +# + +# +# Siemens Gigaset +# +# CONFIG_ISDN_DRV_GIGASET is not set + +# +# CAPI subsystem +# +CONFIG_ISDN_CAPI=m +CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y +CONFIG_ISDN_CAPI_MIDDLEWARE=y +CONFIG_ISDN_CAPI_CAPI20=m +CONFIG_ISDN_CAPI_CAPIFS_BOOL=y +CONFIG_ISDN_CAPI_CAPIFS=m +CONFIG_ISDN_CAPI_CAPIDRV=m + +# +# CAPI hardware drivers +# + +# +# Active AVM cards +# +CONFIG_CAPI_AVM=y +CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m +CONFIG_ISDN_DRV_AVMB1_AVM_CS=m + +# +# Active Eicon DIVA Server cards +# +CONFIG_CAPI_EICON=y + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=m +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_TSDEV=m +CONFIG_INPUT_TSDEV_SCREEN_X=240 +CONFIG_INPUT_TSDEV_SCREEN_Y=320 +CONFIG_INPUT_EVDEV=m +CONFIG_INPUT_EVBUG=m + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +CONFIG_KEYBOARD_SUNKBD=m +CONFIG_KEYBOARD_LKKBD=m +CONFIG_KEYBOARD_XTKBD=m +CONFIG_KEYBOARD_NEWTON=m +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_VSXXXAA=m +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_ANALOG=m +CONFIG_JOYSTICK_A3D=m +CONFIG_JOYSTICK_ADI=m +CONFIG_JOYSTICK_COBRA=m +CONFIG_JOYSTICK_GF2K=m +CONFIG_JOYSTICK_GRIP=m +CONFIG_JOYSTICK_GRIP_MP=m +CONFIG_JOYSTICK_GUILLEMOT=m +CONFIG_JOYSTICK_INTERACT=m +CONFIG_JOYSTICK_SIDEWINDER=m +CONFIG_JOYSTICK_TMDC=m +CONFIG_JOYSTICK_IFORCE=m +CONFIG_JOYSTICK_IFORCE_USB=y +CONFIG_JOYSTICK_IFORCE_232=y +CONFIG_JOYSTICK_WARRIOR=m +CONFIG_JOYSTICK_MAGELLAN=m +CONFIG_JOYSTICK_SPACEORB=m +CONFIG_JOYSTICK_SPACEBALL=m +CONFIG_JOYSTICK_STINGER=m +# CONFIG_JOYSTICK_TWIDJOY is not set +CONFIG_JOYSTICK_DB9=m +CONFIG_JOYSTICK_GAMECON=m +CONFIG_JOYSTICK_TURBOGRAFX=m +CONFIG_JOYSTICK_JOYDUMP=m +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_GUNZE=m +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=m + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=m +CONFIG_SERIO_PARKBD=m +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=m +CONFIG_GAMEPORT=m +CONFIG_GAMEPORT_NS558=m +CONFIG_GAMEPORT_L4=m + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_SERIAL_NONSTANDARD=y +CONFIG_COMPUTONE=m +CONFIG_ROCKETPORT=m +CONFIG_CYCLADES=m +# CONFIG_CYZ_INTR is not set +CONFIG_DIGIEPCA=m +CONFIG_MOXA_INTELLIO=m +CONFIG_MOXA_SMARTIO=m +# CONFIG_ISI is not set +CONFIG_SYNCLINKMP=m +CONFIG_N_HDLC=m +# CONFIG_RISCOM8 is not set +# CONFIG_SPECIALIX is not set +CONFIG_SX=m +CONFIG_RIO=m +CONFIG_RIO_OLDPCI=y +CONFIG_STALDRV=y +CONFIG_STALLION=m +CONFIG_ISTALLION=m + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_CS=m +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +CONFIG_PRINTER=m +# CONFIG_LP_CONSOLE is not set +CONFIG_PPDEV=m +CONFIG_TIPAR=m + +# +# IPMI +# +CONFIG_IPMI_HANDLER=m +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SI=m +CONFIG_IPMI_WATCHDOG=m +CONFIG_IPMI_POWEROFF=m + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=m + +# +# USB-based Watchdog Cards +# +CONFIG_USBPCWATCHDOG=m +CONFIG_NVRAM=m +CONFIG_DTLK=m +CONFIG_R3964=m + +# +# Ftape, the floppy tape device driver +# + +# +# PCMCIA character devices +# +CONFIG_SYNCLINK_CS=m +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +CONFIG_RAW_DRIVER=m +CONFIG_MAX_RAW_DEVS=256 + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# +# I2C support +# +CONFIG_I2C=m +CONFIG_I2C_CHARDEV=m + +# +# I2C Algorithms +# +CONFIG_I2C_ALGOBIT=m +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m + +# +# I2C Hardware Bus support +# +CONFIG_I2C_ISA=m +CONFIG_I2C_PARPORT=m +CONFIG_I2C_PARPORT_LIGHT=m +CONFIG_I2C_STUB=m +CONFIG_I2C_PCA_ISA=m + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +CONFIG_SENSORS_EEPROM=m +CONFIG_SENSORS_PCF8574=m +# CONFIG_SENSORS_PCA9539 is not set +CONFIG_SENSORS_PCF8591=m +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +CONFIG_W1=m + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_DS9490 is not set +# CONFIG_W1_MASTER_DS2482 is not set + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2433 is not set + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +CONFIG_HWMON_VID=m +CONFIG_SENSORS_ADM1021=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1026=m +CONFIG_SENSORS_ADM1031=m +# CONFIG_SENSORS_ADM9240 is not set +CONFIG_SENSORS_ASB100=m +# CONFIG_SENSORS_ATXP1 is not set +CONFIG_SENSORS_DS1621=m +# CONFIG_SENSORS_F71805F is not set +CONFIG_SENSORS_FSCHER=m +# CONFIG_SENSORS_FSCPOS is not set +CONFIG_SENSORS_GL518SM=m +# CONFIG_SENSORS_GL520SM is not set +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_LM63=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_PC87360=m +CONFIG_SENSORS_SMSC47M1=m +# CONFIG_SENSORS_SMSC47B397 is not set +CONFIG_SENSORS_W83781D=m +# CONFIG_SENSORS_W83792D is not set +CONFIG_SENSORS_W83L785TS=m +CONFIG_SENSORS_W83627HF=m +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +CONFIG_DVB=y +CONFIG_DVB_CORE=m + +# +# Supported USB Adapters +# +# CONFIG_DVB_USB is not set +CONFIG_DVB_TTUSB_BUDGET=m +CONFIG_DVB_TTUSB_DEC=m +CONFIG_DVB_CINERGYT2=m +CONFIG_DVB_CINERGYT2_TUNING=y +CONFIG_DVB_CINERGYT2_STREAM_URB_COUNT=32 +CONFIG_DVB_CINERGYT2_STREAM_BUF_SIZE=512 +CONFIG_DVB_CINERGYT2_QUERY_INTERVAL=250 +CONFIG_DVB_CINERGYT2_ENABLE_RC_INPUT_DEVICE=y +CONFIG_DVB_CINERGYT2_RC_QUERY_INTERVAL=100 + +# +# Supported FlexCopII (B2C2) Adapters +# +# CONFIG_DVB_B2C2_FLEXCOP is not set + +# +# Supported DVB Frontends +# + +# +# Customise DVB Frontends +# + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_STV0299=m +CONFIG_DVB_CX24110=m +# CONFIG_DVB_CX24123 is not set +CONFIG_DVB_TDA8083=m +CONFIG_DVB_MT312=m +CONFIG_DVB_VES1X93=m +# CONFIG_DVB_S5H1420 is not set + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +# CONFIG_DVB_ZL10353 is not set +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terresterial DTV) frontends +# +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +CONFIG_SOUND=m + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +CONFIG_SND_MPU401_UART=m +CONFIG_SND_DUMMY=m +CONFIG_SND_VIRMIDI=m +CONFIG_SND_MTPAV=m +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_MPU401=m + +# +# ALSA ARM devices +# + +# +# USB devices +# +CONFIG_SND_USB_AUDIO=m + +# +# PCMCIA devices +# + +# +# Open Sound System +# +CONFIG_SOUND_PRIME=m +# CONFIG_OBSOLETE_OSS_DRIVER is not set +# CONFIG_SOUND_MSNDCLAS is not set +# CONFIG_SOUND_MSNDPIN is not set +CONFIG_SOUND_TVMIXER=m + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=m +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_BANDWIDTH=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_SL811_HCD=m +# CONFIG_USB_SL811_CS is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_ISD200=y +CONFIG_USB_STORAGE_DPCM=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +CONFIG_USB_HIDINPUT=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +CONFIG_USB_HIDDEV=y + +# +# USB HID Boot Protocol drivers +# +CONFIG_USB_KBD=m +CONFIG_USB_MOUSE=m +CONFIG_USB_AIPTEK=m +CONFIG_USB_WACOM=m +# CONFIG_USB_ACECAD is not set +CONFIG_USB_KBTAB=m +CONFIG_USB_POWERMATE=m +CONFIG_USB_MTOUCH=m +# CONFIG_USB_ITMTOUCH is not set +CONFIG_USB_EGALAX=m +# CONFIG_USB_YEALINK is not set +CONFIG_USB_XPAD=m +CONFIG_USB_ATI_REMOTE=m +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set + +# +# USB Imaging devices +# +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m + +# +# USB Network Adapters +# +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_ZD1201 is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# +CONFIG_USB_USS720=m + +# +# USB Serial Converter support +# +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_AIRPRIME is not set +# CONFIG_USB_SERIAL_ANYDATA is not set +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +# CONFIG_USB_SERIAL_CP2101 is not set +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +# CONFIG_USB_SERIAL_GARMIN is not set +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=m +# CONFIG_USB_SERIAL_HP4X is not set +CONFIG_USB_SERIAL_SAFE=m +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +# CONFIG_USB_SERIAL_TI is not set +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_EZUSB=y + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +CONFIG_USB_AUERSWALD=m +CONFIG_USB_RIO500=m +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +CONFIG_USB_LED=m +CONFIG_USB_CYTHERM=m +CONFIG_USB_PHIDGETKIT=m +CONFIG_USB_PHIDGETSERVO=m +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_LD is not set +CONFIG_USB_TEST=m + +# +# USB DSL modem support +# +CONFIG_USB_ATM=m +CONFIG_USB_SPEEDTOUCH=m +# CONFIG_USB_CXACRU is not set +# CONFIG_USB_UEAGLEATM is not set +# CONFIG_USB_XUSBATM is not set + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_AT91 is not set +CONFIG_USB_GADGET_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=m +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m + +# +# MMC/SD Card support +# +CONFIG_MMC=m +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_BLOCK=m + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=m +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_JBD=m +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +CONFIG_JFS_FS=m +CONFIG_JFS_POSIX_ACL=y +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_DEBUG is not set +CONFIG_JFS_STATISTICS=y +CONFIG_FS_POSIX_ACL=y +CONFIG_XFS_FS=m +CONFIG_XFS_EXPORT=y +CONFIG_XFS_QUOTA=y +CONFIG_XFS_SECURITY=y +CONFIG_XFS_POSIX_ACL=y +CONFIG_XFS_RT=y +# CONFIG_OCFS2_FS is not set +CONFIG_MINIX_FS=m +CONFIG_ROMFS_FS=m +CONFIG_INOTIFY=y +CONFIG_QUOTA=y +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=m +CONFIG_QUOTACTL=y +CONFIG_DNOTIFY=y +CONFIG_AUTOFS_FS=m +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_ZISOFS_FS=m +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=m +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +CONFIG_ADFS_FS=m +# CONFIG_ADFS_FS_RW is not set +CONFIG_AFFS_FS=m +CONFIG_HFS_FS=m +CONFIG_HFSPLUS_FS=m +CONFIG_BEFS_FS=m +# CONFIG_BEFS_DEBUG is not set +CONFIG_BFS_FS=m +CONFIG_EFS_FS=m +CONFIG_JFFS_FS=m +CONFIG_JFFS_FS_VERBOSE=0 +CONFIG_JFFS_PROC_FS=y +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +CONFIG_VXFS_FS=m +CONFIG_HPFS_FS=m +CONFIG_QNX4FS_FS=m +CONFIG_SYSV_FS=m +CONFIG_UFS_FS=m + +# +# Network File Systems +# +CONFIG_NFS_FS=m +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_NFS_DIRECTIO=y +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_NFSD_TCP=y +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_RPCSEC_GSS_KRB5=m +CONFIG_RPCSEC_GSS_SPKM3=m +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +CONFIG_NCP_FS=m +CONFIG_NCPFS_PACKET_SIGNING=y +CONFIG_NCPFS_IOCTL_LOCKING=y +CONFIG_NCPFS_STRONG=y +CONFIG_NCPFS_NFS_NS=y +CONFIG_NCPFS_OS2_NS=y +# CONFIG_NCPFS_SMALLDOS is not set +CONFIG_NCPFS_NLS=y +CONFIG_NCPFS_EXTRAS=y +CONFIG_CODA_FS=m +# CONFIG_CODA_FS_OLD_API is not set +CONFIG_AFS_FS=m +CONFIG_RXRPC=m +# CONFIG_9P_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +CONFIG_ACORN_PARTITION=y +# CONFIG_ACORN_PARTITION_CUMANA is not set +# CONFIG_ACORN_PARTITION_EESOX is not set +CONFIG_ACORN_PARTITION_ICS=y +# CONFIG_ACORN_PARTITION_ADFS is not set +# CONFIG_ACORN_PARTITION_POWERTEC is not set +CONFIG_ACORN_PARTITION_RISCIX=y +CONFIG_OSF_PARTITION=y +CONFIG_AMIGA_PARTITION=y +CONFIG_ATARI_PARTITION=y +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +# CONFIG_LDM_DEBUG is not set +CONFIG_SGI_PARTITION=y +CONFIG_ULTRIX_PARTITION=y +CONFIG_SUN_PARTITION=y +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m + +# +# Profiling support +# +CONFIG_PROFILING=y +CONFIG_OPROFILE=m + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set +CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_WAITQ is not set +# CONFIG_DEBUG_ERRORS is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +CONFIG_SECURITY=y +# CONFIG_SECURITY_NETWORK is not set +CONFIG_SECURITY_CAPABILITIES=m +CONFIG_SECURITY_ROOTPLUG=m +CONFIG_SECURITY_SECLVL=m + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_WP512=m +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_TEST=m + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_CRC_CCITT=m +CONFIG_CRC16=m +CONFIG_CRC32=y +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_REED_SOLOMON=m +CONFIG_REED_SOLOMON_DEC16=y diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig index 3cec29d56c8..f20814e6f49 100644 --- a/arch/arm/configs/s3c2410_defconfig +++ b/arch/arm/configs/s3c2410_defconfig @@ -1,12 +1,14 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.16 -# Mon Mar 20 20:36:02 2006 +# Linux kernel version: 2.6.17-git9 +# Sun Jun 25 23:56:32 2006 # CONFIG_ARM=y CONFIG_MMU=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_VECTORS_BASE=0xffff0000 # # Code maturity level options @@ -27,6 +29,7 @@ CONFIG_SYSVIPC=y CONFIG_SYSCTL=y # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set CONFIG_INITRAMFS_SOURCE="" CONFIG_UID16=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y @@ -42,22 +45,16 @@ CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_EPOLL=y CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 CONFIG_SLAB=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 # CONFIG_SLOB is not set -CONFIG_OBSOLETE_INTERMODULE=y # # Loadable module support # CONFIG_MODULES=y # CONFIG_MODULE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_KMOD=y @@ -65,6 +62,7 @@ CONFIG_KMOD=y # # Block layer # +# CONFIG_BLK_DEV_IO_TRACE is not set # # IO Schedulers @@ -82,17 +80,26 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # # System Type # +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91RM9200 is not set # CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set # CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set # CONFIG_ARCH_IOP3XX is not set # CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set # CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set @@ -100,12 +107,6 @@ CONFIG_ARCH_S3C2410=y # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_AT91RM9200 is not set # # S3C24XX Implementations @@ -116,14 +117,22 @@ CONFIG_ARCH_BAST=y CONFIG_BAST_PC104_IRQ=y CONFIG_ARCH_H1940=y CONFIG_MACH_N30=y +CONFIG_MACH_SMDK=y CONFIG_ARCH_SMDK2410=y CONFIG_ARCH_S3C2440=y +CONFIG_SMDK2440_CPU2440=y +CONFIG_SMDK2440_CPU2442=y +CONFIG_MACH_SMDK2413=y CONFIG_MACH_VR1000=y CONFIG_MACH_RX3715=y CONFIG_MACH_OTOM=y CONFIG_MACH_NEXCODER_2440=y +CONFIG_S3C2410_CLOCK=y CONFIG_CPU_S3C2410=y +CONFIG_CPU_S3C2412=y +CONFIG_CPU_S3C244X=y CONFIG_CPU_S3C2440=y +CONFIG_CPU_S3C2442=y # # S3C2410 Boot @@ -146,8 +155,11 @@ CONFIG_S3C2410_LOWLEVEL_UART_PORT=0 # CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y +CONFIG_CPU_ARM926T=y CONFIG_CPU_32v4=y +CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV4T=y +CONFIG_CPU_ABRT_EV5TJ=y CONFIG_CPU_CACHE_V4WT=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_COPY_V4WB=y @@ -160,6 +172,7 @@ CONFIG_CPU_TLB_V4WBI=y # CONFIG_CPU_ICACHE_DISABLE is not set # CONFIG_CPU_DCACHE_DISABLE is not set # CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set # # Bus support @@ -207,6 +220,7 @@ CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" CONFIG_FPE_NWFPE=y # CONFIG_FPE_NWFPE_XP is not set # CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set # # Userspace binary formats @@ -235,6 +249,8 @@ CONFIG_NET=y # CONFIG_NETDEBUG is not set # CONFIG_PACKET is not set CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set # CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set @@ -251,12 +267,18 @@ CONFIG_IP_PNP_BOOTP=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set # CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_BIC=y # CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set # CONFIG_NETFILTER is not set # @@ -311,6 +333,7 @@ CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set # CONFIG_DEBUG_DRIVER is not set +# CONFIG_SYS_HYPERVISOR is not set # # Connector - unified userspace <-> kernelspace linker @@ -360,7 +383,6 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_CFI_I8 is not set CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_AMDSTD_RETRY=0 # CONFIG_MTD_CFI_STAA is not set CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set @@ -385,7 +407,6 @@ CONFIG_MTD_BAST_MAXSIZE=4 # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set # CONFIG_MTD_BLOCK2MTD is not set # @@ -400,10 +421,12 @@ CONFIG_MTD_BAST_MAXSIZE=4 # CONFIG_MTD_NAND=y # CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set CONFIG_MTD_NAND_IDS=y CONFIG_MTD_NAND_S3C2410=y # CONFIG_MTD_NAND_S3C2410_DEBUG is not set # CONFIG_MTD_NAND_S3C2410_HWECC is not set +# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_NANDSIM is not set @@ -417,8 +440,8 @@ CONFIG_MTD_NAND_S3C2410=y # CONFIG_PARPORT=y # CONFIG_PARPORT_PC is not set -# CONFIG_PARPORT_ARC is not set # CONFIG_PARPORT_GSC is not set +# CONFIG_PARPORT_AX88796 is not set CONFIG_PARPORT_1284=y # @@ -694,7 +717,6 @@ CONFIG_S3C2410_WATCHDOG=y # # CONFIG_USBPCWATCHDOG is not set # CONFIG_NVRAM is not set -# CONFIG_RTC is not set CONFIG_S3C2410_RTC=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set @@ -728,6 +750,7 @@ CONFIG_I2C_ALGOBIT=m # # CONFIG_I2C_ELEKTOR is not set CONFIG_I2C_ISA=m +# CONFIG_I2C_OCORES is not set # CONFIG_I2C_PARPORT is not set # CONFIG_I2C_PARPORT_LIGHT is not set CONFIG_I2C_S3C2410=y @@ -743,9 +766,7 @@ CONFIG_SENSORS_EEPROM=m # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_RTC8564 is not set # CONFIG_SENSORS_MAX6875 is not set -# CONFIG_RTC_X1205_I2C is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set @@ -760,13 +781,13 @@ CONFIG_SENSORS_EEPROM=m # # Dallas's 1-wire bus # -# CONFIG_W1 is not set # # Hardware Monitoring support # CONFIG_HWMON=y CONFIG_HWMON_VID=m +# CONFIG_SENSORS_ABITUGURU is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set @@ -794,8 +815,10 @@ CONFIG_SENSORS_LM85=m # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set # CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83627HF is not set @@ -807,18 +830,29 @@ CONFIG_SENSORS_LM85=m # # -# Multimedia Capabilities Port drivers +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers # # # Multimedia devices # # CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_V4L2=y # # Digital Video Broadcasting Devices # # CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set # # Graphics support @@ -828,6 +862,8 @@ CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y # CONFIG_FB_MACMODES is not set +CONFIG_FB_FIRMWARE_EDID=y +# CONFIG_FB_BACKLIGHT is not set CONFIG_FB_MODE_HELPERS=y # CONFIG_FB_TILEBLITTING is not set # CONFIG_FB_S1D13XXX is not set @@ -863,6 +899,7 @@ CONFIG_FONT_8x16=y # CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set CONFIG_USB=y # CONFIG_USB_DEBUG is not set @@ -915,9 +952,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_ACECAD is not set # CONFIG_USB_KBTAB is not set # CONFIG_USB_POWERMATE is not set -# CONFIG_USB_MTOUCH is not set -# CONFIG_USB_ITMTOUCH is not set -# CONFIG_USB_EGALAX is not set +# CONFIG_USB_TOUCHSCREEN is not set # CONFIG_USB_YEALINK is not set # CONFIG_USB_XPAD is not set # CONFIG_USB_ATI_REMOTE is not set @@ -931,15 +966,6 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_MDC800 is not set # -# USB Multimedia devices -# -# CONFIG_USB_DABUSB is not set - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# # USB Network Adapters # # CONFIG_USB_CATC is not set @@ -969,10 +995,12 @@ CONFIG_USB_MON=y # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set # CONFIG_USB_LED is not set +# CONFIG_USB_CY7C63 is not set # CONFIG_USB_CYTHERM is not set # CONFIG_USB_PHIDGETKIT is not set # CONFIG_USB_PHIDGETSERVO is not set # CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_LD is not set # CONFIG_USB_TEST is not set @@ -984,17 +1012,6 @@ CONFIG_USB_MON=y # USB Gadget Support # # CONFIG_USB_GADGET is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_PXA2XX is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -# CONFIG_USB_ZERO is not set -# CONFIG_USB_ETH is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set # # MMC/SD Card support @@ -1002,6 +1019,12 @@ CONFIG_USB_MON=y # CONFIG_MMC is not set # +# Real Time Clock +# +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# # File systems # CONFIG_EXT2_FS=y @@ -1022,6 +1045,7 @@ CONFIG_FS_MBCACHE=y # CONFIG_MINIX_FS is not set CONFIG_ROMFS_FS=y CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set @@ -1052,7 +1076,6 @@ CONFIG_SYSFS=y # CONFIG_TMPFS is not set # CONFIG_HUGETLB_PAGE is not set CONFIG_RAMFS=y -# CONFIG_RELAYFS_FS is not set # CONFIG_CONFIGFS_FS is not set # @@ -1193,6 +1216,7 @@ CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_FS is not set # CONFIG_DEBUG_VM is not set CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set CONFIG_FORCED_INLINING=y # CONFIG_RCU_TORTURE_TEST is not set CONFIG_DEBUG_USER=y diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig new file mode 100644 index 00000000000..a6698dc4f6b --- /dev/null +++ b/arch/arm/configs/trizeps4_defconfig @@ -0,0 +1,1579 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.17 +# Sat Jun 24 22:45:14 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_SYSCTL=y +CONFIG_AUDIT=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set +CONFIG_OBSOLETE_INTERMODULE=y + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y + +# +# Block layer +# +# CONFIG_BLK_DEV_IO_TRACE is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_AT91RM9200 is not set + +# +# Intel PXA2xx Implementations +# +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +CONFIG_MACH_TRIZEPS4=y +CONFIG_MACH_TRIZEPS4_CONXS=y +# CONFIG_MACH_TRIZEPS4_ANY is not set +CONFIG_PXA27x=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +CONFIG_PCCARD=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=m +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# +CONFIG_PCMCIA_PXA2XX=m + +# +# Kernel Features +# +CONFIG_PREEMPT=y +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +CONFIG_LEDS=y +CONFIG_LEDS_TIMER=y +CONFIG_LEDS_CPU=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200n8" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +CONFIG_FPE_NWFPE_XP=y +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=m +# CONFIG_ARTHUR is not set + +# +# Power management options +# +CONFIG_PM=y +CONFIG_PM_LEGACY=y +# CONFIG_PM_DEBUG is not set +CONFIG_APM=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=m +CONFIG_NET_KEY=y +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y + +# +# IP: Virtual Server Configuration +# +# CONFIG_IP_VS is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_IPV6_TUNNEL is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK is not set +# CONFIG_NETFILTER_XTABLES is not set + +# +# IP: Netfilter Configuration +# +CONFIG_IP_NF_CONNTRACK=m +CONFIG_IP_NF_CT_ACCT=y +CONFIG_IP_NF_CONNTRACK_MARK=y +# CONFIG_IP_NF_CONNTRACK_EVENTS is not set +# CONFIG_IP_NF_CT_PROTO_SCTP is not set +CONFIG_IP_NF_FTP=m +CONFIG_IP_NF_IRC=m +# CONFIG_IP_NF_NETBIOS_NS is not set +CONFIG_IP_NF_TFTP=m +CONFIG_IP_NF_AMANDA=m +# CONFIG_IP_NF_PPTP is not set +# CONFIG_IP_NF_H323 is not set +CONFIG_IP_NF_QUEUE=m + +# +# IPv6: Netfilter Configuration (EXPERIMENTAL) +# +# CONFIG_IP6_NF_QUEUE is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +CONFIG_VLAN_8021Q=m +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +CONFIG_IRDA=m + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRNET=m +CONFIG_IRCOMM=m +CONFIG_IRDA_ULTRA=y + +# +# IrDA options +# +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_FAST_RR=y +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +CONFIG_IRTTY_SIR=m + +# +# Dongle support +# +# CONFIG_DONGLE is not set + +# +# Old SIR device drivers +# +# CONFIG_IRPORT_SIR is not set + +# +# Old Serial dongle support +# + +# +# FIR device drivers +# +# CONFIG_USB_IRDA is not set +# CONFIG_SIGMATEL_FIR is not set +# CONFIG_PXA_FICP is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIUSB is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIDTL1 is not set +# CONFIG_BT_HCIBT3C is not set +# CONFIG_BT_HCIBLUECARD is not set +# CONFIG_BT_HCIBTUART is not set +# CONFIG_BT_HCIVHCI is not set +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=m +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +CONFIG_IEEE80211_SOFTMAC=m +# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set +CONFIG_WIRELESS_EXT=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y + +# +# Connector - unified userspace <-> kernelspace linker +# +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y +CONFIG_MTD_REDBOOT_PARTS_READONLY=y +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +CONFIG_NFTL=y +CONFIG_NFTL_RW=y +CONFIG_INFTL=y +# CONFIG_RFD_FTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +# CONFIG_MTD_CFI_NOSWAP is not set +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +CONFIG_MTD_CFI_LE_BYTE_SWAP=y +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x4000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_TRIZEPS4 is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +CONFIG_MTD_DOC2001PLUS=y +CONFIG_MTD_DOCPROBE=y +CONFIG_MTD_DOCECC=y +# CONFIG_MTD_DOCPROBE_ADVANCED is not set +CONFIG_MTD_DOCPROBE_ADDRESS=0 + +# +# NAND Flash Device Drivers +# +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_H1900 is not set +CONFIG_MTD_NAND_IDS=y +CONFIG_MTD_NAND_DISKONCHIP=y +# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 +# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set +# CONFIG_MTD_NAND_SHARPSL is not set +# CONFIG_MTD_NAND_NANDSIM is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=m +CONFIG_BLK_DEV_NBD=y +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=4 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +CONFIG_IDEDISK_MULTI_MODE=y +CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_BLK_DEV_IDESCSI is not set +# CONFIG_IDE_TASK_IOCTL is not set + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=y +CONFIG_IDE_PXA_CF=y +CONFIG_IDE_ARM=y +# CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_DEBUG is not set + +# +# PCMCIA SCSI adapter support +# +# CONFIG_PCMCIA_AHA152X is not set +# CONFIG_PCMCIA_FDOMAIN is not set +# CONFIG_PCMCIA_NINJA_SCSI is not set +# CONFIG_PCMCIA_QLOGIC is not set +# CONFIG_PCMCIA_SYM53C500 is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +CONFIG_DAVICOM_PHY=y +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_SMC91X is not set +CONFIG_DM9000=y + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y +# CONFIG_NET_WIRELESS_RTNETLINK is not set + +# +# Obsolete Wireless cards support (pre-802.11) +# +# CONFIG_STRIP is not set +# CONFIG_PCMCIA_WAVELAN is not set +# CONFIG_PCMCIA_NETWAVE is not set + +# +# Wireless 802.11 Frequency Hopping cards support +# +# CONFIG_PCMCIA_RAYCS is not set + +# +# Wireless 802.11b ISA/PCI cards support +# +CONFIG_HERMES=m +# CONFIG_ATMEL is not set + +# +# Wireless 802.11b Pcmcia/Cardbus cards support +# +CONFIG_PCMCIA_HERMES=m +# CONFIG_PCMCIA_SPECTRUM is not set +CONFIG_AIRO_CS=m +# CONFIG_PCMCIA_WL3501 is not set +CONFIG_HOSTAP=m +CONFIG_HOSTAP_FIRMWARE=y +CONFIG_HOSTAP_FIRMWARE_NVRAM=y +CONFIG_HOSTAP_CS=m +CONFIG_NET_WIRELESS=y + +# +# PCMCIA network device support +# +# CONFIG_NET_PCMCIA is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +CONFIG_PPP=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_MPPE=m +# CONFIG_PPPOE is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_TSDEV=y +CONFIG_INPUT_TSDEV_SCREEN_X=640 +CONFIG_INPUT_TSDEV_SCREEN_Y=480 +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_MOUSE_SERIAL=y +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_INPUT_JOYSTICK is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=m + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_SA1100_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +CONFIG_I2C_PXA=y +CONFIG_I2C_PXA_SLAVE=y +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +CONFIG_SENSORS_EEPROM=m +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_PXA2XX=m + +# +# SPI Protocol Masters +# + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# Multimedia Capabilities Port drivers +# +CONFIG_UCB1400=y +CONFIG_UCB1400_TS=y + +# +# LED devices +# +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_IDE_DISK=y + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_V4L2=y + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +CONFIG_FB=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_MACMODES is not set +CONFIG_FB_FIRMWARE_EDID=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +# CONFIG_FB_PXA_PARAMETERS is not set +# CONFIG_FB_VIRTUAL is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set + +# +# Logo configuration +# +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_DEVICE=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_DEVICE=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_SEQUENCER=m +# CONFIG_SND_SEQ_DUMMY is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_SEQUENCER_OSS is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VERBOSE_PRINTK=y +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +CONFIG_SND_AC97_CODEC=y +CONFIG_SND_AC97_BUS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +CONFIG_SND_PXA2XX_PCM=y +CONFIG_SND_PXA2XX_AC97=y + +# +# USB devices +# +CONFIG_SND_USB_AUDIO=m + +# +# PCMCIA devices +# +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +CONFIG_USB_HIDINPUT=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +CONFIG_USB_TOUCHSCREEN=m +# CONFIG_USB_TOUCHSCREEN_EGALAX is not set +# CONFIG_USB_TOUCHSCREEN_PANJIT is not set +# CONFIG_USB_TOUCHSCREEN_3M is not set +# CONFIG_USB_TOUCHSCREEN_ITM is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_ZD1201 is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGETKIT is not set +# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_AT91 is not set +CONFIG_USB_GADGET_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=y +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m + +# +# MMC/SD Card support +# +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_BLOCK=y +CONFIG_MMC_PXA=y + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y + +# +# RTC drivers +# +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_SA1100=y +# CONFIG_RTC_DRV_TEST is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=y +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS_FS=y +CONFIG_JFFS_FS_VERBOSE=0 +CONFIG_JFFS_PROC_FS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_SUMMARY is not set +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=y +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFSD_TCP=y +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +CONFIG_LDM_PARTITION=y +# CONFIG_LDM_DEBUG is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-15" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=m +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m + +# +# Profiling support +# +CONFIG_PROFILING=y +CONFIG_OPROFILE=y + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_MAGIC_SYSRQ=y +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_FS is not set +CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set +CONFIG_DEBUG_USER=y + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y +CONFIG_SECURITY=y +# CONFIG_SECURITY_NETWORK is not set +CONFIG_SECURITY_CAPABILITIES=y +# CONFIG_SECURITY_ROOTPLUG is not set +# CONFIG_SECURITY_SECLVL is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_NULL is not set +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC32=y +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_REED_SOLOMON=y +CONFIG_REED_SOLOMON_DEC16=y diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index a601b8b55f3..f0c0cdb1c18 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -22,7 +22,10 @@ obj-$(CONFIG_PCI) += bios32.o obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o -obj-$(CONFIG_IWMMXT) += iwmmxt.o +obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o +AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 + +obj-$(CONFIG_IWMMXT) += iwmmxt.o iwmmxt-notifier.o AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt ifneq ($(CONFIG_ARCH_EBSA110),y) diff --git a/arch/arm/kernel/apm.c b/arch/arm/kernel/apm.c index 2bed290fec7..33c55689f99 100644 --- a/arch/arm/kernel/apm.c +++ b/arch/arm/kernel/apm.c @@ -10,7 +10,6 @@ * [This document is available from Microsoft at: * http://www.microsoft.com/hwdev/busbios/amp_12.htm] */ -#include <linux/config.h> #include <linux/module.h> #include <linux/poll.h> #include <linux/timer.h> diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index c49b5d4d7fc..da69e660574 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -109,11 +109,13 @@ EXPORT_SYMBOL(memchr); EXPORT_SYMBOL(__memzero); /* user mem (segment) */ -EXPORT_SYMBOL(__arch_copy_from_user); -EXPORT_SYMBOL(__arch_copy_to_user); -EXPORT_SYMBOL(__arch_clear_user); -EXPORT_SYMBOL(__arch_strnlen_user); -EXPORT_SYMBOL(__arch_strncpy_from_user); +EXPORT_SYMBOL(__strnlen_user); +EXPORT_SYMBOL(__strncpy_from_user); + +#ifdef CONFIG_MMU +EXPORT_SYMBOL(__copy_from_user); +EXPORT_SYMBOL(__copy_to_user); +EXPORT_SYMBOL(__clear_user); EXPORT_SYMBOL(__get_user_1); EXPORT_SYMBOL(__get_user_2); @@ -123,6 +125,7 @@ EXPORT_SYMBOL(__put_user_1); EXPORT_SYMBOL(__put_user_2); EXPORT_SYMBOL(__put_user_4); EXPORT_SYMBOL(__put_user_8); +#endif /* crypto hash */ EXPORT_SYMBOL(sha_transform); diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 396efba9bac..cc2d58d028e 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c @@ -60,6 +60,9 @@ int main(void) #ifdef CONFIG_IWMMXT DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt)); #endif +#ifdef CONFIG_CRUNCH + DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate)); +#endif BLANK(); DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0)); DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1)); @@ -102,6 +105,7 @@ int main(void) BLANK(); DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list)); DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush)); - DEFINE(PROCINFO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mmu_flags)); + DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags)); + DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags)); return 0; } diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index de606dfa8db..964faac104f 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -5,7 +5,6 @@ * * Bits taken from various places. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/pci.h> @@ -304,7 +303,7 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev) static void __devinit pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev) { - unsigned long offset; + resource_size_t offset; int i; for (i = 0; i < PCI_NUM_RESOURCES; i++) { @@ -634,9 +633,9 @@ char * __init pcibios_setup(char *str) * which might be mirrored at 0x0100-0x03ff.. */ void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { - unsigned long start = res->start; + resource_size_t start = res->start; if (res->flags & IORESOURCE_IO && start & 0x300) start = (start + 0x3ff) & ~0x3ff; @@ -702,7 +701,6 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, /* * Mark this as IO */ - vma->vm_flags |= VM_SHM | VM_LOCKED | VM_IO; vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); if (remap_pfn_range(vma, vma->vm_start, phys, diff --git a/arch/arm/kernel/compat.c b/arch/arm/kernel/compat.c index 60cfa7f3226..0a1385442f4 100644 --- a/arch/arm/kernel/compat.c +++ b/arch/arm/kernel/compat.c @@ -15,7 +15,6 @@ * the kernel for 5 years from now (2001). This will allow boot loaders * to convert to the new struct tag way. */ -#include <linux/config.h> #include <linux/types.h> #include <linux/kernel.h> #include <linux/string.h> diff --git a/arch/arm/kernel/crunch-bits.S b/arch/arm/kernel/crunch-bits.S new file mode 100644 index 00000000000..a26886758c6 --- /dev/null +++ b/arch/arm/kernel/crunch-bits.S @@ -0,0 +1,305 @@ +/* + * arch/arm/kernel/crunch-bits.S + * Cirrus MaverickCrunch context switching and handling + * + * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> + * + * Shamelessly stolen from the iWMMXt code by Nicolas Pitre, which is + * Copyright (c) 2003-2004, MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/linkage.h> +#include <asm/ptrace.h> +#include <asm/thread_info.h> +#include <asm/asm-offsets.h> +#include <asm/arch/ep93xx-regs.h> + +/* + * We can't use hex constants here due to a bug in gas. + */ +#define CRUNCH_MVDX0 0 +#define CRUNCH_MVDX1 8 +#define CRUNCH_MVDX2 16 +#define CRUNCH_MVDX3 24 +#define CRUNCH_MVDX4 32 +#define CRUNCH_MVDX5 40 +#define CRUNCH_MVDX6 48 +#define CRUNCH_MVDX7 56 +#define CRUNCH_MVDX8 64 +#define CRUNCH_MVDX9 72 +#define CRUNCH_MVDX10 80 +#define CRUNCH_MVDX11 88 +#define CRUNCH_MVDX12 96 +#define CRUNCH_MVDX13 104 +#define CRUNCH_MVDX14 112 +#define CRUNCH_MVDX15 120 +#define CRUNCH_MVAX0L 128 +#define CRUNCH_MVAX0M 132 +#define CRUNCH_MVAX0H 136 +#define CRUNCH_MVAX1L 140 +#define CRUNCH_MVAX1M 144 +#define CRUNCH_MVAX1H 148 +#define CRUNCH_MVAX2L 152 +#define CRUNCH_MVAX2M 156 +#define CRUNCH_MVAX2H 160 +#define CRUNCH_MVAX3L 164 +#define CRUNCH_MVAX3M 168 +#define CRUNCH_MVAX3H 172 +#define CRUNCH_DSPSC 176 + +#define CRUNCH_SIZE 184 + + .text + +/* + * Lazy switching of crunch coprocessor context + * + * r10 = struct thread_info pointer + * r9 = ret_from_exception + * lr = undefined instr exit + * + * called from prefetch exception handler with interrupts disabled + */ +ENTRY(crunch_task_enable) + ldr r8, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr + + ldr r1, [r8, #0x80] + tst r1, #0x00800000 @ access to crunch enabled? + movne pc, lr @ if so no business here + mov r3, #0xaa @ unlock syscon swlock + str r3, [r8, #0xc0] + orr r1, r1, #0x00800000 @ enable access to crunch + str r1, [r8, #0x80] + + ldr r3, =crunch_owner + add r0, r10, #TI_CRUNCH_STATE @ get task crunch save area + ldr r2, [sp, #60] @ current task pc value + ldr r1, [r3] @ get current crunch owner + str r0, [r3] @ this task now owns crunch + sub r2, r2, #4 @ adjust pc back + str r2, [sp, #60] + + ldr r2, [r8, #0x80] + mov r2, r2 @ flush out enable (@@@) + + teq r1, #0 @ test for last ownership + mov lr, r9 @ normal exit from exception + beq crunch_load @ no owner, skip save + +crunch_save: + cfstr64 mvdx0, [r1, #CRUNCH_MVDX0] @ save 64b registers + cfstr64 mvdx1, [r1, #CRUNCH_MVDX1] + cfstr64 mvdx2, [r1, #CRUNCH_MVDX2] + cfstr64 mvdx3, [r1, #CRUNCH_MVDX3] + cfstr64 mvdx4, [r1, #CRUNCH_MVDX4] + cfstr64 mvdx5, [r1, #CRUNCH_MVDX5] + cfstr64 mvdx6, [r1, #CRUNCH_MVDX6] + cfstr64 mvdx7, [r1, #CRUNCH_MVDX7] + cfstr64 mvdx8, [r1, #CRUNCH_MVDX8] + cfstr64 mvdx9, [r1, #CRUNCH_MVDX9] + cfstr64 mvdx10, [r1, #CRUNCH_MVDX10] + cfstr64 mvdx11, [r1, #CRUNCH_MVDX11] + cfstr64 mvdx12, [r1, #CRUNCH_MVDX12] + cfstr64 mvdx13, [r1, #CRUNCH_MVDX13] + cfstr64 mvdx14, [r1, #CRUNCH_MVDX14] + cfstr64 mvdx15, [r1, #CRUNCH_MVDX15] + +#ifdef __ARMEB__ +#error fix me for ARMEB +#endif + + cfmv32al mvfx0, mvax0 @ save 72b accumulators + cfstr32 mvfx0, [r1, #CRUNCH_MVAX0L] + cfmv32am mvfx0, mvax0 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX0M] + cfmv32ah mvfx0, mvax0 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX0H] + cfmv32al mvfx0, mvax1 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX1L] + cfmv32am mvfx0, mvax1 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX1M] + cfmv32ah mvfx0, mvax1 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX1H] + cfmv32al mvfx0, mvax2 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX2L] + cfmv32am mvfx0, mvax2 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX2M] + cfmv32ah mvfx0, mvax2 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX2H] + cfmv32al mvfx0, mvax3 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX3L] + cfmv32am mvfx0, mvax3 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX3M] + cfmv32ah mvfx0, mvax3 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX3H] + + cfmv32sc mvdx0, dspsc @ save status word + cfstr64 mvdx0, [r1, #CRUNCH_DSPSC] + + teq r0, #0 @ anything to load? + cfldr64eq mvdx0, [r1, #CRUNCH_MVDX0] @ mvdx0 was clobbered + moveq pc, lr + +crunch_load: + cfldr64 mvdx0, [r0, #CRUNCH_DSPSC] @ load status word + cfmvsc32 dspsc, mvdx0 + + cfldr32 mvfx0, [r0, #CRUNCH_MVAX0L] @ load 72b accumulators + cfmval32 mvax0, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX0M] + cfmvam32 mvax0, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX0H] + cfmvah32 mvax0, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX1L] + cfmval32 mvax1, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX1M] + cfmvam32 mvax1, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX1H] + cfmvah32 mvax1, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX2L] + cfmval32 mvax2, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX2M] + cfmvam32 mvax2, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX2H] + cfmvah32 mvax2, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX3L] + cfmval32 mvax3, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX3M] + cfmvam32 mvax3, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX3H] + cfmvah32 mvax3, mvfx0 + + cfldr64 mvdx0, [r0, #CRUNCH_MVDX0] @ load 64b registers + cfldr64 mvdx1, [r0, #CRUNCH_MVDX1] + cfldr64 mvdx2, [r0, #CRUNCH_MVDX2] + cfldr64 mvdx3, [r0, #CRUNCH_MVDX3] + cfldr64 mvdx4, [r0, #CRUNCH_MVDX4] + cfldr64 mvdx5, [r0, #CRUNCH_MVDX5] + cfldr64 mvdx6, [r0, #CRUNCH_MVDX6] + cfldr64 mvdx7, [r0, #CRUNCH_MVDX7] + cfldr64 mvdx8, [r0, #CRUNCH_MVDX8] + cfldr64 mvdx9, [r0, #CRUNCH_MVDX9] + cfldr64 mvdx10, [r0, #CRUNCH_MVDX10] + cfldr64 mvdx11, [r0, #CRUNCH_MVDX11] + cfldr64 mvdx12, [r0, #CRUNCH_MVDX12] + cfldr64 mvdx13, [r0, #CRUNCH_MVDX13] + cfldr64 mvdx14, [r0, #CRUNCH_MVDX14] + cfldr64 mvdx15, [r0, #CRUNCH_MVDX15] + + mov pc, lr + +/* + * Back up crunch regs to save area and disable access to them + * (mainly for gdb or sleep mode usage) + * + * r0 = struct thread_info pointer of target task or NULL for any + */ +ENTRY(crunch_task_disable) + stmfd sp!, {r4, r5, lr} + + mrs ip, cpsr + orr r2, ip, #PSR_I_BIT @ disable interrupts + msr cpsr_c, r2 + + ldr r4, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr + + ldr r3, =crunch_owner + add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area + ldr r1, [r3] @ get current crunch owner + teq r1, #0 @ any current owner? + beq 1f @ no: quit + teq r0, #0 @ any owner? + teqne r1, r2 @ or specified one? + bne 1f @ no: quit + + ldr r5, [r4, #0x80] @ enable access to crunch + mov r2, #0xaa + str r2, [r4, #0xc0] + orr r5, r5, #0x00800000 + str r5, [r4, #0x80] + + mov r0, #0 @ nothing to load + str r0, [r3] @ no more current owner + ldr r2, [r4, #0x80] @ flush out enable (@@@) + mov r2, r2 + bl crunch_save + + mov r2, #0xaa @ disable access to crunch + str r2, [r4, #0xc0] + bic r5, r5, #0x00800000 + str r5, [r4, #0x80] + ldr r5, [r4, #0x80] @ flush out enable (@@@) + mov r5, r5 + +1: msr cpsr_c, ip @ restore interrupt mode + ldmfd sp!, {r4, r5, pc} + +/* + * Copy crunch state to given memory address + * + * r0 = struct thread_info pointer of target task + * r1 = memory address where to store crunch state + * + * this is called mainly in the creation of signal stack frames + */ +ENTRY(crunch_task_copy) + mrs ip, cpsr + orr r2, ip, #PSR_I_BIT @ disable interrupts + msr cpsr_c, r2 + + ldr r3, =crunch_owner + add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area + ldr r3, [r3] @ get current crunch owner + teq r2, r3 @ does this task own it... + beq 1f + + @ current crunch values are in the task save area + msr cpsr_c, ip @ restore interrupt mode + mov r0, r1 + mov r1, r2 + mov r2, #CRUNCH_SIZE + b memcpy + +1: @ this task owns crunch regs -- grab a copy from there + mov r0, #0 @ nothing to load + mov r3, lr @ preserve return address + bl crunch_save + msr cpsr_c, ip @ restore interrupt mode + mov pc, r3 + +/* + * Restore crunch state from given memory address + * + * r0 = struct thread_info pointer of target task + * r1 = memory address where to get crunch state from + * + * this is used to restore crunch state when unwinding a signal stack frame + */ +ENTRY(crunch_task_restore) + mrs ip, cpsr + orr r2, ip, #PSR_I_BIT @ disable interrupts + msr cpsr_c, r2 + + ldr r3, =crunch_owner + add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area + ldr r3, [r3] @ get current crunch owner + teq r2, r3 @ does this task own it... + beq 1f + + @ this task doesn't own crunch regs -- use its save area + msr cpsr_c, ip @ restore interrupt mode + mov r0, r2 + mov r2, #CRUNCH_SIZE + b memcpy + +1: @ this task owns crunch regs -- load them directly + mov r0, r1 + mov r1, #0 @ nothing to save + mov r3, lr @ preserve return address + bl crunch_load + msr cpsr_c, ip @ restore interrupt mode + mov pc, r3 diff --git a/arch/arm/kernel/crunch.c b/arch/arm/kernel/crunch.c new file mode 100644 index 00000000000..748175921f9 --- /dev/null +++ b/arch/arm/kernel/crunch.c @@ -0,0 +1,83 @@ +/* + * arch/arm/kernel/crunch.c + * Cirrus MaverickCrunch context switching and handling + * + * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/config.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/signal.h> +#include <linux/sched.h> +#include <linux/init.h> +#include <asm/arch/ep93xx-regs.h> +#include <asm/thread_notify.h> +#include <asm/io.h> + +struct crunch_state *crunch_owner; + +void crunch_task_release(struct thread_info *thread) +{ + local_irq_disable(); + if (crunch_owner == &thread->crunchstate) + crunch_owner = NULL; + local_irq_enable(); +} + +static int crunch_enabled(u32 devcfg) +{ + return !!(devcfg & EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE); +} + +static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t) +{ + struct thread_info *thread = (struct thread_info *)t; + struct crunch_state *crunch_state; + u32 devcfg; + + crunch_state = &thread->crunchstate; + + switch (cmd) { + case THREAD_NOTIFY_FLUSH: + memset(crunch_state, 0, sizeof(*crunch_state)); + + /* + * FALLTHROUGH: Ensure we don't try to overwrite our newly + * initialised state information on the first fault. + */ + + case THREAD_NOTIFY_RELEASE: + crunch_task_release(thread); + break; + + case THREAD_NOTIFY_SWITCH: + devcfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG); + if (crunch_enabled(devcfg) || crunch_owner == crunch_state) { + devcfg ^= EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE; + __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); + __raw_writel(devcfg, EP93XX_SYSCON_DEVICE_CONFIG); + } + break; + } + + return NOTIFY_DONE; +} + +static struct notifier_block crunch_notifier_block = { + .notifier_call = crunch_do, +}; + +static int __init crunch_init(void) +{ + thread_register_notifier(&crunch_notifier_block); + + return 0; +} + +late_initcall(crunch_init); diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index da280bae3d0..a5747e58a9d 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -9,7 +9,6 @@ * * 32-bit debugging code */ -#include <linux/config.h> #include <linux/linkage.h> .text diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 00aa225e8d9..ab4ad9562ee 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -27,7 +27,6 @@ */ #define ECARD_C -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/types.h> @@ -620,7 +619,7 @@ ecard_irqexp_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg ecard_t *ec = slot_to_ecard(slot); if (ec->claimed) { - struct irqdesc *d = irqdesc + ec->irq; + struct irq_desc *d = irq_desc + ec->irq; /* * this ugly code is so that we can operate a * prioritorising system: diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index ab8e600c18c..7ea5f01dfc7 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -14,12 +14,12 @@ * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction that causes * it to save wrong values... Be aware! */ -#include <linux/config.h> #include <asm/memory.h> #include <asm/glue.h> #include <asm/vfpmacros.h> #include <asm/arch/entry-macro.S> +#include <asm/thread_notify.h> #include "entry-header.S" @@ -491,9 +491,15 @@ call_fpe: b do_fpe @ CP#1 (FPE) b do_fpe @ CP#2 (FPE) mov pc, lr @ CP#3 +#ifdef CONFIG_CRUNCH + b crunch_task_enable @ CP#4 (MaverickCrunch) + b crunch_task_enable @ CP#5 (MaverickCrunch) + b crunch_task_enable @ CP#6 (MaverickCrunch) +#else mov pc, lr @ CP#4 mov pc, lr @ CP#5 mov pc, lr @ CP#6 +#endif mov pc, lr @ CP#7 mov pc, lr @ CP#8 mov pc, lr @ CP#9 @@ -560,10 +566,8 @@ ENTRY(__switch_to) add ip, r1, #TI_CPU_SAVE ldr r3, [r2, #TI_TP_VALUE] stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack -#ifndef CONFIG_MMU - add r2, r2, #TI_CPU_DOMAIN -#else - ldr r6, [r2, #TI_CPU_DOMAIN]! +#ifdef CONFIG_MMU + ldr r6, [r2, #TI_CPU_DOMAIN] #endif #if __LINUX_ARM_ARCH__ >= 6 #ifdef CONFIG_CPU_32v6K @@ -585,21 +589,18 @@ ENTRY(__switch_to) #ifdef CONFIG_MMU mcr p15, 0, r6, c3, c0, 0 @ Set domain register #endif -#ifdef CONFIG_VFP - @ Always disable VFP so we can lazily save/restore the old - @ state. This occurs in the context of the previous thread. - VFPFMRX r4, FPEXC - bic r4, r4, #FPEXC_ENABLE - VFPFMXR FPEXC, r4 -#endif -#if defined(CONFIG_IWMMXT) - bl iwmmxt_task_switch -#elif defined(CONFIG_CPU_XSCALE) - add r4, r2, #40 @ cpu_context_save->extra +#if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT) + add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra ldmib r4, {r4, r5} mar acc0, r4, r5 #endif - ldmib r2, {r4 - sl, fp, sp, pc} @ Load all regs saved previously + mov r5, r0 + add r4, r2, #TI_CPU_SAVE + ldr r0, =thread_notify_head + mov r1, #THREAD_NOTIFY_SWITCH + bl atomic_notifier_call_chain + mov r0, r5 + ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously __INIT diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index dbcb11a31f7..6f5e7c50d42 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -7,7 +7,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <asm/unistd.h> @@ -271,7 +270,7 @@ ENTRY(sys_call_table) @ r8 = syscall table .type sys_syscall, #function sys_syscall: - eor scno, r0, #__NR_OABI_SYSCALL_BASE + bic scno, r0, #__NR_OABI_SYSCALL_BASE cmp scno, #__NR_syscall - __NR_SYSCALL_BASE cmpne scno, #NR_syscalls @ check range stmloia sp, {r5, r6} @ shuffle args @@ -340,7 +339,7 @@ sys_mmap2: streq r5, [sp, #4] beq do_mmap2 mov r0, #-EINVAL - RETINSTR(mov,pc, lr) + mov pc, lr #else str r5, [sp, #4] b do_mmap2 diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index f1c2fd5b63e..87ab4e15799 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S @@ -1,4 +1,3 @@ -#include <linux/config.h> #include <linux/init.h> #include <linux/linkage.h> diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index 1ec3f7faa25..e8e90346f11 100644 --- a/arch/arm/kernel/fiq.c +++ b/arch/arm/kernel/fiq.c @@ -38,6 +38,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/interrupt.h> #include <linux/seq_file.h> #include <asm/cacheflush.h> diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index adf62e5eaad..ac9eb3d3051 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S @@ -12,7 +12,6 @@ * for 32-bit CPUs which has a process ID register(CP15). * */ -#include <linux/config.h> #include <linux/linkage.h> #include <linux/init.h> @@ -39,7 +38,7 @@ __INIT .type stext, %function ENTRY(stext) - msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode @ and irqs disabled mrc p15, 0, r9, c0, c0 @ get processor id bl __lookup_processor_type @ r5=procinfo r9=cpuid diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 04f7344e356..2242f5f7cb7 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -11,7 +11,6 @@ * * Kernel startup code for all 32-bit CPUs */ -#include <linux/config.h> #include <linux/linkage.h> #include <linux/init.h> @@ -71,7 +70,7 @@ __INIT .type stext, %function ENTRY(stext) - msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode @ and irqs disabled mrc p15, 0, r9, c0, c0 @ get processor id bl __lookup_processor_type @ r5=procinfo r9=cpuid @@ -104,7 +103,7 @@ ENTRY(secondary_startup) * the processor type - there is no need to check the machine type * as it has already been validated by the primary processor. */ - msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE mrc p15, 0, r9, c0, c0 @ get processor id bl __lookup_processor_type movs r10, r5 @ invalid processor? @@ -221,7 +220,7 @@ __create_page_tables: teq r0, r6 bne 1b - ldr r7, [r10, #PROCINFO_MMUFLAGS] @ mmuflags + ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags /* * Create identity mapping for first MB of kernel to @@ -272,8 +271,7 @@ __create_page_tables: #endif #ifdef CONFIG_DEBUG_LL - bic r7, r7, #0x0c @ turn off cacheable - @ and bufferable bits + ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags /* * Map in IO space for serial debugging. * This allows debug messages to be output diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 2d5896b3618..c3d4e94ef5b 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -21,12 +21,12 @@ * IRQ's are in fact implemented a bit like signal handlers for the kernel. * Naturally it's not a 1:1 relation, but there are similarities. */ -#include <linux/config.h> #include <linux/kernel_stat.h> #include <linux/module.h> #include <linux/signal.h> #include <linux/ioport.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/ptrace.h> #include <linux/slab.h> #include <linux/random.h> @@ -38,192 +38,18 @@ #include <linux/kallsyms.h> #include <linux/proc_fs.h> -#include <asm/irq.h> #include <asm/system.h> -#include <asm/mach/irq.h> #include <asm/mach/time.h> /* - * Maximum IRQ count. Currently, this is arbitary. However, it should - * not be set too low to prevent false triggering. Conversely, if it - * is set too high, then you could miss a stuck IRQ. - * - * Maybe we ought to set a timer and re-enable the IRQ at a later time? - */ -#define MAX_IRQ_CNT 100000 - -static int noirqdebug; -static volatile unsigned long irq_err_count; -static DEFINE_SPINLOCK(irq_controller_lock); -static LIST_HEAD(irq_pending); - -struct irqdesc irq_desc[NR_IRQS]; -void (*init_arch_irq)(void) __initdata = NULL; - -/* * No architecture-specific irq_finish function defined in arm/arch/irqs.h. */ #ifndef irq_finish #define irq_finish(irq) do { } while (0) #endif -/* - * Dummy mask/unmask handler - */ -void dummy_mask_unmask_irq(unsigned int irq) -{ -} - -irqreturn_t no_action(int irq, void *dev_id, struct pt_regs *regs) -{ - return IRQ_NONE; -} - -void do_bad_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) -{ - irq_err_count += 1; - printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq); -} - -static struct irqchip bad_chip = { - .ack = dummy_mask_unmask_irq, - .mask = dummy_mask_unmask_irq, - .unmask = dummy_mask_unmask_irq, -}; - -static struct irqdesc bad_irq_desc = { - .chip = &bad_chip, - .handle = do_bad_IRQ, - .pend = LIST_HEAD_INIT(bad_irq_desc.pend), - .disable_depth = 1, -}; - -#ifdef CONFIG_SMP -void synchronize_irq(unsigned int irq) -{ - struct irqdesc *desc = irq_desc + irq; - - while (desc->running) - barrier(); -} -EXPORT_SYMBOL(synchronize_irq); - -#define smp_set_running(desc) do { desc->running = 1; } while (0) -#define smp_clear_running(desc) do { desc->running = 0; } while (0) -#else -#define smp_set_running(desc) do { } while (0) -#define smp_clear_running(desc) do { } while (0) -#endif - -/** - * disable_irq_nosync - disable an irq without waiting - * @irq: Interrupt to disable - * - * Disable the selected interrupt line. Enables and disables - * are nested. We do this lazily. - * - * This function may be called from IRQ context. - */ -void disable_irq_nosync(unsigned int irq) -{ - struct irqdesc *desc = irq_desc + irq; - unsigned long flags; - - spin_lock_irqsave(&irq_controller_lock, flags); - desc->disable_depth++; - list_del_init(&desc->pend); - spin_unlock_irqrestore(&irq_controller_lock, flags); -} -EXPORT_SYMBOL(disable_irq_nosync); - -/** - * disable_irq - disable an irq and wait for completion - * @irq: Interrupt to disable - * - * Disable the selected interrupt line. Enables and disables - * are nested. This functions waits for any pending IRQ - * handlers for this interrupt to complete before returning. - * If you use this function while holding a resource the IRQ - * handler may need you will deadlock. - * - * This function may be called - with care - from IRQ context. - */ -void disable_irq(unsigned int irq) -{ - struct irqdesc *desc = irq_desc + irq; - - disable_irq_nosync(irq); - if (desc->action) - synchronize_irq(irq); -} -EXPORT_SYMBOL(disable_irq); - -/** - * enable_irq - enable interrupt handling on an irq - * @irq: Interrupt to enable - * - * Re-enables the processing of interrupts on this IRQ line. - * Note that this may call the interrupt handler, so you may - * get unexpected results if you hold IRQs disabled. - * - * This function may be called from IRQ context. - */ -void enable_irq(unsigned int irq) -{ - struct irqdesc *desc = irq_desc + irq; - unsigned long flags; - - spin_lock_irqsave(&irq_controller_lock, flags); - if (unlikely(!desc->disable_depth)) { - printk("enable_irq(%u) unbalanced from %p\n", irq, - __builtin_return_address(0)); - } else if (!--desc->disable_depth) { - desc->probing = 0; - desc->chip->unmask(irq); - - /* - * If the interrupt is waiting to be processed, - * try to re-run it. We can't directly run it - * from here since the caller might be in an - * interrupt-protected region. - */ - if (desc->pending && list_empty(&desc->pend)) { - desc->pending = 0; - if (!desc->chip->retrigger || - desc->chip->retrigger(irq)) - list_add(&desc->pend, &irq_pending); - } - } - spin_unlock_irqrestore(&irq_controller_lock, flags); -} -EXPORT_SYMBOL(enable_irq); - -/* - * Enable wake on selected irq - */ -void enable_irq_wake(unsigned int irq) -{ - struct irqdesc *desc = irq_desc + irq; - unsigned long flags; - - spin_lock_irqsave(&irq_controller_lock, flags); - if (desc->chip->set_wake) - desc->chip->set_wake(irq, 1); - spin_unlock_irqrestore(&irq_controller_lock, flags); -} -EXPORT_SYMBOL(enable_irq_wake); - -void disable_irq_wake(unsigned int irq) -{ - struct irqdesc *desc = irq_desc + irq; - unsigned long flags; - - spin_lock_irqsave(&irq_controller_lock, flags); - if (desc->chip->set_wake) - desc->chip->set_wake(irq, 0); - spin_unlock_irqrestore(&irq_controller_lock, flags); -} -EXPORT_SYMBOL(disable_irq_wake); +void (*init_arch_irq)(void) __initdata = NULL; +unsigned long irq_err_count; int show_interrupts(struct seq_file *p, void *v) { @@ -243,8 +69,8 @@ int show_interrupts(struct seq_file *p, void *v) } if (i < NR_IRQS) { - spin_lock_irqsave(&irq_controller_lock, flags); - action = irq_desc[i].action; + spin_lock_irqsave(&irq_desc[i].lock, flags); + action = irq_desc[i].action; if (!action) goto unlock; @@ -257,7 +83,7 @@ int show_interrupts(struct seq_file *p, void *v) seq_putc(p, '\n'); unlock: - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(&irq_desc[i].lock, flags); } else if (i == NR_IRQS) { #ifdef CONFIG_ARCH_ACORN show_fiq_list(p, v); @@ -271,267 +97,11 @@ unlock: return 0; } -/* - * IRQ lock detection. - * - * Hopefully, this should get us out of a few locked situations. - * However, it may take a while for this to happen, since we need - * a large number if IRQs to appear in the same jiffie with the - * same instruction pointer (or within 2 instructions). - */ -static int check_irq_lock(struct irqdesc *desc, int irq, struct pt_regs *regs) -{ - unsigned long instr_ptr = instruction_pointer(regs); - - if (desc->lck_jif == jiffies && - desc->lck_pc >= instr_ptr && desc->lck_pc < instr_ptr + 8) { - desc->lck_cnt += 1; - - if (desc->lck_cnt > MAX_IRQ_CNT) { - printk(KERN_ERR "IRQ LOCK: IRQ%d is locking the system, disabled\n", irq); - return 1; - } - } else { - desc->lck_cnt = 0; - desc->lck_pc = instruction_pointer(regs); - desc->lck_jif = jiffies; - } - return 0; -} - -static void -report_bad_irq(unsigned int irq, struct pt_regs *regs, struct irqdesc *desc, int ret) -{ - static int count = 100; - struct irqaction *action; - - if (noirqdebug) - return; - - if (ret != IRQ_HANDLED && ret != IRQ_NONE) { - if (!count) - return; - count--; - printk("irq%u: bogus retval mask %x\n", irq, ret); - } else { - desc->irqs_unhandled++; - if (desc->irqs_unhandled <= 99900) - return; - desc->irqs_unhandled = 0; - printk("irq%u: nobody cared\n", irq); - } - show_regs(regs); - dump_stack(); - printk(KERN_ERR "handlers:"); - action = desc->action; - do { - printk("\n" KERN_ERR "[<%p>]", action->handler); - print_symbol(" (%s)", (unsigned long)action->handler); - action = action->next; - } while (action); - printk("\n"); -} - -static int -__do_irq(unsigned int irq, struct irqaction *action, struct pt_regs *regs) -{ - unsigned int status; - int ret, retval = 0; - - spin_unlock(&irq_controller_lock); - -#ifdef CONFIG_NO_IDLE_HZ - if (!(action->flags & SA_TIMER) && system_timer->dyn_tick != NULL) { - write_seqlock(&xtime_lock); - if (system_timer->dyn_tick->state & DYN_TICK_ENABLED) - system_timer->dyn_tick->handler(irq, 0, regs); - write_sequnlock(&xtime_lock); - } -#endif - - if (!(action->flags & SA_INTERRUPT)) - local_irq_enable(); - - status = 0; - do { - ret = action->handler(irq, action->dev_id, regs); - if (ret == IRQ_HANDLED) - status |= action->flags; - retval |= ret; - action = action->next; - } while (action); - - if (status & SA_SAMPLE_RANDOM) - add_interrupt_randomness(irq); - - spin_lock_irq(&irq_controller_lock); - - return retval; -} - -/* - * This is for software-decoded IRQs. The caller is expected to - * handle the ack, clear, mask and unmask issues. - */ -void -do_simple_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) -{ - struct irqaction *action; - const unsigned int cpu = smp_processor_id(); - - desc->triggered = 1; - - kstat_cpu(cpu).irqs[irq]++; - - smp_set_running(desc); - - action = desc->action; - if (action) { - int ret = __do_irq(irq, action, regs); - if (ret != IRQ_HANDLED) - report_bad_irq(irq, regs, desc, ret); - } - - smp_clear_running(desc); -} - -/* - * Most edge-triggered IRQ implementations seem to take a broken - * approach to this. Hence the complexity. - */ -void -do_edge_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) -{ - const unsigned int cpu = smp_processor_id(); - - desc->triggered = 1; - - /* - * If we're currently running this IRQ, or its disabled, - * we shouldn't process the IRQ. Instead, turn on the - * hardware masks. - */ - if (unlikely(desc->running || desc->disable_depth)) - goto running; - - /* - * Acknowledge and clear the IRQ, but don't mask it. - */ - desc->chip->ack(irq); - - /* - * Mark the IRQ currently in progress. - */ - desc->running = 1; - - kstat_cpu(cpu).irqs[irq]++; - - do { - struct irqaction *action; - - action = desc->action; - if (!action) - break; - - if (desc->pending && !desc->disable_depth) { - desc->pending = 0; - desc->chip->unmask(irq); - } - - __do_irq(irq, action, regs); - } while (desc->pending && !desc->disable_depth); - - desc->running = 0; - - /* - * If we were disabled or freed, shut down the handler. - */ - if (likely(desc->action && !check_irq_lock(desc, irq, regs))) - return; - - running: - /* - * We got another IRQ while this one was masked or - * currently running. Delay it. - */ - desc->pending = 1; - desc->chip->mask(irq); - desc->chip->ack(irq); -} - -/* - * Level-based IRQ handler. Nice and simple. - */ -void -do_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) -{ - struct irqaction *action; - const unsigned int cpu = smp_processor_id(); - - desc->triggered = 1; - - /* - * Acknowledge, clear _AND_ disable the interrupt. - */ - desc->chip->ack(irq); - - if (likely(!desc->disable_depth)) { - kstat_cpu(cpu).irqs[irq]++; - - smp_set_running(desc); - - /* - * Return with this interrupt masked if no action - */ - action = desc->action; - if (action) { - int ret = __do_irq(irq, desc->action, regs); - - if (ret != IRQ_HANDLED) - report_bad_irq(irq, regs, desc, ret); - - if (likely(!desc->disable_depth && - !check_irq_lock(desc, irq, regs))) - desc->chip->unmask(irq); - } - - smp_clear_running(desc); - } -} - -static void do_pending_irqs(struct pt_regs *regs) -{ - struct list_head head, *l, *n; - - do { - struct irqdesc *desc; - - /* - * First, take the pending interrupts off the list. - * The act of calling the handlers may add some IRQs - * back onto the list. - */ - head = irq_pending; - INIT_LIST_HEAD(&irq_pending); - head.next->prev = &head; - head.prev->next = &head; - - /* - * Now run each entry. We must delete it from our - * list before calling the handler. - */ - list_for_each_safe(l, n, &head) { - desc = list_entry(l, struct irqdesc, pend); - list_del_init(&desc->pend); - desc_handle_irq(desc - irq_desc, desc, regs); - } - - /* - * The list must be empty. - */ - BUG_ON(!list_empty(&head)); - } while (!list_empty(&irq_pending)); -} +/* Handle bad interrupts */ +static struct irq_desc bad_irq_desc = { + .handle_irq = handle_bad_irq, + .lock = SPIN_LOCK_UNLOCKED +}; /* * do_IRQ handles all hardware IRQ's. Decoded IRQs should not @@ -550,96 +120,15 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) desc = &bad_irq_desc; irq_enter(); - spin_lock(&irq_controller_lock); - desc_handle_irq(irq, desc, regs); - /* - * Now re-run any pending interrupts. - */ - if (!list_empty(&irq_pending)) - do_pending_irqs(regs); + desc_handle_irq(irq, desc, regs); + /* AT91 specific workaround */ irq_finish(irq); - spin_unlock(&irq_controller_lock); irq_exit(); } -void __set_irq_handler(unsigned int irq, irq_handler_t handle, int is_chained) -{ - struct irqdesc *desc; - unsigned long flags; - - if (irq >= NR_IRQS) { - printk(KERN_ERR "Trying to install handler for IRQ%d\n", irq); - return; - } - - if (handle == NULL) - handle = do_bad_IRQ; - - desc = irq_desc + irq; - - if (is_chained && desc->chip == &bad_chip) - printk(KERN_WARNING "Trying to install chained handler for IRQ%d\n", irq); - - spin_lock_irqsave(&irq_controller_lock, flags); - if (handle == do_bad_IRQ) { - desc->chip->mask(irq); - desc->chip->ack(irq); - desc->disable_depth = 1; - } - desc->handle = handle; - if (handle != do_bad_IRQ && is_chained) { - desc->valid = 0; - desc->probe_ok = 0; - desc->disable_depth = 0; - desc->chip->unmask(irq); - } - spin_unlock_irqrestore(&irq_controller_lock, flags); -} - -void set_irq_chip(unsigned int irq, struct irqchip *chip) -{ - struct irqdesc *desc; - unsigned long flags; - - if (irq >= NR_IRQS) { - printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq); - return; - } - - if (chip == NULL) - chip = &bad_chip; - - desc = irq_desc + irq; - spin_lock_irqsave(&irq_controller_lock, flags); - desc->chip = chip; - spin_unlock_irqrestore(&irq_controller_lock, flags); -} - -int set_irq_type(unsigned int irq, unsigned int type) -{ - struct irqdesc *desc; - unsigned long flags; - int ret = -ENXIO; - - if (irq >= NR_IRQS) { - printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); - return -ENODEV; - } - - desc = irq_desc + irq; - if (desc->chip->set_type) { - spin_lock_irqsave(&irq_controller_lock, flags); - ret = desc->chip->set_type(irq, type); - spin_unlock_irqrestore(&irq_controller_lock, flags); - } - - return ret; -} -EXPORT_SYMBOL(set_irq_type); - void set_irq_flags(unsigned int irq, unsigned int iflags) { struct irqdesc *desc; @@ -651,421 +140,32 @@ void set_irq_flags(unsigned int irq, unsigned int iflags) } desc = irq_desc + irq; - spin_lock_irqsave(&irq_controller_lock, flags); - desc->valid = (iflags & IRQF_VALID) != 0; - desc->probe_ok = (iflags & IRQF_PROBE) != 0; - desc->noautoenable = (iflags & IRQF_NOAUTOEN) != 0; - spin_unlock_irqrestore(&irq_controller_lock, flags); -} - -int setup_irq(unsigned int irq, struct irqaction *new) -{ - int shared = 0; - struct irqaction *old, **p; - unsigned long flags; - struct irqdesc *desc; - - /* - * Some drivers like serial.c use request_irq() heavily, - * so we have to be careful not to interfere with a - * running system. - */ - if (new->flags & SA_SAMPLE_RANDOM) { - /* - * This function might sleep, we want to call it first, - * outside of the atomic block. - * Yes, this might clear the entropy pool if the wrong - * driver is attempted to be loaded, without actually - * installing a new handler, but is this really a problem, - * only the sysadmin is able to do this. - */ - rand_initialize_irq(irq); - } - - /* - * The following block of code has to be executed atomically - */ - desc = irq_desc + irq; - spin_lock_irqsave(&irq_controller_lock, flags); - p = &desc->action; - if ((old = *p) != NULL) { - /* - * Can't share interrupts unless both agree to and are - * the same type. - */ - if (!(old->flags & new->flags & SA_SHIRQ) || - (~old->flags & new->flags) & SA_TRIGGER_MASK) { - spin_unlock_irqrestore(&irq_controller_lock, flags); - return -EBUSY; - } - - /* add new interrupt at end of irq queue */ - do { - p = &old->next; - old = *p; - } while (old); - shared = 1; - } - - *p = new; - - if (!shared) { - desc->probing = 0; - desc->running = 0; - desc->pending = 0; - desc->disable_depth = 1; - - if (new->flags & SA_TRIGGER_MASK && - desc->chip->set_type) { - unsigned int type = new->flags & SA_TRIGGER_MASK; - desc->chip->set_type(irq, type); - } - - if (!desc->noautoenable) { - desc->disable_depth = 0; - desc->chip->unmask(irq); - } - } - - spin_unlock_irqrestore(&irq_controller_lock, flags); - return 0; -} - -/** - * request_irq - allocate an interrupt line - * @irq: Interrupt line to allocate - * @handler: Function to be called when the IRQ occurs - * @irqflags: Interrupt type flags - * @devname: An ascii name for the claiming device - * @dev_id: A cookie passed back to the handler function - * - * This call allocates interrupt resources and enables the - * interrupt line and IRQ handling. From the point this - * call is made your handler function may be invoked. Since - * your handler function must clear any interrupt the board - * raises, you must take care both to initialise your hardware - * and to set up the interrupt handler in the right order. - * - * Dev_id must be globally unique. Normally the address of the - * device data structure is used as the cookie. Since the handler - * receives this value it makes sense to use it. - * - * If your interrupt is shared you must pass a non NULL dev_id - * as this is required when freeing the interrupt. - * - * Flags: - * - * SA_SHIRQ Interrupt is shared - * - * SA_INTERRUPT Disable local interrupts while processing - * - * SA_SAMPLE_RANDOM The interrupt can be used for entropy - * - */ -int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *), - unsigned long irq_flags, const char * devname, void *dev_id) -{ - unsigned long retval; - struct irqaction *action; - - if (irq >= NR_IRQS || !irq_desc[irq].valid || !handler || - (irq_flags & SA_SHIRQ && !dev_id)) - return -EINVAL; - - action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL); - if (!action) - return -ENOMEM; - - action->handler = handler; - action->flags = irq_flags; - cpus_clear(action->mask); - action->name = devname; - action->next = NULL; - action->dev_id = dev_id; - - retval = setup_irq(irq, action); - - if (retval) - kfree(action); - return retval; -} - -EXPORT_SYMBOL(request_irq); - -/** - * free_irq - free an interrupt - * @irq: Interrupt line to free - * @dev_id: Device identity to free - * - * Remove an interrupt handler. The handler is removed and if the - * interrupt line is no longer in use by any driver it is disabled. - * On a shared IRQ the caller must ensure the interrupt is disabled - * on the card it drives before calling this function. - * - * This function must not be called from interrupt context. - */ -void free_irq(unsigned int irq, void *dev_id) -{ - struct irqaction * action, **p; - unsigned long flags; - - if (irq >= NR_IRQS || !irq_desc[irq].valid) { - printk(KERN_ERR "Trying to free IRQ%d\n",irq); - dump_stack(); - return; - } - - spin_lock_irqsave(&irq_controller_lock, flags); - for (p = &irq_desc[irq].action; (action = *p) != NULL; p = &action->next) { - if (action->dev_id != dev_id) - continue; - - /* Found it - now free it */ - *p = action->next; - break; - } - spin_unlock_irqrestore(&irq_controller_lock, flags); - - if (!action) { - printk(KERN_ERR "Trying to free free IRQ%d\n",irq); - dump_stack(); - } else { - synchronize_irq(irq); - kfree(action); - } -} - -EXPORT_SYMBOL(free_irq); - -static DECLARE_MUTEX(probe_sem); - -/* Start the interrupt probing. Unlike other architectures, - * we don't return a mask of interrupts from probe_irq_on, - * but return the number of interrupts enabled for the probe. - * The interrupts which have been enabled for probing is - * instead recorded in the irq_desc structure. - */ -unsigned long probe_irq_on(void) -{ - unsigned int i, irqs = 0; - unsigned long delay; - - down(&probe_sem); - - /* - * first snaffle up any unassigned but - * probe-able interrupts - */ - spin_lock_irq(&irq_controller_lock); - for (i = 0; i < NR_IRQS; i++) { - if (!irq_desc[i].probe_ok || irq_desc[i].action) - continue; - - irq_desc[i].probing = 1; - irq_desc[i].triggered = 0; - if (irq_desc[i].chip->set_type) - irq_desc[i].chip->set_type(i, IRQT_PROBE); - irq_desc[i].chip->unmask(i); - irqs += 1; - } - spin_unlock_irq(&irq_controller_lock); - - /* - * wait for spurious interrupts to mask themselves out again - */ - for (delay = jiffies + HZ/10; time_before(jiffies, delay); ) - /* min 100ms delay */; - - /* - * now filter out any obviously spurious interrupts - */ - spin_lock_irq(&irq_controller_lock); - for (i = 0; i < NR_IRQS; i++) { - if (irq_desc[i].probing && irq_desc[i].triggered) { - irq_desc[i].probing = 0; - irqs -= 1; - } - } - spin_unlock_irq(&irq_controller_lock); - - return irqs; -} - -EXPORT_SYMBOL(probe_irq_on); - -unsigned int probe_irq_mask(unsigned long irqs) -{ - unsigned int mask = 0, i; - - spin_lock_irq(&irq_controller_lock); - for (i = 0; i < 16 && i < NR_IRQS; i++) - if (irq_desc[i].probing && irq_desc[i].triggered) - mask |= 1 << i; - spin_unlock_irq(&irq_controller_lock); - - up(&probe_sem); - - return mask; -} -EXPORT_SYMBOL(probe_irq_mask); - -/* - * Possible return values: - * >= 0 - interrupt number - * -1 - no interrupt/many interrupts - */ -int probe_irq_off(unsigned long irqs) -{ - unsigned int i; - int irq_found = NO_IRQ; - - /* - * look at the interrupts, and find exactly one - * that we were probing has been triggered - */ - spin_lock_irq(&irq_controller_lock); - for (i = 0; i < NR_IRQS; i++) { - if (irq_desc[i].probing && - irq_desc[i].triggered) { - if (irq_found != NO_IRQ) { - irq_found = NO_IRQ; - goto out; - } - irq_found = i; - } - } - - if (irq_found == -1) - irq_found = NO_IRQ; -out: - spin_unlock_irq(&irq_controller_lock); - - up(&probe_sem); - - return irq_found; -} - -EXPORT_SYMBOL(probe_irq_off); - -#ifdef CONFIG_SMP -static void route_irq(struct irqdesc *desc, unsigned int irq, unsigned int cpu) -{ - pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu); - - spin_lock_irq(&irq_controller_lock); - desc->cpu = cpu; - desc->chip->set_cpu(desc, irq, cpu); - spin_unlock_irq(&irq_controller_lock); -} - -#ifdef CONFIG_PROC_FS -static int -irq_affinity_read_proc(char *page, char **start, off_t off, int count, - int *eof, void *data) -{ - struct irqdesc *desc = irq_desc + ((int)data); - int len = cpumask_scnprintf(page, count, desc->affinity); - - if (count - len < 2) - return -EINVAL; - page[len++] = '\n'; - page[len] = '\0'; - - return len; -} - -static int -irq_affinity_write_proc(struct file *file, const char __user *buffer, - unsigned long count, void *data) -{ - unsigned int irq = (unsigned int)data; - struct irqdesc *desc = irq_desc + irq; - cpumask_t affinity, tmp; - int ret = -EIO; - - if (!desc->chip->set_cpu) - goto out; - - ret = cpumask_parse(buffer, count, affinity); - if (ret) - goto out; - - cpus_and(tmp, affinity, cpu_online_map); - if (cpus_empty(tmp)) { - ret = -EINVAL; - goto out; - } - - desc->affinity = affinity; - route_irq(desc, irq, first_cpu(tmp)); - ret = count; - - out: - return ret; -} -#endif -#endif - -void __init init_irq_proc(void) -{ -#if defined(CONFIG_SMP) && defined(CONFIG_PROC_FS) - struct proc_dir_entry *dir; - int irq; - - dir = proc_mkdir("irq", NULL); - if (!dir) - return; - - for (irq = 0; irq < NR_IRQS; irq++) { - struct proc_dir_entry *entry; - struct irqdesc *desc; - char name[16]; - - desc = irq_desc + irq; - memset(name, 0, sizeof(name)); - snprintf(name, sizeof(name) - 1, "%u", irq); - - desc->procdir = proc_mkdir(name, dir); - if (!desc->procdir) - continue; - - entry = create_proc_entry("smp_affinity", 0600, desc->procdir); - if (entry) { - entry->nlink = 1; - entry->data = (void *)irq; - entry->read_proc = irq_affinity_read_proc; - entry->write_proc = irq_affinity_write_proc; - } - } -#endif + spin_lock_irqsave(&desc->lock, flags); + desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; + if (iflags & IRQF_VALID) + desc->status &= ~IRQ_NOREQUEST; + if (iflags & IRQF_PROBE) + desc->status &= ~IRQ_NOPROBE; + if (!(iflags & IRQF_NOAUTOEN)) + desc->status &= ~IRQ_NOAUTOEN; + spin_unlock_irqrestore(&desc->lock, flags); } void __init init_IRQ(void) { - struct irqdesc *desc; int irq; + for (irq = 0; irq < NR_IRQS; irq++) + irq_desc[irq].status |= IRQ_NOREQUEST | IRQ_DELAYED_DISABLE | + IRQ_NOPROBE; + #ifdef CONFIG_SMP bad_irq_desc.affinity = CPU_MASK_ALL; bad_irq_desc.cpu = smp_processor_id(); #endif - - for (irq = 0, desc = irq_desc; irq < NR_IRQS; irq++, desc++) { - *desc = bad_irq_desc; - INIT_LIST_HEAD(&desc->pend); - } - init_arch_irq(); } -static int __init noirqdebug_setup(char *str) -{ - noirqdebug = 1; - return 1; -} - -__setup("noirqdebug", noirqdebug_setup); - #ifdef CONFIG_HOTPLUG_CPU /* * The CPU has been marked offline. Migrate IRQs off this CPU. If diff --git a/arch/arm/kernel/iwmmxt-notifier.c b/arch/arm/kernel/iwmmxt-notifier.c new file mode 100644 index 00000000000..44a86c33796 --- /dev/null +++ b/arch/arm/kernel/iwmmxt-notifier.c @@ -0,0 +1,64 @@ +/* + * linux/arch/arm/kernel/iwmmxt-notifier.c + * + * XScale iWMMXt (Concan) context switching and handling + * + * Initial code: + * Copyright (c) 2003, Intel Corporation + * + * Full lazy switching support, optimizations and more, by Nicolas Pitre + * Copyright (c) 2003-2004, MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/config.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/signal.h> +#include <linux/sched.h> +#include <linux/init.h> +#include <asm/thread_notify.h> +#include <asm/io.h> + +static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t) +{ + struct thread_info *thread = t; + + switch (cmd) { + case THREAD_NOTIFY_FLUSH: + /* + * flush_thread() zeroes thread->fpstate, so no need + * to do anything here. + * + * FALLTHROUGH: Ensure we don't try to overwrite our newly + * initialised state information on the first fault. + */ + + case THREAD_NOTIFY_RELEASE: + iwmmxt_task_release(thread); + break; + + case THREAD_NOTIFY_SWITCH: + iwmmxt_task_switch(thread); + break; + } + + return NOTIFY_DONE; +} + +static struct notifier_block iwmmxt_notifier_block = { + .notifier_call = iwmmxt_do, +}; + +static int __init iwmmxt_init(void) +{ + thread_register_notifier(&iwmmxt_notifier_block); + + return 0; +} + +late_initcall(iwmmxt_init); diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S index 24c7b0477a0..b63b528f22a 100644 --- a/arch/arm/kernel/iwmmxt.S +++ b/arch/arm/kernel/iwmmxt.S @@ -271,30 +271,27 @@ ENTRY(iwmmxt_task_restore) /* * Concan handling on task switch * - * r0 = previous task_struct pointer (must be preserved) - * r1 = previous thread_info pointer - * r2 = next thread_info.cpu_domain pointer (must be preserved) + * r0 = next thread_info pointer * - * Called only from __switch_to with task preemption disabled. - * No need to care about preserving r4 and above. + * Called only from the iwmmxt notifier with task preemption disabled. */ ENTRY(iwmmxt_task_switch) - mrc p15, 0, r4, c15, c1, 0 - tst r4, #0x3 @ CP0 and CP1 accessible? + mrc p15, 0, r1, c15, c1, 0 + tst r1, #0x3 @ CP0 and CP1 accessible? bne 1f @ yes: block them for next task - ldr r5, =concan_owner - add r6, r2, #(TI_IWMMXT_STATE - TI_CPU_DOMAIN) @ get next task Concan save area - ldr r5, [r5] @ get current Concan owner - teq r5, r6 @ next task owns it? + ldr r2, =concan_owner + add r3, r0, #TI_IWMMXT_STATE @ get next task Concan save area + ldr r2, [r2] @ get current Concan owner + teq r2, r3 @ next task owns it? movne pc, lr @ no: leave Concan disabled -1: eor r4, r4, #3 @ flip Concan access - mcr p15, 0, r4, c15, c1, 0 +1: eor r1, r1, #3 @ flip Concan access + mcr p15, 0, r1, c15, c1, 0 - mrc p15, 0, r4, c2, c0, 0 - sub pc, lr, r4, lsr #32 @ cpwait and return + mrc p15, 0, r1, c2, c0, 0 + sub pc, lr, r1, lsr #32 @ cpwait and return /* * Remove Concan ownership of given task diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index 055bf5d2889..298363d9704 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c @@ -9,7 +9,6 @@ * * Module allocation method suggested by Andi Kleen. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/moduleloader.h> #include <linux/kernel.h> diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 7df6e1aaa32..3079535afcc 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -10,7 +10,6 @@ */ #include <stdarg.h> -#include <linux/config.h> #include <linux/module.h> #include <linux/sched.h> #include <linux/kernel.h> @@ -28,10 +27,12 @@ #include <linux/init.h> #include <linux/cpu.h> #include <linux/elfcore.h> +#include <linux/pm.h> #include <asm/leds.h> #include <asm/processor.h> #include <asm/system.h> +#include <asm/thread_notify.h> #include <asm/uaccess.h> #include <asm/mach/time.h> @@ -71,8 +72,36 @@ static int __init hlt_setup(char *__unused) __setup("nohlt", nohlt_setup); __setup("hlt", hlt_setup); +void arm_machine_restart(char mode) +{ + /* + * Clean and disable cache, and turn off interrupts + */ + cpu_proc_fin(); + + /* + * Tell the mm system that we are going to reboot - + * we may need it to insert some 1:1 mappings so that + * soft boot works. + */ + setup_mm_for_reboot(mode); + + /* + * Now call the architecture specific reboot code. + */ + arch_reset(mode); + + /* + * Whoops - the architecture was unable to reboot. + * Tell the user! + */ + mdelay(1000); + printk("Reboot failed -- System halted\n"); + while (1); +} + /* - * The following aren't currently used. + * Function pointers to optional machine specific functions */ void (*pm_idle)(void); EXPORT_SYMBOL(pm_idle); @@ -80,6 +109,10 @@ EXPORT_SYMBOL(pm_idle); void (*pm_power_off)(void); EXPORT_SYMBOL(pm_power_off); +void (*arm_pm_restart)(char str) = arm_machine_restart; +EXPORT_SYMBOL_GPL(arm_pm_restart); + + /* * This is our default idle handler. We need to disable * interrupts here to ensure we don't miss a wakeup call. @@ -151,33 +184,9 @@ void machine_power_off(void) pm_power_off(); } - void machine_restart(char * __unused) { - /* - * Clean and disable cache, and turn off interrupts - */ - cpu_proc_fin(); - - /* - * Tell the mm system that we are going to reboot - - * we may need it to insert some 1:1 mappings so that - * soft boot works. - */ - setup_mm_for_reboot(reboot_mode); - - /* - * Now call the architecture specific reboot code. - */ - arch_reset(reboot_mode); - - /* - * Whoops - the architecture was unable to reboot. - * Tell the user! - */ - mdelay(1000); - printk("Reboot failed -- System halted\n"); - while (1); + arm_pm_restart(reboot_mode); } void __show_regs(struct pt_regs *regs) @@ -329,13 +338,9 @@ void exit_thread(void) { } -static void default_fp_init(union fp_state *fp) -{ - memset(fp, 0, sizeof(union fp_state)); -} +ATOMIC_NOTIFIER_HEAD(thread_notify_head); -void (*fp_init)(union fp_state *) = default_fp_init; -EXPORT_SYMBOL(fp_init); +EXPORT_SYMBOL_GPL(thread_notify_head); void flush_thread(void) { @@ -344,23 +349,16 @@ void flush_thread(void) memset(thread->used_cp, 0, sizeof(thread->used_cp)); memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); -#if defined(CONFIG_IWMMXT) - iwmmxt_task_release(thread); -#endif - fp_init(&thread->fpstate); -#if defined(CONFIG_VFP) - vfp_flush_thread(&thread->vfpstate); -#endif + memset(&thread->fpstate, 0, sizeof(union fp_state)); + + thread_notify(THREAD_NOTIFY_FLUSH, thread); } void release_thread(struct task_struct *dead_task) { -#if defined(CONFIG_VFP) - vfp_release_thread(&task_thread_info(dead_task)->vfpstate); -#endif -#if defined(CONFIG_IWMMXT) - iwmmxt_task_release(task_thread_info(dead_task)); -#endif + struct thread_info *thread = task_thread_info(dead_task); + + thread_notify(THREAD_NOTIFY_RELEASE, thread); } asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index a1d1b2906e8..9254ba2f46f 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c @@ -9,7 +9,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/sched.h> #include <linux/mm.h> @@ -634,6 +633,32 @@ static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp) #endif +#ifdef CONFIG_CRUNCH +/* + * Get the child Crunch state. + */ +static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp) +{ + struct thread_info *thread = task_thread_info(tsk); + + crunch_task_disable(thread); /* force it to ram */ + return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE) + ? -EFAULT : 0; +} + +/* + * Set the child Crunch state. + */ +static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp) +{ + struct thread_info *thread = task_thread_info(tsk); + + crunch_task_release(thread); /* force a reload */ + return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE) + ? -EFAULT : 0; +} +#endif + long arch_ptrace(struct task_struct *child, long request, long addr, long data) { unsigned long tmp; @@ -765,6 +790,16 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) child->ptrace_message = data; break; +#ifdef CONFIG_CRUNCH + case PTRACE_GETCRUNCHREGS: + ret = ptrace_getcrunchregs(child, (void __user *)data); + break; + + case PTRACE_SETCRUNCHREGS: + ret = ptrace_setcrunchregs(child, (void __user *)data); + break; +#endif + default: ret = ptrace_request(child, request, addr, data); break; diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 9fc9af88c60..7d6a516c0b9 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -7,7 +7,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/stddef.h> @@ -119,9 +118,24 @@ DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data); * Standard memory resources */ static struct resource mem_res[] = { - { "Video RAM", 0, 0, IORESOURCE_MEM }, - { "Kernel text", 0, 0, IORESOURCE_MEM }, - { "Kernel data", 0, 0, IORESOURCE_MEM } + { + .name = "Video RAM", + .start = 0, + .end = 0, + .flags = IORESOURCE_MEM + }, + { + .name = "Kernel text", + .start = 0, + .end = 0, + .flags = IORESOURCE_MEM + }, + { + .name = "Kernel data", + .start = 0, + .end = 0, + .flags = IORESOURCE_MEM + } }; #define video_ram mem_res[0] @@ -129,9 +143,24 @@ static struct resource mem_res[] = { #define kernel_data mem_res[2] static struct resource io_res[] = { - { "reserved", 0x3bc, 0x3be, IORESOURCE_IO | IORESOURCE_BUSY }, - { "reserved", 0x378, 0x37f, IORESOURCE_IO | IORESOURCE_BUSY }, - { "reserved", 0x278, 0x27f, IORESOURCE_IO | IORESOURCE_BUSY } + { + .name = "reserved", + .start = 0x3bc, + .end = 0x3be, + .flags = IORESOURCE_IO | IORESOURCE_BUSY + }, + { + .name = "reserved", + .start = 0x378, + .end = 0x37f, + .flags = IORESOURCE_IO | IORESOURCE_BUSY + }, + { + .name = "reserved", + .start = 0x278, + .end = 0x27f, + .flags = IORESOURCE_IO | IORESOURCE_BUSY + } }; #define lp0 io_res[0] @@ -315,9 +344,9 @@ static void __init setup_processor(void) cpu_cache = *list->cache; #endif - printk("CPU: %s [%08x] revision %d (ARMv%s)\n", + printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08x\n", cpu_name, processor_id, (int)processor_id & 15, - proc_arch[cpu_architecture()]); + proc_arch[cpu_architecture()], cr_alignment); sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS); sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); @@ -808,7 +837,7 @@ static int __init topology_init(void) int cpu; for_each_possible_cpu(cpu) - register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu, NULL); + register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu); return 0; } diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index a0cd0a90a10..48cf7fffddf 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -7,7 +7,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/errno.h> #include <linux/signal.h> #include <linux/ptrace.h> @@ -132,18 +131,38 @@ sys_sigaction(int sig, const struct old_sigaction __user *act, return ret; } -#ifdef CONFIG_IWMMXT +#ifdef CONFIG_CRUNCH +static int preserve_crunch_context(struct crunch_sigframe *frame) +{ + char kbuf[sizeof(*frame) + 8]; + struct crunch_sigframe *kframe; -/* iwmmxt_area is 0x98 bytes long, preceeded by 8 bytes of signature */ -#define IWMMXT_STORAGE_SIZE (0x98 + 8) -#define IWMMXT_MAGIC0 0x12ef842a -#define IWMMXT_MAGIC1 0x1c07ca71 + /* the crunch context must be 64 bit aligned */ + kframe = (struct crunch_sigframe *)((unsigned long)(kbuf + 8) & ~7); + kframe->magic = CRUNCH_MAGIC; + kframe->size = CRUNCH_STORAGE_SIZE; + crunch_task_copy(current_thread_info(), &kframe->storage); + return __copy_to_user(frame, kframe, sizeof(*frame)); +} -struct iwmmxt_sigframe { - unsigned long magic0; - unsigned long magic1; - unsigned long storage[0x98/4]; -}; +static int restore_crunch_context(struct crunch_sigframe *frame) +{ + char kbuf[sizeof(*frame) + 8]; + struct crunch_sigframe *kframe; + + /* the crunch context must be 64 bit aligned */ + kframe = (struct crunch_sigframe *)((unsigned long)(kbuf + 8) & ~7); + if (__copy_from_user(kframe, frame, sizeof(*frame))) + return -1; + if (kframe->magic != CRUNCH_MAGIC || + kframe->size != CRUNCH_STORAGE_SIZE) + return -1; + crunch_task_restore(current_thread_info(), &kframe->storage); + return 0; +} +#endif + +#ifdef CONFIG_IWMMXT static int preserve_iwmmxt_context(struct iwmmxt_sigframe *frame) { @@ -152,8 +171,8 @@ static int preserve_iwmmxt_context(struct iwmmxt_sigframe *frame) /* the iWMMXt context must be 64 bit aligned */ kframe = (struct iwmmxt_sigframe *)((unsigned long)(kbuf + 8) & ~7); - kframe->magic0 = IWMMXT_MAGIC0; - kframe->magic1 = IWMMXT_MAGIC1; + kframe->magic = IWMMXT_MAGIC; + kframe->size = IWMMXT_STORAGE_SIZE; iwmmxt_task_copy(current_thread_info(), &kframe->storage); return __copy_to_user(frame, kframe, sizeof(*frame)); } @@ -167,8 +186,8 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame) kframe = (struct iwmmxt_sigframe *)((unsigned long)(kbuf + 8) & ~7); if (__copy_from_user(kframe, frame, sizeof(*frame))) return -1; - if (kframe->magic0 != IWMMXT_MAGIC0 || - kframe->magic1 != IWMMXT_MAGIC1) + if (kframe->magic != IWMMXT_MAGIC || + kframe->size != IWMMXT_STORAGE_SIZE) return -1; iwmmxt_task_restore(current_thread_info(), &kframe->storage); return 0; @@ -177,70 +196,65 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame) #endif /* - * Auxiliary signal frame. This saves stuff like FP state. - * The layout of this structure is not part of the user ABI. - */ -struct aux_sigframe { -#ifdef CONFIG_IWMMXT - struct iwmmxt_sigframe iwmmxt; -#endif -#ifdef CONFIG_VFP - union vfp_state vfp; -#endif -}; - -/* * Do a signal return; undo the signal stack. These are aligned to 64-bit. */ struct sigframe { - struct sigcontext sc; - unsigned long extramask[_NSIG_WORDS-1]; + struct ucontext uc; unsigned long retcode[2]; - struct aux_sigframe aux __attribute__((aligned(8))); }; struct rt_sigframe { - struct siginfo __user *pinfo; - void __user *puc; struct siginfo info; - struct ucontext uc; - unsigned long retcode[2]; - struct aux_sigframe aux __attribute__((aligned(8))); + struct sigframe sig; }; -static int -restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, - struct aux_sigframe __user *aux) +static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf) { - int err = 0; + struct aux_sigframe __user *aux; + sigset_t set; + int err; - __get_user_error(regs->ARM_r0, &sc->arm_r0, err); - __get_user_error(regs->ARM_r1, &sc->arm_r1, err); - __get_user_error(regs->ARM_r2, &sc->arm_r2, err); - __get_user_error(regs->ARM_r3, &sc->arm_r3, err); - __get_user_error(regs->ARM_r4, &sc->arm_r4, err); - __get_user_error(regs->ARM_r5, &sc->arm_r5, err); - __get_user_error(regs->ARM_r6, &sc->arm_r6, err); - __get_user_error(regs->ARM_r7, &sc->arm_r7, err); - __get_user_error(regs->ARM_r8, &sc->arm_r8, err); - __get_user_error(regs->ARM_r9, &sc->arm_r9, err); - __get_user_error(regs->ARM_r10, &sc->arm_r10, err); - __get_user_error(regs->ARM_fp, &sc->arm_fp, err); - __get_user_error(regs->ARM_ip, &sc->arm_ip, err); - __get_user_error(regs->ARM_sp, &sc->arm_sp, err); - __get_user_error(regs->ARM_lr, &sc->arm_lr, err); - __get_user_error(regs->ARM_pc, &sc->arm_pc, err); - __get_user_error(regs->ARM_cpsr, &sc->arm_cpsr, err); + err = __copy_from_user(&set, &sf->uc.uc_sigmask, sizeof(set)); + if (err == 0) { + sigdelsetmask(&set, ~_BLOCKABLE); + spin_lock_irq(¤t->sighand->siglock); + current->blocked = set; + recalc_sigpending(); + spin_unlock_irq(¤t->sighand->siglock); + } + + __get_user_error(regs->ARM_r0, &sf->uc.uc_mcontext.arm_r0, err); + __get_user_error(regs->ARM_r1, &sf->uc.uc_mcontext.arm_r1, err); + __get_user_error(regs->ARM_r2, &sf->uc.uc_mcontext.arm_r2, err); + __get_user_error(regs->ARM_r3, &sf->uc.uc_mcontext.arm_r3, err); + __get_user_error(regs->ARM_r4, &sf->uc.uc_mcontext.arm_r4, err); + __get_user_error(regs->ARM_r5, &sf->uc.uc_mcontext.arm_r5, err); + __get_user_error(regs->ARM_r6, &sf->uc.uc_mcontext.arm_r6, err); + __get_user_error(regs->ARM_r7, &sf->uc.uc_mcontext.arm_r7, err); + __get_user_error(regs->ARM_r8, &sf->uc.uc_mcontext.arm_r8, err); + __get_user_error(regs->ARM_r9, &sf->uc.uc_mcontext.arm_r9, err); + __get_user_error(regs->ARM_r10, &sf->uc.uc_mcontext.arm_r10, err); + __get_user_error(regs->ARM_fp, &sf->uc.uc_mcontext.arm_fp, err); + __get_user_error(regs->ARM_ip, &sf->uc.uc_mcontext.arm_ip, err); + __get_user_error(regs->ARM_sp, &sf->uc.uc_mcontext.arm_sp, err); + __get_user_error(regs->ARM_lr, &sf->uc.uc_mcontext.arm_lr, err); + __get_user_error(regs->ARM_pc, &sf->uc.uc_mcontext.arm_pc, err); + __get_user_error(regs->ARM_cpsr, &sf->uc.uc_mcontext.arm_cpsr, err); err |= !valid_user_regs(regs); + aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; +#ifdef CONFIG_CRUNCH + if (err == 0) + err |= restore_crunch_context(&aux->crunch); +#endif #ifdef CONFIG_IWMMXT if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) err |= restore_iwmmxt_context(&aux->iwmmxt); #endif #ifdef CONFIG_VFP // if (err == 0) -// err |= vfp_restore_state(&aux->vfp); +// err |= vfp_restore_state(&sf->aux.vfp); #endif return err; @@ -249,7 +263,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, asmlinkage int sys_sigreturn(struct pt_regs *regs) { struct sigframe __user *frame; - sigset_t set; /* Always make any pending restarted system calls return -EINTR */ current_thread_info()->restart_block.fn = do_no_restart_syscall; @@ -266,19 +279,8 @@ asmlinkage int sys_sigreturn(struct pt_regs *regs) if (!access_ok(VERIFY_READ, frame, sizeof (*frame))) goto badframe; - if (__get_user(set.sig[0], &frame->sc.oldmask) - || (_NSIG_WORDS > 1 - && __copy_from_user(&set.sig[1], &frame->extramask, - sizeof(frame->extramask)))) - goto badframe; - sigdelsetmask(&set, ~_BLOCKABLE); - spin_lock_irq(¤t->sighand->siglock); - current->blocked = set; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - - if (restore_sigcontext(regs, &frame->sc, &frame->aux)) + if (restore_sigframe(regs, frame)) goto badframe; /* Send SIGTRAP if we're single-stepping */ @@ -297,7 +299,6 @@ badframe: asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) { struct rt_sigframe __user *frame; - sigset_t set; /* Always make any pending restarted system calls return -EINTR */ current_thread_info()->restart_block.fn = do_no_restart_syscall; @@ -314,19 +315,11 @@ asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) if (!access_ok(VERIFY_READ, frame, sizeof (*frame))) goto badframe; - if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) - goto badframe; - - sigdelsetmask(&set, ~_BLOCKABLE); - spin_lock_irq(¤t->sighand->siglock); - current->blocked = set; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &frame->aux)) + if (restore_sigframe(regs, &frame->sig)) goto badframe; - if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->ARM_sp) == -EFAULT) + if (do_sigaltstack(&frame->sig.uc.uc_stack, NULL, regs->ARM_sp) == -EFAULT) goto badframe; /* Send SIGTRAP if we're single-stepping */ @@ -343,42 +336,50 @@ badframe: } static int -setup_sigcontext(struct sigcontext __user *sc, struct aux_sigframe __user *aux, - struct pt_regs *regs, unsigned long mask) +setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set) { + struct aux_sigframe __user *aux; int err = 0; - __put_user_error(regs->ARM_r0, &sc->arm_r0, err); - __put_user_error(regs->ARM_r1, &sc->arm_r1, err); - __put_user_error(regs->ARM_r2, &sc->arm_r2, err); - __put_user_error(regs->ARM_r3, &sc->arm_r3, err); - __put_user_error(regs->ARM_r4, &sc->arm_r4, err); - __put_user_error(regs->ARM_r5, &sc->arm_r5, err); - __put_user_error(regs->ARM_r6, &sc->arm_r6, err); - __put_user_error(regs->ARM_r7, &sc->arm_r7, err); - __put_user_error(regs->ARM_r8, &sc->arm_r8, err); - __put_user_error(regs->ARM_r9, &sc->arm_r9, err); - __put_user_error(regs->ARM_r10, &sc->arm_r10, err); - __put_user_error(regs->ARM_fp, &sc->arm_fp, err); - __put_user_error(regs->ARM_ip, &sc->arm_ip, err); - __put_user_error(regs->ARM_sp, &sc->arm_sp, err); - __put_user_error(regs->ARM_lr, &sc->arm_lr, err); - __put_user_error(regs->ARM_pc, &sc->arm_pc, err); - __put_user_error(regs->ARM_cpsr, &sc->arm_cpsr, err); - - __put_user_error(current->thread.trap_no, &sc->trap_no, err); - __put_user_error(current->thread.error_code, &sc->error_code, err); - __put_user_error(current->thread.address, &sc->fault_address, err); - __put_user_error(mask, &sc->oldmask, err); - + __put_user_error(regs->ARM_r0, &sf->uc.uc_mcontext.arm_r0, err); + __put_user_error(regs->ARM_r1, &sf->uc.uc_mcontext.arm_r1, err); + __put_user_error(regs->ARM_r2, &sf->uc.uc_mcontext.arm_r2, err); + __put_user_error(regs->ARM_r3, &sf->uc.uc_mcontext.arm_r3, err); + __put_user_error(regs->ARM_r4, &sf->uc.uc_mcontext.arm_r4, err); + __put_user_error(regs->ARM_r5, &sf->uc.uc_mcontext.arm_r5, err); + __put_user_error(regs->ARM_r6, &sf->uc.uc_mcontext.arm_r6, err); + __put_user_error(regs->ARM_r7, &sf->uc.uc_mcontext.arm_r7, err); + __put_user_error(regs->ARM_r8, &sf->uc.uc_mcontext.arm_r8, err); + __put_user_error(regs->ARM_r9, &sf->uc.uc_mcontext.arm_r9, err); + __put_user_error(regs->ARM_r10, &sf->uc.uc_mcontext.arm_r10, err); + __put_user_error(regs->ARM_fp, &sf->uc.uc_mcontext.arm_fp, err); + __put_user_error(regs->ARM_ip, &sf->uc.uc_mcontext.arm_ip, err); + __put_user_error(regs->ARM_sp, &sf->uc.uc_mcontext.arm_sp, err); + __put_user_error(regs->ARM_lr, &sf->uc.uc_mcontext.arm_lr, err); + __put_user_error(regs->ARM_pc, &sf->uc.uc_mcontext.arm_pc, err); + __put_user_error(regs->ARM_cpsr, &sf->uc.uc_mcontext.arm_cpsr, err); + + __put_user_error(current->thread.trap_no, &sf->uc.uc_mcontext.trap_no, err); + __put_user_error(current->thread.error_code, &sf->uc.uc_mcontext.error_code, err); + __put_user_error(current->thread.address, &sf->uc.uc_mcontext.fault_address, err); + __put_user_error(set->sig[0], &sf->uc.uc_mcontext.oldmask, err); + + err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set)); + + aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; +#ifdef CONFIG_CRUNCH + if (err == 0) + err |= preserve_crunch_context(&aux->crunch); +#endif #ifdef CONFIG_IWMMXT if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) err |= preserve_iwmmxt_context(&aux->iwmmxt); #endif #ifdef CONFIG_VFP // if (err == 0) -// err |= vfp_save_state(&aux->vfp); +// err |= vfp_save_state(&sf->aux.vfp); #endif + __put_user_error(0, &aux->end_magic, err); return err; } @@ -487,13 +488,12 @@ setup_frame(int usig, struct k_sigaction *ka, sigset_t *set, struct pt_regs *reg if (!frame) return 1; - err |= setup_sigcontext(&frame->sc, &frame->aux, regs, set->sig[0]); - - if (_NSIG_WORDS > 1) { - err |= __copy_to_user(frame->extramask, &set->sig[1], - sizeof(frame->extramask)); - } + /* + * Set uc.uc_flags to a value which sc.trap_no would never have. + */ + __put_user_error(0x5ac3c35a, &frame->uc.uc_flags, err); + err |= setup_sigframe(frame, regs, set); if (err == 0) err = setup_return(regs, ka, frame->retcode, frame, usig); @@ -511,25 +511,20 @@ setup_rt_frame(int usig, struct k_sigaction *ka, siginfo_t *info, if (!frame) return 1; - __put_user_error(&frame->info, &frame->pinfo, err); - __put_user_error(&frame->uc, &frame->puc, err); err |= copy_siginfo_to_user(&frame->info, info); - __put_user_error(0, &frame->uc.uc_flags, err); - __put_user_error(NULL, &frame->uc.uc_link, err); + __put_user_error(0, &frame->sig.uc.uc_flags, err); + __put_user_error(NULL, &frame->sig.uc.uc_link, err); memset(&stack, 0, sizeof(stack)); stack.ss_sp = (void __user *)current->sas_ss_sp; stack.ss_flags = sas_ss_flags(regs->ARM_sp); stack.ss_size = current->sas_ss_size; - err |= __copy_to_user(&frame->uc.uc_stack, &stack, sizeof(stack)); - - err |= setup_sigcontext(&frame->uc.uc_mcontext, &frame->aux, - regs, set->sig[0]); - err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); + err |= __copy_to_user(&frame->sig.uc.uc_stack, &stack, sizeof(stack)); + err |= setup_sigframe(&frame->sig, regs, set); if (err == 0) - err = setup_return(regs, ka, frame->retcode, frame, usig); + err = setup_return(regs, ka, frame->sig.retcode, frame, usig); if (err == 0) { /* @@ -538,7 +533,7 @@ setup_rt_frame(int usig, struct k_sigaction *ka, siginfo_t *info, * -- Peter Maydell <pmaydell@chiark.greenend.org.uk> 2000-12-06 */ regs->ARM_r1 = (unsigned long)&frame->info; - regs->ARM_r2 = (unsigned long)&frame->uc; + regs->ARM_r2 = (unsigned long)&frame->sig.uc; } return err; @@ -665,17 +660,33 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall) if (syscall) { if (regs->ARM_r0 == -ERESTART_RESTARTBLOCK) { if (thumb_mode(regs)) { - regs->ARM_r7 = __NR_restart_syscall; + regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE; regs->ARM_pc -= 2; } else { +#if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT) + regs->ARM_r7 = __NR_restart_syscall; + regs->ARM_pc -= 4; +#else u32 __user *usp; + u32 swival = __NR_restart_syscall; regs->ARM_sp -= 12; usp = (u32 __user *)regs->ARM_sp; + /* + * Either we supports OABI only, or we have + * EABI with the OABI compat layer enabled. + * In the later case we don't know if user + * space is EABI or not, and if not we must + * not clobber r7. Always using the OABI + * syscall solves that issue and works for + * all those cases. + */ + swival = swival - __NR_SYSCALL_BASE + __NR_OABI_SYSCALL_BASE; + put_user(regs->ARM_pc, &usp[0]); /* swi __NR_restart_syscall */ - put_user(0xef000000 | __NR_restart_syscall, &usp[1]); + put_user(0xef000000 | swival, &usp[1]); /* ldr pc, [sp], #12 */ put_user(0xe49df00c, &usp[2]); @@ -683,6 +694,7 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall) (unsigned long)(usp + 3)); regs->ARM_pc = regs->ARM_sp + 4; +#endif } } if (regs->ARM_r0 == -ERESTARTNOHAND || diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 1370d726dc1..68e9634d260 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -7,7 +7,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/delay.h> #include <linux/init.h> #include <linux/spinlock.h> diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index d6bd435a685..09a67d77185 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -16,7 +16,6 @@ * 1998-12-20 Updated NTP code according to technical memorandum Jan '96 * "A Kernel Model for Precision Timekeeping" by Dave Mills */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/interrupt.h> @@ -379,7 +378,7 @@ static int timer_dyn_tick_enable(void) int ret = -ENODEV; if (dyn_tick) { - write_seqlock_irqsave(&xtime_lock, flags); + spin_lock_irqsave(&dyn_tick->lock, flags); ret = 0; if (!(dyn_tick->state & DYN_TICK_ENABLED)) { ret = dyn_tick->enable(); @@ -387,7 +386,7 @@ static int timer_dyn_tick_enable(void) if (ret == 0) dyn_tick->state |= DYN_TICK_ENABLED; } - write_sequnlock_irqrestore(&xtime_lock, flags); + spin_unlock_irqrestore(&dyn_tick->lock, flags); } return ret; @@ -400,7 +399,7 @@ static int timer_dyn_tick_disable(void) int ret = -ENODEV; if (dyn_tick) { - write_seqlock_irqsave(&xtime_lock, flags); + spin_lock_irqsave(&dyn_tick->lock, flags); ret = 0; if (dyn_tick->state & DYN_TICK_ENABLED) { ret = dyn_tick->disable(); @@ -408,7 +407,7 @@ static int timer_dyn_tick_disable(void) if (ret == 0) dyn_tick->state &= ~DYN_TICK_ENABLED; } - write_sequnlock_irqrestore(&xtime_lock, flags); + spin_unlock_irqrestore(&dyn_tick->lock, flags); } return ret; @@ -422,15 +421,20 @@ static int timer_dyn_tick_disable(void) void timer_dyn_reprogram(void) { struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick; - unsigned long next, seq; + unsigned long next, seq, flags; - if (dyn_tick && (dyn_tick->state & DYN_TICK_ENABLED)) { + if (!dyn_tick) + return; + + spin_lock_irqsave(&dyn_tick->lock, flags); + if (dyn_tick->state & DYN_TICK_ENABLED) { next = next_timer_interrupt(); do { seq = read_seqbegin(&xtime_lock); - dyn_tick->reprogram(next_timer_interrupt() - jiffies); + dyn_tick->reprogram(next - jiffies); } while (read_seqretry(&xtime_lock, seq)); } + spin_unlock_irqrestore(&dyn_tick->lock, flags); } static ssize_t timer_show_dyn_tick(struct sys_device *dev, char *buf) @@ -499,5 +503,10 @@ void __init time_init(void) if (system_timer->offset == NULL) system_timer->offset = dummy_gettimeoffset; system_timer->init(); + +#ifdef CONFIG_NO_IDLE_HZ + if (system_timer->dyn_tick) + system_timer->dyn_tick->lock = SPIN_LOCK_UNLOCKED; +#endif } diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 35230a06010..35a052fc177 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -12,7 +12,6 @@ * 'linux/arch/arm/lib/traps.S'. Mostly a debugging aid, but will probably * kill the offending process. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/signal.h> #include <linux/spinlock.h> diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 2b254e88595..3ca574ee277 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -4,7 +4,6 @@ */ #include <asm-generic/vmlinux.lds.h> -#include <linux/config.h> #include <asm/thread_info.h> #include <asm/memory.h> @@ -80,6 +79,10 @@ SECTIONS *(.exit.text) *(.exit.data) *(.exitcall.exit) +#ifndef CONFIG_MMU + *(.fixup) + *(__ex_table) +#endif } .text : { /* Real text segment */ @@ -87,7 +90,9 @@ SECTIONS *(.text) SCHED_TEXT LOCK_TEXT +#ifdef CONFIG_MMU *(.fixup) +#endif *(.gnu.warning) *(.rodata) *(.rodata.*) @@ -142,7 +147,9 @@ SECTIONS */ . = ALIGN(32); __start___ex_table = .; +#ifdef CONFIG_MMU *(__ex_table) +#endif __stop___ex_table = .; /* diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 7b726b627ea..30351cd4560 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -6,28 +6,31 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ csumpartialcopy.o csumpartialcopyuser.o clearbit.o \ - copy_page.o delay.o findbit.o memchr.o memcpy.o \ + delay.o findbit.o memchr.o memcpy.o \ memmove.o memset.o memzero.o setbit.o \ strncpy_from_user.o strnlen_user.o \ strchr.o strrchr.o \ testchangebit.o testclearbit.o testsetbit.o \ - getuser.o putuser.o clear_user.o \ ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ ucmpdi2.o lib1funcs.o div64.o sha1.o \ io-readsb.o io-writesb.o io-readsl.o io-writesl.o +mmu-y := clear_user.o copy_page.o getuser.o putuser.o + # the code in uaccess.S is not preemption safe and # probably faster on ARMv3 only ifeq ($(CONFIG_PREEMPT),y) - lib-y += copy_from_user.o copy_to_user.o + mmu-y += copy_from_user.o copy_to_user.o else ifneq ($(CONFIG_CPU_32v3),y) - lib-y += copy_from_user.o copy_to_user.o + mmu-y += copy_from_user.o copy_to_user.o else - lib-y += uaccess.o + mmu-y += uaccess.o endif endif +lib-$(CONFIG_MMU) += $(mmu-y) + ifeq ($(CONFIG_CPU_32v3),y) lib-y += io-readsw-armv3.o io-writesw-armv3.o else diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S index 16153c86c3f..74230083cbf 100644 --- a/arch/arm/lib/backtrace.S +++ b/arch/arm/lib/backtrace.S @@ -10,7 +10,6 @@ * 27/03/03 Ian Molton Clean up CONFIG_CPU * */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/assembler.h> .text @@ -41,7 +40,7 @@ ENTRY(c_backtrace) movne r0, #0 movs frame, r0 1: moveq r0, #-2 - LOADREGS(eqfd, sp!, {r4 - r8, pc}) + ldmeqfd sp!, {r4 - r8, pc} 2: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction ldr r0, [sp], #4 @@ -85,7 +84,7 @@ ENTRY(c_backtrace) * A zero next framepointer means we're done. */ teq next, #0 - LOADREGS(eqfd, sp!, {r4 - r8, pc}) + ldmeqfd sp!, {r4 - r8, pc} /* * The next framepointer must be above the @@ -97,16 +96,13 @@ ENTRY(c_backtrace) b 1007f /* - * Fixup for LDMDB + * Fixup for LDMDB. Note that this must not be in the fixup section. */ - .section .fixup,"ax" - .align 0 1007: ldr r0, =.Lbad mov r1, frame bl printk - LOADREGS(fd, sp!, {r4 - r8, pc}) + ldmfd sp!, {r4 - r8, pc} .ltorg - .previous .section __ex_table,"a" .align 3 @@ -145,7 +141,7 @@ ENTRY(c_backtrace) adrne r0, .Lcr blne printk mov r0, stack - LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc}) + ldmfd sp!, {instr, reg, stack, r7, r8, pc} .Lfp: .asciz " r%d = %08X%c" .Lcr: .asciz "\n" diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h index b8c14e93669..54225102174 100644 --- a/arch/arm/lib/bitops.h +++ b/arch/arm/lib/bitops.h @@ -1,4 +1,3 @@ -#include <linux/config.h> #if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_32v6K) .macro bitop, instr diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S index 7ff9f831b3f..ecb28dcdaf7 100644 --- a/arch/arm/lib/clear_user.S +++ b/arch/arm/lib/clear_user.S @@ -12,13 +12,13 @@ .text -/* Prototype: int __arch_clear_user(void *addr, size_t sz) +/* Prototype: int __clear_user(void *addr, size_t sz) * Purpose : clear some user memory * Params : addr - user memory address to clear * : sz - number of bytes to clear * Returns : number of bytes NOT cleared */ -ENTRY(__arch_clear_user) +ENTRY(__clear_user) stmfd sp!, {r1, lr} mov r2, #0 cmp r1, #4 @@ -43,10 +43,10 @@ USER( strnebt r2, [r0], #1) tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1 USER( strnebt r2, [r0], #1) mov r0, #0 - LOADREGS(fd,sp!, {r1, pc}) + ldmfd sp!, {r1, pc} .section .fixup,"ax" .align 0 -9001: LOADREGS(fd,sp!, {r0, pc}) +9001: ldmfd sp!, {r0, pc} .previous diff --git a/arch/arm/lib/copy_from_user.S b/arch/arm/lib/copy_from_user.S index 7497393a0e8..6b7363ce749 100644 --- a/arch/arm/lib/copy_from_user.S +++ b/arch/arm/lib/copy_from_user.S @@ -16,7 +16,7 @@ /* * Prototype: * - * size_t __arch_copy_from_user(void *to, const void *from, size_t n) + * size_t __copy_from_user(void *to, const void *from, size_t n) * * Purpose: * @@ -83,7 +83,7 @@ .text -ENTRY(__arch_copy_from_user) +ENTRY(__copy_from_user) #include "copy_template.S" diff --git a/arch/arm/lib/copy_page.S b/arch/arm/lib/copy_page.S index 68117968482..666c99cc074 100644 --- a/arch/arm/lib/copy_page.S +++ b/arch/arm/lib/copy_page.S @@ -43,4 +43,4 @@ ENTRY(copy_page) bgt 1b @ 1 PLD( ldmeqia r1!, {r3, r4, ip, lr} ) PLD( beq 2b ) - LOADREGS(fd, sp!, {r4, pc}) @ 3 + ldmfd sp!, {r4, pc} @ 3 diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S index 4a6d8ea1402..5224d94688d 100644 --- a/arch/arm/lib/copy_to_user.S +++ b/arch/arm/lib/copy_to_user.S @@ -16,7 +16,7 @@ /* * Prototype: * - * size_t __arch_copy_to_user(void *to, const void *from, size_t n) + * size_t __copy_to_user(void *to, const void *from, size_t n) * * Purpose: * @@ -86,7 +86,7 @@ .text -ENTRY(__arch_copy_to_user) +ENTRY(__copy_to_user) #include "copy_template.S" diff --git a/arch/arm/lib/csumipv6.S b/arch/arm/lib/csumipv6.S index 7065a20ee8a..9621469beec 100644 --- a/arch/arm/lib/csumipv6.S +++ b/arch/arm/lib/csumipv6.S @@ -28,5 +28,5 @@ ENTRY(__csum_ipv6_magic) adcs r0, r0, r3 adcs r0, r0, r2 adcs r0, r0, #0 - LOADREGS(fd, sp!, {pc}) + ldmfd sp!, {pc} diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S index 9183b06c0e2..930a7025922 100644 --- a/arch/arm/lib/delay.S +++ b/arch/arm/lib/delay.S @@ -31,7 +31,7 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 mov r2, r2, lsr #10 @ max = 0x00007fff mul r0, r2, r0 @ max = 2^32-1 movs r0, r0, lsr #6 - RETINSTR(moveq,pc,lr) + moveq pc, lr /* * loops = r0 * HZ * loops_per_jiffy / 1000000 @@ -43,20 +43,20 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 ENTRY(__delay) subs r0, r0, #1 #if 0 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 #endif bhi __delay - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/ecard.S b/arch/arm/lib/ecard.S index fb7b602a6f7..c55aaa2a208 100644 --- a/arch/arm/lib/ecard.S +++ b/arch/arm/lib/ecard.S @@ -29,7 +29,7 @@ ENTRY(ecard_loader_read) CPSR2SPSR(r0) mov lr, pc mov pc, r2 - LOADREGS(fd, sp!, {r4 - r12, pc}) + ldmfd sp!, {r4 - r12, pc} @ Purpose: call an expansion card loader to reset the card @ Proto : void read_loader(int card_base, char *loader); @@ -41,5 +41,5 @@ ENTRY(ecard_loader_reset) CPSR2SPSR(r0) mov lr, pc add pc, r1, #8 - LOADREGS(fd, sp!, {r4 - r12, pc}) + ldmfd sp!, {r4 - r12, pc} diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S index 6f8e27a58c7..a5ca0248aa4 100644 --- a/arch/arm/lib/findbit.S +++ b/arch/arm/lib/findbit.S @@ -32,7 +32,7 @@ ENTRY(_find_first_zero_bit_le) 2: cmp r2, r1 @ any more? blo 1b 3: mov r0, r1 @ no free bits - RETINSTR(mov,pc,lr) + mov pc, lr /* * Purpose : Find next 'zero' bit @@ -66,7 +66,7 @@ ENTRY(_find_first_bit_le) 2: cmp r2, r1 @ any more? blo 1b 3: mov r0, r1 @ no free bits - RETINSTR(mov,pc,lr) + mov pc, lr /* * Purpose : Find next 'one' bit @@ -98,7 +98,7 @@ ENTRY(_find_first_zero_bit_be) 2: cmp r2, r1 @ any more? blo 1b 3: mov r0, r1 @ no free bits - RETINSTR(mov,pc,lr) + mov pc, lr ENTRY(_find_next_zero_bit_be) teq r1, #0 @@ -126,7 +126,7 @@ ENTRY(_find_first_bit_be) 2: cmp r2, r1 @ any more? blo 1b 3: mov r0, r1 @ no free bits - RETINSTR(mov,pc,lr) + mov pc, lr ENTRY(_find_next_bit_be) teq r1, #0 @@ -164,5 +164,5 @@ ENTRY(_find_next_bit_be) addeq r2, r2, #1 mov r0, r2 #endif - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/io-readsb.S b/arch/arm/lib/io-readsb.S index d3d8de71a2c..fb966ad0276 100644 --- a/arch/arm/lib/io-readsb.S +++ b/arch/arm/lib/io-readsb.S @@ -72,7 +72,7 @@ ENTRY(__raw_readsb) bpl .Linsb_16_lp tst r2, #15 - LOADREGS(eqfd, sp!, {r4 - r6, pc}) + ldmeqfd sp!, {r4 - r6, pc} .Linsb_no_16: tst r2, #8 beq .Linsb_no_8 @@ -109,7 +109,7 @@ ENTRY(__raw_readsb) str r3, [r1], #4 .Linsb_no_4: ands r2, r2, #3 - LOADREGS(eqfd, sp!, {r4 - r6, pc}) + ldmeqfd sp!, {r4 - r6, pc} cmp r2, #2 ldrb r3, [r0] @@ -119,4 +119,4 @@ ENTRY(__raw_readsb) ldrgtb r3, [r0] strgtb r3, [r1] - LOADREGS(fd, sp!, {r4 - r6, pc}) + ldmfd sp!, {r4 - r6, pc} diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S index 146d47c1545..4ef90418514 100644 --- a/arch/arm/lib/io-readsw-armv3.S +++ b/arch/arm/lib/io-readsw-armv3.S @@ -28,7 +28,7 @@ strb r3, [r1], #1 subs r2, r2, #1 - RETINSTR(moveq, pc, lr) + moveq pc, lr ENTRY(__raw_readsw) teq r2, #0 @ do we have to check for the zero len? @@ -69,7 +69,7 @@ ENTRY(__raw_readsw) bpl .Linsw_8_lp tst r2, #7 - LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) + ldmeqfd sp!, {r4, r5, r6, pc} .Lno_insw_8: tst r2, #4 beq .Lno_insw_4 @@ -102,6 +102,6 @@ ENTRY(__raw_readsw) movne r3, r3, lsr #8 strneb r3, [r1] - LOADREGS(fd, sp!, {r4, r5, r6, pc}) + ldmfd sp!, {r4, r5, r6, pc} diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S index 08209fc640e..7eba2b6cc69 100644 --- a/arch/arm/lib/io-writesb.S +++ b/arch/arm/lib/io-writesb.S @@ -64,7 +64,7 @@ ENTRY(__raw_writesb) bpl .Loutsb_16_lp tst r2, #15 - LOADREGS(eqfd, sp!, {r4, r5, pc}) + ldmeqfd sp!, {r4, r5, pc} .Loutsb_no_16: tst r2, #8 beq .Loutsb_no_8 @@ -80,7 +80,7 @@ ENTRY(__raw_writesb) outword r3 .Loutsb_no_4: ands r2, r2, #3 - LOADREGS(eqfd, sp!, {r4, r5, pc}) + ldmeqfd sp!, {r4, r5, pc} cmp r2, #2 ldrb r3, [r1], #1 @@ -90,4 +90,4 @@ ENTRY(__raw_writesb) ldrgtb r3, [r1] strgtb r3, [r0] - LOADREGS(fd, sp!, {r4, r5, pc}) + ldmfd sp!, {r4, r5, pc} diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S index 52d62b48129..1607a29f49b 100644 --- a/arch/arm/lib/io-writesw-armv3.S +++ b/arch/arm/lib/io-writesw-armv3.S @@ -29,7 +29,7 @@ orr r3, r3, r3, lsl #16 str r3, [r0] subs r2, r2, #1 - RETINSTR(moveq, pc, lr) + moveq pc, lr ENTRY(__raw_writesw) teq r2, #0 @ do we have to check for the zero len? @@ -80,7 +80,7 @@ ENTRY(__raw_writesw) bpl .Loutsw_8_lp tst r2, #7 - LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) + ldmeqfd sp!, {r4, r5, r6, pc} .Lno_outsw_8: tst r2, #4 beq .Lno_outsw_4 @@ -124,4 +124,4 @@ ENTRY(__raw_writesw) orrne ip, ip, ip, lsr #16 strne ip, [r0] - LOADREGS(fd, sp!, {r4, r5, r6, pc}) + ldmfd sp!, {r4, r5, r6, pc} diff --git a/arch/arm/lib/memchr.S b/arch/arm/lib/memchr.S index ac34fe55d21..e7ab1ea8eba 100644 --- a/arch/arm/lib/memchr.S +++ b/arch/arm/lib/memchr.S @@ -22,4 +22,4 @@ ENTRY(memchr) bne 1b sub r0, r0, #1 2: movne r0, #0 - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S index a1795f59993..95b110b07a8 100644 --- a/arch/arm/lib/memset.S +++ b/arch/arm/lib/memset.S @@ -53,7 +53,7 @@ ENTRY(memset) stmgeia r0!, {r1, r3, ip, lr} stmgeia r0!, {r1, r3, ip, lr} bgt 2b - LOADREGS(eqfd, sp!, {pc}) @ Now <64 bytes to go. + ldmeqfd sp!, {pc} @ Now <64 bytes to go. /* * No need to correct the count; we're only testing bits from now on */ @@ -77,4 +77,4 @@ ENTRY(memset) strneb r1, [r0], #1 tst r2, #1 strneb r1, [r0], #1 - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S index 51ccc60160f..abf2508e822 100644 --- a/arch/arm/lib/memzero.S +++ b/arch/arm/lib/memzero.S @@ -53,7 +53,7 @@ ENTRY(__memzero) stmgeia r0!, {r2, r3, ip, lr} @ 4 stmgeia r0!, {r2, r3, ip, lr} @ 4 bgt 3b @ 1 - LOADREGS(eqfd, sp!, {pc}) @ 1/2 quick exit + ldmeqfd sp!, {pc} @ 1/2 quick exit /* * No need to correct the count; we're only testing bits from now on */ @@ -77,4 +77,4 @@ ENTRY(__memzero) strneb r2, [r0], #1 @ 1 tst r1, #1 @ 1 a byte left over strneb r2, [r0], #1 @ 1 - RETINSTR(mov,pc,lr) @ 1 + mov pc, lr @ 1 diff --git a/arch/arm/lib/strchr.S b/arch/arm/lib/strchr.S index 5b9b493733f..9f18d6fdee6 100644 --- a/arch/arm/lib/strchr.S +++ b/arch/arm/lib/strchr.S @@ -23,4 +23,4 @@ ENTRY(strchr) teq r2, r1 movne r0, #0 subeq r0, r0, #1 - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/strncpy_from_user.S b/arch/arm/lib/strncpy_from_user.S index 629cc877527..36e3741a377 100644 --- a/arch/arm/lib/strncpy_from_user.S +++ b/arch/arm/lib/strncpy_from_user.S @@ -20,8 +20,7 @@ * returns the number of characters copied (strlen of copied string), * -EFAULT on exception, or "len" if we fill the whole buffer */ -ENTRY(__arch_strncpy_from_user) - save_lr +ENTRY(__strncpy_from_user) mov ip, r1 1: subs r2, r2, #1 USER( ldrplbt r3, [r1], #1) @@ -31,13 +30,13 @@ USER( ldrplbt r3, [r1], #1) bne 1b sub r1, r1, #1 @ take NUL character out of count 2: sub r0, r1, ip - restore_pc + mov pc, lr .section .fixup,"ax" .align 0 9001: mov r3, #0 strb r3, [r0, #0] @ null terminate mov r0, #-EFAULT - restore_pc + mov pc, lr .previous diff --git a/arch/arm/lib/strnlen_user.S b/arch/arm/lib/strnlen_user.S index 67bcd826812..18d8fa4f925 100644 --- a/arch/arm/lib/strnlen_user.S +++ b/arch/arm/lib/strnlen_user.S @@ -14,14 +14,13 @@ .text .align 5 -/* Prototype: unsigned long __arch_strnlen_user(const char *str, long n) +/* Prototype: unsigned long __strnlen_user(const char *str, long n) * Purpose : get length of a string in user memory * Params : str - address of string in user memory * Returns : length of string *including terminator* * or zero on exception, or n + 1 if too long */ -ENTRY(__arch_strnlen_user) - save_lr +ENTRY(__strnlen_user) mov r2, r0 1: USER( ldrbt r3, [r0], #1) @@ -31,10 +30,10 @@ USER( ldrbt r3, [r0], #1) bne 1b add r0, r0, #1 2: sub r0, r0, r2 - restore_pc + mov pc, lr .section .fixup,"ax" .align 0 9001: mov r0, #0 - restore_pc + mov pc, lr .previous diff --git a/arch/arm/lib/strrchr.S b/arch/arm/lib/strrchr.S index fa923f026f1..538df220aa4 100644 --- a/arch/arm/lib/strrchr.S +++ b/arch/arm/lib/strrchr.S @@ -22,4 +22,4 @@ ENTRY(strrchr) teq r2, #0 bne 1b mov r0, r3 - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S index 0cc450f863b..b48bd6d5fd8 100644 --- a/arch/arm/lib/uaccess.S +++ b/arch/arm/lib/uaccess.S @@ -19,7 +19,7 @@ #define PAGE_SHIFT 12 -/* Prototype: int __arch_copy_to_user(void *to, const char *from, size_t n) +/* Prototype: int __copy_to_user(void *to, const char *from, size_t n) * Purpose : copy a block to user memory from kernel memory * Params : to - user memory * : from - kernel memory @@ -39,7 +39,7 @@ USER( strgtbt r3, [r0], #1) @ May fault sub r2, r2, ip b .Lc2u_dest_aligned -ENTRY(__arch_copy_to_user) +ENTRY(__copy_to_user) stmfd sp!, {r2, r4 - r7, lr} cmp r2, #4 blt .Lc2u_not_enough @@ -105,7 +105,7 @@ USER( strgtbt r3, [r0], #1) @ May fault movs ip, r2 bne .Lc2u_nowords .Lc2u_finished: mov r0, #0 - LOADREGS(fd,sp!,{r2, r4 - r7, pc}) + ldmfd sp!, {r2, r4 - r7, pc} .Lc2u_src_not_aligned: bic r1, r1, #3 @@ -280,10 +280,10 @@ USER( strgtbt r3, [r0], #1) @ May fault .section .fixup,"ax" .align 0 -9001: LOADREGS(fd,sp!, {r0, r4 - r7, pc}) +9001: ldmfd sp!, {r0, r4 - r7, pc} .previous -/* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n); +/* Prototype: unsigned long __copy_from_user(void *to,const void *from,unsigned long n); * Purpose : copy a block from user memory to kernel memory * Params : to - kernel memory * : from - user memory @@ -302,7 +302,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault sub r2, r2, ip b .Lcfu_dest_aligned -ENTRY(__arch_copy_from_user) +ENTRY(__copy_from_user) stmfd sp!, {r0, r2, r4 - r7, lr} cmp r2, #4 blt .Lcfu_not_enough @@ -369,7 +369,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault bne .Lcfu_nowords .Lcfu_finished: mov r0, #0 add sp, sp, #8 - LOADREGS(fd,sp!,{r4 - r7, pc}) + ldmfd sp!, {r4 - r7, pc} .Lcfu_src_not_aligned: bic r1, r1, #3 @@ -556,6 +556,6 @@ USER( ldrgtbt r3, [r1], #1) @ May fault movne r1, r4 blne __memzero mov r0, r4 - LOADREGS(fd,sp!, {r4 - r7, pc}) + ldmfd sp!, {r4 - r7, pc} .previous diff --git a/arch/arm/lib/ucmpdi2.S b/arch/arm/lib/ucmpdi2.S index d847a62834c..f76de07ac18 100644 --- a/arch/arm/lib/ucmpdi2.S +++ b/arch/arm/lib/ucmpdi2.S @@ -10,7 +10,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/linkage.h> #ifdef __ARMEB__ diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c index 65be5efd633..baa997c857d 100644 --- a/arch/arm/mach-aaec2000/core.c +++ b/arch/arm/mach-aaec2000/core.c @@ -9,7 +9,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -143,7 +142,7 @@ aaec2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction aaec2000_timer_irq = { .name = "AAEC-2000 Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = aaec2000_timer_interrupt, }; diff --git a/arch/arm/mach-at91rm9200/Kconfig b/arch/arm/mach-at91rm9200/Kconfig index 4b7218fc3eb..2f85e8693b1 100644 --- a/arch/arm/mach-at91rm9200/Kconfig +++ b/arch/arm/mach-at91rm9200/Kconfig @@ -1,47 +1,109 @@ -if ARCH_AT91RM9200 +if ARCH_AT91 + +menu "Atmel AT91 System-on-Chip" + +comment "Atmel AT91 Processors" + +config ARCH_AT91RM9200 + bool "AT91RM9200" -menu "AT91RM9200 Implementations" +config ARCH_AT91SAM9260 + bool "AT91SAM9260" + +config ARCH_AT91SAM9261 + bool "AT91SAM9261" + +# ---------------------------------------------------------- + +if ARCH_AT91RM9200 comment "AT91RM9200 Board Type" +config MACH_ONEARM + bool "Ajeco 1ARM Single Board Computer" + depends on ARCH_AT91RM9200 + help + Select this if you are using Ajeco's 1ARM Single Board Computer. + <http://www.ajeco.fi/products.htm> + config ARCH_AT91RM9200DK bool "Atmel AT91RM9200-DK Development board" depends on ARCH_AT91RM9200 help - Select this if you are using Atmel's AT91RM9200-DK Development board + Select this if you are using Atmel's AT91RM9200-DK Development board. + (Discontinued) + config MACH_AT91RM9200EK bool "Atmel AT91RM9200-EK Evaluation Kit" depends on ARCH_AT91RM9200 help - Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit + Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit. + <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507> config MACH_CSB337 - bool "Cogent CSB337 board" + bool "Cogent CSB337" depends on ARCH_AT91RM9200 help - Select this if you are using Cogent's CSB337 board + Select this if you are using Cogent's CSB337 board. + <http://www.cogcomp.com/csb_csb337.htm> config MACH_CSB637 - bool "Cogent CSB637 board" + bool "Cogent CSB637" depends on ARCH_AT91RM9200 help - Select this if you are using Cogent's CSB637 board + Select this if you are using Cogent's CSB637 board. + <http://www.cogcomp.com/csb_csb637.htm> config MACH_CARMEVA - bool "Conitec's ARM&EVA" + bool "Conitec ARM&EVA" depends on ARCH_AT91RM9200 help - Select this if you are using Conitec's AT91RM9200-MCU-Module + Select this if you are using Conitec's AT91RM9200-MCU-Module. + <http://www.conitec.net/english/linuxboard.htm> + +config MACH_ATEB9200 + bool "Embest ATEB9200" + depends on ARCH_AT91RM9200 + help + Select this if you are using Embest's ATEB9200 board. + <http://www.embedinfo.com/english/product/ATEB9200.asp> config MACH_KB9200 - bool "KwikByte's KB920x" + bool "KwikByte KB920x" depends on ARCH_AT91RM9200 help - Select this if you are using KwikByte's KB920x board + Select this if you are using KwikByte's KB920x board. + <http://kwikbyte.com/KB9202_description_new.htm> + +config MACH_KAFA + bool "Sperry-Sun KAFA board" + depends on ARCH_AT91RM9200 + help + Select this if you are using Sperry-Sun's KAFA board. + +endif + +# ---------------------------------------------------------- + +if ARCH_AT91SAM9260 + +comment "AT91SAM9260 Board Type" + +endif + +# ---------------------------------------------------------- + +if ARCH_AT91SAM9261 + +comment "AT91SAM9261 Board Type" + +endif + +# ---------------------------------------------------------- -comment "AT91RM9200 Feature Selections" +comment "AT91 Feature Selections" config AT91_PROGRAMMABLE_CLOCKS bool "Programmable Clocks" diff --git a/arch/arm/mach-at91rm9200/Makefile b/arch/arm/mach-at91rm9200/Makefile index ef88c4128ed..c174805c24e 100644 --- a/arch/arm/mach-at91rm9200/Makefile +++ b/arch/arm/mach-at91rm9200/Makefile @@ -2,27 +2,46 @@ # Makefile for the linux kernel. # -obj-y := clock.o irq.o time.o gpio.o common.o devices.o +obj-y := clock.o irq.o gpio.o devices.o obj-m := obj-n := obj- := -# Board-specific support +obj-$(CONFIG_PM) += pm.o + +# CPU-specific support +obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o +obj-$(CONFIG_ARCH_AT91SAM9260) += +obj-$(CONFIG_ARCH_AT91SAM9261) += + +# AT91RM9200 Board-specific support +obj-$(CONFIG_MACH_ONEARM) += board-1arm.o obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o obj-$(CONFIG_MACH_CSB337) += board-csb337.o obj-$(CONFIG_MACH_CSB637) += board-csb637.o -#obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o -#obj-$(CONFIG_MACH_KB9200) += board-kb9202.o +obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o +obj-$(CONFIG_MACH_KB9200) += board-kb9202.o +obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o +obj-$(CONFIG_MACH_KAFA) += board-kafa.o + +# AT91SAM9260 board-specific support + +# AT91SAM9261 board-specific support # LEDs support led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o led-$(CONFIG_MACH_AT91RM9200EK) += leds.o led-$(CONFIG_MACH_CSB337) += leds.o led-$(CONFIG_MACH_CSB637) += leds.o -#led-$(CONFIG_MACH_KB9200) += leds.o -#led-$(CONFIG_MACH_KAFA) += leds.o +led-$(CONFIG_MACH_KB9200) += leds.o +led-$(CONFIG_MACH_KAFA) += leds.o obj-$(CONFIG_LEDS) += $(led-y) # VGA support #obj-$(CONFIG_FB_S1D13XXX) += ics1523.o + + +ifeq ($(CONFIG_PM_DEBUG),y) +CFLAGS_pm.o += -DDEBUG +endif diff --git a/arch/arm/mach-at91rm9200/common.c b/arch/arm/mach-at91rm9200/at91rm9200.c index 3848fd2d559..7e1d072bdd8 100644 --- a/arch/arm/mach-at91rm9200/common.c +++ b/arch/arm/mach-at91rm9200/at91rm9200.c @@ -1,5 +1,5 @@ /* - * arch/arm/mach-at91rm9200/common.c + * arch/arm/mach-at91rm9200/at91rm9200.c * * Copyright (C) 2005 SAN People * @@ -10,13 +10,13 @@ * */ -#include <linux/config.h> #include <linux/module.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <asm/arch/hardware.h> +#include <asm/hardware.h> +#include "generic.h" static struct map_desc at91rm9200_io_desc[] __initdata = { { @@ -94,6 +94,11 @@ static struct map_desc at91rm9200_io_desc[] __initdata = { .pfn = __phys_to_pfn(AT91_BASE_TCB0), .length = SZ_16K, .type = MT_DEVICE, + }, { + .virtual = AT91_SRAM_VIRT_BASE, + .pfn = __phys_to_pfn(AT91_SRAM_BASE), + .length = AT91_SRAM_SIZE, + .type = MT_DEVICE, }, }; @@ -102,14 +107,3 @@ void __init at91rm9200_map_io(void) iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); } - -unsigned long at91_master_clock; - -EXPORT_SYMBOL(at91_master_clock); - - -int at91_serial_map[AT91_NR_UART]; -int at91_console_port; - -EXPORT_SYMBOL(at91_serial_map); -EXPORT_SYMBOL(at91_console_port); diff --git a/arch/arm/mach-at91rm9200/time.c b/arch/arm/mach-at91rm9200/at91rm9200_time.c index 7ffcf443b99..a92a8622c78 100644 --- a/arch/arm/mach-at91rm9200/time.c +++ b/arch/arm/mach-at91rm9200/at91rm9200_time.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-at91rm9200/time.c + * linux/arch/arm/mach-at91rm9200/at91rm9200_time.c * * Copyright (C) 2003 SAN People * Copyright (C) 2003 ATMEL @@ -19,18 +19,19 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/kernel.h> #include <linux/sched.h> #include <linux/time.h> #include <asm/hardware.h> #include <asm/io.h> -#include <asm/irq.h> #include <asm/mach/time.h> +static unsigned long last_crtr; + /* * The ST_CRTR is updated asynchronously to the master clock. It is therefore * necessary to read it twice (with the same value) to ensure accuracy. @@ -56,7 +57,7 @@ static unsigned long at91rm9200_gettimeoffset(void) { unsigned long elapsed; - elapsed = (read_CRTR() - at91_sys_read(AT91_ST_RTAR)) & AT91_ST_ALMV; + elapsed = (read_CRTR() - last_crtr) & AT91_ST_ALMV; return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH; } @@ -66,15 +67,12 @@ static unsigned long at91rm9200_gettimeoffset(void) */ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { - unsigned long rtar; - if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */ write_seqlock(&xtime_lock); - while (((read_CRTR() - at91_sys_read(AT91_ST_RTAR)) & AT91_ST_ALMV) >= LATCH) { + while (((read_CRTR() - last_crtr) & AT91_ST_ALMV) >= LATCH) { timer_tick(regs); - rtar = (at91_sys_read(AT91_ST_RTAR) + LATCH) & AT91_ST_ALMV; - at91_sys_write(AT91_ST_RTAR, rtar); + last_crtr = (last_crtr + LATCH) & AT91_ST_ALMV; } write_sequnlock(&xtime_lock); @@ -87,10 +85,24 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_r static struct irqaction at91rm9200_timer_irq = { .name = "at91_tick", - .flags = SA_SHIRQ | SA_INTERRUPT, + .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER, .handler = at91rm9200_timer_interrupt }; +void at91rm9200_timer_reset(void) +{ + last_crtr = 0; + + /* Real time counter incremented every 30.51758 microseconds */ + at91_sys_write(AT91_ST_RTMR, 1); + + /* Set Period Interval timer */ + at91_sys_write(AT91_ST_PIMR, LATCH); + + /* Enable Period Interval Timer interrupt */ + at91_sys_write(AT91_ST_IER, AT91_ST_PITS); +} + /* * Set up timer interrupt. */ @@ -100,28 +112,30 @@ void __init at91rm9200_timer_init(void) at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS); (void) at91_sys_read(AT91_ST_SR); /* Clear any pending interrupts */ - /* - * Make IRQs happen for the system timer. - */ + /* Make IRQs happen for the system timer */ setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq); - /* Set initial alarm to 0 */ - at91_sys_write(AT91_ST_RTAR, 0); - - /* Real time counter incremented every 30.51758 microseconds */ - at91_sys_write(AT91_ST_RTMR, 1); - - /* Set Period Interval timer */ - at91_sys_write(AT91_ST_PIMR, LATCH); - /* Change the kernel's 'tick' value to 10009 usec. (the default is 10000) */ tick_usec = (LATCH * 1000000) / CLOCK_TICK_RATE; - /* Enable Period Interval Timer interrupt */ - at91_sys_write(AT91_ST_IER, AT91_ST_PITS); + /* Initialize and enable the timer interrupt */ + at91rm9200_timer_reset(); +} + +#ifdef CONFIG_PM +static void at91rm9200_timer_suspend(void) +{ + /* disable Period Interval Timer interrupt */ + at91_sys_write(AT91_ST_IDR, AT91_ST_PITS); } +#else +#define at91rm9200_timer_suspend NULL +#endif struct sys_timer at91rm9200_timer = { .init = at91rm9200_timer_init, .offset = at91rm9200_gettimeoffset, + .suspend = at91rm9200_timer_suspend, + .resume = at91rm9200_timer_reset, }; + diff --git a/arch/arm/mach-at91rm9200/board-1arm.c b/arch/arm/mach-at91rm9200/board-1arm.c new file mode 100644 index 00000000000..dc79e0992af --- /dev/null +++ b/arch/arm/mach-at91rm9200/board-1arm.c @@ -0,0 +1,109 @@ +/* + * linux/arch/arm/mach-at91rm9200/board-1arm.c + * + * Copyright (C) 2005 SAN People + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/config.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/module.h> +#include <linux/platform_device.h> + +#include <asm/hardware.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/irq.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/hardware.h> +#include <asm/arch/board.h> +#include <asm/arch/gpio.h> + +#include "generic.h" + +static void __init onearm_init_irq(void) +{ + /* Initialize AIC controller */ + at91rm9200_init_irq(NULL); + + /* Set up the GPIO interrupts */ + at91_gpio_irq_setup(PQFP_GPIO_BANKS); +} + +/* + * Serial port configuration. + * 0 .. 3 = USART0 .. USART3 + * 4 = DBGU + */ +static struct at91_uart_config __initdata onearm_uart_config = { + .console_tty = 0, /* ttyS0 */ + .nr_tty = 3, + .tty_map = { 4, 0, 1, -1, -1 }, /* ttyS0, ..., ttyS4 */ +}; + +static void __init onearm_map_io(void) +{ + at91rm9200_map_io(); + + /* Initialize clocks: 18.432 MHz crystal */ + at91_clock_init(18432000); + + /* Setup the serial ports and console */ + at91_init_serial(&onearm_uart_config); +} + +static struct at91_eth_data __initdata onearm_eth_data = { + .phy_irq_pin = AT91_PIN_PC4, + .is_rmii = 1, +}; + +static struct at91_usbh_data __initdata onearm_usbh_data = { + .ports = 1, +}; + +static struct at91_udc_data __initdata onearm_udc_data = { + .vbus_pin = AT91_PIN_PC2, + .pullup_pin = AT91_PIN_PC3, +}; + +static void __init onearm_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* Ethernet */ + at91_add_device_eth(&onearm_eth_data); + /* USB Host */ + at91_add_device_usbh(&onearm_usbh_data); + /* USB Device */ + at91_add_device_udc(&onearm_udc_data); +} + +MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") + /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91rm9200_timer, + .map_io = onearm_map_io, + .init_irq = onearm_init_irq, + .init_machine = onearm_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91rm9200/board-carmeva.c b/arch/arm/mach-at91rm9200/board-carmeva.c new file mode 100644 index 00000000000..2c138b542eb --- /dev/null +++ b/arch/arm/mach-at91rm9200/board-carmeva.c @@ -0,0 +1,131 @@ +/* + * linux/arch/arm/mach-at91rm9200/board-carmeva.c + * + * Copyright (c) 2005 Peer Georgi + * Conitec Datasystems + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/config.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/module.h> +#include <linux/platform_device.h> + +#include <asm/hardware.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/irq.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/hardware.h> +#include <asm/arch/board.h> +#include <asm/arch/gpio.h> + +#include "generic.h" + +static void __init carmeva_init_irq(void) +{ + /* Initialize AIC controller */ + at91rm9200_init_irq(NULL); + + /* Set up the GPIO interrupts */ + at91_gpio_irq_setup(BGA_GPIO_BANKS); +} + +/* + * Serial port configuration. + * 0 .. 3 = USART0 .. USART3 + * 4 = DBGU + */ +static struct at91_uart_config __initdata carmeva_uart_config = { + .console_tty = 0, /* ttyS0 */ + .nr_tty = 2, + .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ +}; + +static void __init carmeva_map_io(void) +{ + at91rm9200_map_io(); + + /* Initialize clocks: 20.000 MHz crystal */ + at91_clock_init(20000000); + + /* Setup the serial ports and console */ + at91_init_serial(&carmeva_uart_config); +} + +static struct at91_eth_data __initdata carmeva_eth_data = { + .phy_irq_pin = AT91_PIN_PC4, + .is_rmii = 1, +}; + +static struct at91_usbh_data __initdata carmeva_usbh_data = { + .ports = 2, +}; + +static struct at91_udc_data __initdata carmeva_udc_data = { + .vbus_pin = AT91_PIN_PD12, + .pullup_pin = AT91_PIN_PD9, +}; + +/* FIXME: user dependend */ +// static struct at91_cf_data __initdata carmeva_cf_data = { +// .det_pin = AT91_PIN_PB0, +// .rst_pin = AT91_PIN_PC5, + // .irq_pin = ... not connected + // .vcc_pin = ... always powered +// }; + +static struct at91_mmc_data __initdata carmeva_mmc_data = { + .is_b = 0, + .wire4 = 1, +}; + +static void __init carmeva_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* Ethernet */ + at91_add_device_eth(&carmeva_eth_data); + /* USB Host */ + at91_add_device_usbh(&carmeva_usbh_data); + /* USB Device */ + at91_add_device_udc(&carmeva_udc_data); + /* I2C */ + at91_add_device_i2c(); + /* Compact Flash */ +// at91_add_device_cf(&carmeva_cf_data); + /* SPI */ +// at91_add_device_spi(NULL, 0); + /* MMC */ + at91_add_device_mmc(&carmeva_mmc_data); +} + +MACHINE_START(CARMEVA, "Carmeva") + /* Maintainer: Conitec Datasystems */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91rm9200_timer, + .map_io = carmeva_map_io, + .init_irq = carmeva_init_irq, + .init_machine = carmeva_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91rm9200/board-csb337.c b/arch/arm/mach-at91rm9200/board-csb337.c index f45104ceea8..794d3fbb449 100644 --- a/arch/arm/mach-at91rm9200/board-csb337.c +++ b/arch/arm/mach-at91rm9200/board-csb337.c @@ -18,12 +18,12 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/types.h> #include <linux/init.h> #include <linux/mm.h> #include <linux/module.h> #include <linux/platform_device.h> +#include <linux/spi/spi.h> #include <asm/hardware.h> #include <asm/setup.h> @@ -34,9 +34,9 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <asm/arch/hardware.h> -#include <asm/mach/serial_at91rm9200.h> +#include <asm/hardware.h> #include <asm/arch/board.h> +#include <asm/arch/gpio.h> #include "generic.h" @@ -54,32 +54,24 @@ static void __init csb337_init_irq(void) * 0 .. 3 = USART0 .. USART3 * 4 = DBGU */ -#define CSB337_UART_MAP { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ -#define CSB337_SERIAL_CONSOLE 0 /* ttyS0 */ +static struct at91_uart_config __initdata csb337_uart_config = { + .console_tty = 0, /* ttyS0 */ + .nr_tty = 2, + .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ +}; static void __init csb337_map_io(void) { - int serial[AT91_NR_UART] = CSB337_UART_MAP; - int i; - at91rm9200_map_io(); /* Initialize clocks: 3.6864 MHz crystal */ at91_clock_init(3686400); /* Setup the LEDs */ - at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2); - -#ifdef CONFIG_SERIAL_AT91 - at91_console_port = CSB337_SERIAL_CONSOLE; - memcpy(at91_serial_map, serial, sizeof(serial)); - - /* Register UARTs */ - for (i = 0; i < AT91_NR_UART; i++) { - if (serial[i] >= 0) - at91_register_uart(i, serial[i]); - } -#endif + at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); + + /* Setup the serial ports and console */ + at91_init_serial(&csb337_uart_config); } static struct at91_eth_data __initdata csb337_eth_data = { @@ -118,17 +110,31 @@ static struct at91_mmc_data __initdata csb337_mmc_data = { .wp_pin = AT91_PIN_PD6, }; +static struct spi_board_info csb337_spi_devices[] = { + { /* CAN controller */ + .modalias = "sak82c900", + .chip_select = 0, + .max_speed_hz = 6 * 1000 * 1000, + }, +}; + static void __init csb337_board_init(void) { + /* Serial */ + at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&csb337_eth_data); /* USB Host */ at91_add_device_usbh(&csb337_usbh_data); /* USB Device */ at91_add_device_udc(&csb337_udc_data); + /* I2C */ + at91_add_device_i2c(); /* Compact Flash */ at91_set_gpio_input(AT91_PIN_PB22, 1); /* IOIS16 */ at91_add_device_cf(&csb337_cf_data); + /* SPI */ + at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices)); /* MMC */ at91_add_device_mmc(&csb337_mmc_data); } diff --git a/arch/arm/mach-at91rm9200/board-csb637.c b/arch/arm/mach-at91rm9200/board-csb637.c index f2c2d6e79bc..c8b6f334246 100644 --- a/arch/arm/mach-at91rm9200/board-csb637.c +++ b/arch/arm/mach-at91rm9200/board-csb637.c @@ -18,7 +18,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/types.h> #include <linux/init.h> #include <linux/mm.h> @@ -34,9 +33,9 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <asm/arch/hardware.h> -#include <asm/mach/serial_at91rm9200.h> +#include <asm/hardware.h> #include <asm/arch/board.h> +#include <asm/arch/gpio.h> #include "generic.h" @@ -54,14 +53,14 @@ static void __init csb637_init_irq(void) * 0 .. 3 = USART0 .. USART3 * 4 = DBGU */ -#define CSB637_UART_MAP { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ -#define CSB637_SERIAL_CONSOLE 0 /* ttyS0 */ +static struct at91_uart_config __initdata csb637_uart_config = { + .console_tty = 0, /* ttyS0 */ + .nr_tty = 2, + .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ +}; static void __init csb637_map_io(void) { - int serial[AT91_NR_UART] = CSB637_UART_MAP; - int i; - at91rm9200_map_io(); /* Initialize clocks: 3.6864 MHz crystal */ @@ -70,16 +69,8 @@ static void __init csb637_map_io(void) /* Setup the LEDs */ at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2); -#ifdef CONFIG_SERIAL_AT91 - at91_console_port = CSB637_SERIAL_CONSOLE; - memcpy(at91_serial_map, serial, sizeof(serial)); - - /* Register UARTs */ - for (i = 0; i < AT91_NR_UART; i++) { - if (serial[i] >= 0) - at91_register_uart(i, serial[i]); - } -#endif + /* Setup the serial ports and console */ + at91_init_serial(&csb637_uart_config); } static struct at91_eth_data __initdata csb637_eth_data = { @@ -98,12 +89,18 @@ static struct at91_udc_data __initdata csb637_udc_data = { static void __init csb637_board_init(void) { + /* Serial */ + at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&csb637_eth_data); /* USB Host */ at91_add_device_usbh(&csb637_usbh_data); /* USB Device */ at91_add_device_udc(&csb637_udc_data); + /* I2C */ + at91_add_device_i2c(); + /* SPI */ + at91_add_device_spi(NULL, 0); } MACHINE_START(CSB637, "Cogent CSB637") diff --git a/arch/arm/mach-at91rm9200/board-dk.c b/arch/arm/mach-at91rm9200/board-dk.c index 2d7200ed66e..65873037e02 100644 --- a/arch/arm/mach-at91rm9200/board-dk.c +++ b/arch/arm/mach-at91rm9200/board-dk.c @@ -21,12 +21,12 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/types.h> #include <linux/init.h> #include <linux/mm.h> #include <linux/module.h> #include <linux/platform_device.h> +#include <linux/spi/spi.h> #include <asm/hardware.h> #include <asm/setup.h> @@ -37,9 +37,9 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <asm/arch/hardware.h> -#include <asm/mach/serial_at91rm9200.h> +#include <asm/hardware.h> #include <asm/arch/board.h> +#include <asm/arch/gpio.h> #include "generic.h" @@ -57,14 +57,14 @@ static void __init dk_init_irq(void) * 0 .. 3 = USART0 .. USART3 * 4 = DBGU */ -#define DK_UART_MAP { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ -#define DK_SERIAL_CONSOLE 0 /* ttyS0 */ +static struct at91_uart_config __initdata dk_uart_config = { + .console_tty = 0, /* ttyS0 */ + .nr_tty = 2, + .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ +}; static void __init dk_map_io(void) { - int serial[AT91_NR_UART] = DK_UART_MAP; - int i; - at91rm9200_map_io(); /* Initialize clocks: 18.432 MHz crystal */ @@ -73,16 +73,8 @@ static void __init dk_map_io(void) /* Setup the LEDs */ at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2); -#ifdef CONFIG_SERIAL_AT91 - at91_console_port = DK_SERIAL_CONSOLE; - memcpy(at91_serial_map, serial, sizeof(serial)); - - /* Register UARTs */ - for (i = 0; i < AT91_NR_UART; i++) { - if (at91_serial_map[i] >= 0) - at91_register_uart(i, at91_serial_map[i]); - } -#endif + /* Setup the serial ports and console */ + at91_init_serial(&dk_uart_config); } static struct at91_eth_data __initdata dk_eth_data = { @@ -111,16 +103,48 @@ static struct at91_mmc_data __initdata dk_mmc_data = { .wire4 = 1, }; +static struct spi_board_info dk_spi_devices[] = { + { /* DataFlash chip */ + .modalias = "mtd_dataflash", + .chip_select = 0, + .max_speed_hz = 15 * 1000 * 1000, + }, + { /* UR6HCPS2-SP40 PS2-to-SPI adapter */ + .modalias = "ur6hcps2", + .chip_select = 1, + .max_speed_hz = 250 * 1000, + }, + { /* TLV1504 ADC, 4 channels, 10 bits; one is a temp sensor */ + .modalias = "tlv1504", + .chip_select = 2, + .max_speed_hz = 20 * 1000 * 1000, + }, +#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD + { /* DataFlash card */ + .modalias = "mtd_dataflash", + .chip_select = 3, + .max_speed_hz = 15 * 1000 * 1000, + } +#endif +}; + static void __init dk_board_init(void) { + /* Serial */ + at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&dk_eth_data); /* USB Host */ at91_add_device_usbh(&dk_usbh_data); /* USB Device */ at91_add_device_udc(&dk_udc_data); + at91_set_multi_drive(dk_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */ /* Compact Flash */ at91_add_device_cf(&dk_cf_data); + /* I2C */ + at91_add_device_i2c(); + /* SPI */ + at91_add_device_spi(dk_spi_devices, ARRAY_SIZE(dk_spi_devices)); #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD /* DataFlash card */ at91_set_gpio_output(AT91_PIN_PB7, 0); diff --git a/arch/arm/mach-at91rm9200/board-eb9200.c b/arch/arm/mach-at91rm9200/board-eb9200.c new file mode 100644 index 00000000000..a3e2df968a6 --- /dev/null +++ b/arch/arm/mach-at91rm9200/board-eb9200.c @@ -0,0 +1,130 @@ +/* + * linux/arch/arm/mach-at91rm9200/board-eb9200.c + * + * Copyright (C) 2005 SAN People, adapted for ATEB9200 from Embest + * by Andrew Patrikalakis + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/config.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/module.h> +#include <linux/device.h> + +#include <asm/hardware.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/irq.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/hardware.h> +#include <asm/arch/board.h> +#include <asm/arch/gpio.h> + +#include "generic.h" + +static void __init eb9200_init_irq(void) +{ + /* Initialize AIC controller */ + at91rm9200_init_irq(NULL); + + /* Set up the GPIO interrupts */ + at91_gpio_irq_setup(BGA_GPIO_BANKS); +} + +/* + * Serial port configuration. + * 0 .. 3 = USART0 .. USART3 + * 4 = DBGU + */ +static struct at91_uart_config __initdata eb9200_uart_config = { + .console_tty = 0, /* ttyS0 */ + .nr_tty = 2, + .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ +}; + +static void __init eb9200_map_io(void) +{ + at91rm9200_map_io(); + + /* Initialize clocks: 18.432 MHz crystal */ + at91_clock_init(18432000); + + /* Setup the serial ports and console */ + at91_init_serial(&eb9200_uart_config); +} + +static struct at91_eth_data __initdata eb9200_eth_data = { + .phy_irq_pin = AT91_PIN_PC4, + .is_rmii = 1, +}; + +static struct at91_usbh_data __initdata eb9200_usbh_data = { + .ports = 2, +}; + +static struct at91_udc_data __initdata eb9200_udc_data = { + .vbus_pin = AT91_PIN_PD4, + .pullup_pin = AT91_PIN_PD5, +}; + +static struct at91_cf_data __initdata eb9200_cf_data = { + .det_pin = AT91_PIN_PB0, + .rst_pin = AT91_PIN_PC5, + // .irq_pin = ... not connected + // .vcc_pin = ... always powered +}; + +static struct at91_mmc_data __initdata eb9200_mmc_data = { + .is_b = 0, + .wire4 = 1, +}; + +static void __init eb9200_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* Ethernet */ + at91_add_device_eth(&eb9200_eth_data); + /* USB Host */ + at91_add_device_usbh(&eb9200_usbh_data); + /* USB Device */ + at91_add_device_udc(&eb9200_udc_data); + /* I2C */ + at91_add_device_i2c(); + /* Compact Flash */ + at91_add_device_cf(&eb9200_cf_data); + /* SPI */ + at91_add_device_spi(NULL, 0); + /* MMC */ + /* only supports 1 or 4 bit interface, not wired through to SPI */ + at91_add_device_mmc(&eb9200_mmc_data); +} + +MACHINE_START(ATEB9200, "Embest ATEB9200") + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91rm9200_timer, + .map_io = eb9200_map_io, + .init_irq = eb9200_init_irq, + .init_machine = eb9200_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91rm9200/board-ek.c b/arch/arm/mach-at91rm9200/board-ek.c index 80d90f5135a..868192351dd 100644 --- a/arch/arm/mach-at91rm9200/board-ek.c +++ b/arch/arm/mach-at91rm9200/board-ek.c @@ -21,12 +21,12 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/types.h> #include <linux/init.h> #include <linux/mm.h> #include <linux/module.h> #include <linux/platform_device.h> +#include <linux/spi/spi.h> #include <asm/hardware.h> #include <asm/setup.h> @@ -37,9 +37,9 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <asm/arch/hardware.h> -#include <asm/mach/serial_at91rm9200.h> +#include <asm/hardware.h> #include <asm/arch/board.h> +#include <asm/arch/gpio.h> #include "generic.h" @@ -57,14 +57,14 @@ static void __init ek_init_irq(void) * 0 .. 3 = USART0 .. USART3 * 4 = DBGU */ -#define EK_UART_MAP { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ -#define EK_SERIAL_CONSOLE 0 /* ttyS0 */ +static struct at91_uart_config __initdata ek_uart_config = { + .console_tty = 0, /* ttyS0 */ + .nr_tty = 2, + .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ +}; static void __init ek_map_io(void) { - int serial[AT91_NR_UART] = EK_UART_MAP; - int i; - at91rm9200_map_io(); /* Initialize clocks: 18.432 MHz crystal */ @@ -73,16 +73,8 @@ static void __init ek_map_io(void) /* Setup the LEDs */ at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2); -#ifdef CONFIG_SERIAL_AT91 - at91_console_port = EK_SERIAL_CONSOLE; - memcpy(at91_serial_map, serial, sizeof(serial)); - - /* Register UARTs */ - for (i = 0; i < AT91_NR_UART; i++) { - if (serial[i] >= 0) - at91_register_uart(i, serial[i]); - } -#endif + /* Setup the serial ports and console */ + at91_init_serial(&ek_uart_config); } static struct at91_eth_data __initdata ek_eth_data = { @@ -106,14 +98,36 @@ static struct at91_mmc_data __initdata ek_mmc_data = { .wp_pin = AT91_PIN_PA17, }; +static struct spi_board_info ek_spi_devices[] = { + { /* DataFlash chip */ + .modalias = "mtd_dataflash", + .chip_select = 0, + .max_speed_hz = 15 * 1000 * 1000, + }, +#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD + { /* DataFlash card */ + .modalias = "mtd_dataflash", + .chip_select = 3, + .max_speed_hz = 15 * 1000 * 1000, + }, +#endif +}; + static void __init ek_board_init(void) { + /* Serial */ + at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&ek_eth_data); /* USB Host */ at91_add_device_usbh(&ek_usbh_data); /* USB Device */ at91_add_device_udc(&ek_udc_data); + at91_set_multi_drive(ek_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */ + /* I2C */ + at91_add_device_i2c(); + /* SPI */ + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD /* DataFlash card */ at91_set_gpio_output(AT91_PIN_PB22, 0); diff --git a/arch/arm/mach-at91rm9200/board-kafa.c b/arch/arm/mach-at91rm9200/board-kafa.c new file mode 100644 index 00000000000..bf760c5e0c4 --- /dev/null +++ b/arch/arm/mach-at91rm9200/board-kafa.c @@ -0,0 +1,116 @@ +/* + * linux/arch/arm/mach-at91rm9200/board-kafa.c + * + * Copyright (C) 2006 Sperry-Sun + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/config.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/module.h> +#include <linux/platform_device.h> + +#include <asm/hardware.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/irq.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/hardware.h> +#include <asm/arch/board.h> +#include <asm/arch/gpio.h> + +#include "generic.h" + +static void __init kafa_init_irq(void) +{ + /* Initialize AIC controller */ + at91rm9200_init_irq(NULL); + + /* Set up the GPIO interrupts */ + at91_gpio_irq_setup(PQFP_GPIO_BANKS); +} + +/* + * Serial port configuration. + * 0 .. 3 = USART0 .. USART3 + * 4 = DBGU + */ +static struct at91_uart_config __initdata kafa_uart_config = { + .console_tty = 0, /* ttyS0 */ + .nr_tty = 2, + .tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ +}; + +static void __init kafa_map_io(void) +{ + at91rm9200_map_io(); + + /* Initialize clocks: 18.432 MHz crystal */ + at91_clock_init(18432000); + + /* Set up the LEDs */ + at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); + + /* Setup the serial ports and console */ + at91_init_serial(&kafa_uart_config); +} + +static struct at91_eth_data __initdata kafa_eth_data = { + .phy_irq_pin = AT91_PIN_PC4, + .is_rmii = 0, +}; + +static struct at91_usbh_data __initdata kafa_usbh_data = { + .ports = 1, +}; + +static struct at91_udc_data __initdata kafa_udc_data = { + .vbus_pin = AT91_PIN_PB6, + .pullup_pin = AT91_PIN_PB7, +}; + +static void __init kafa_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* Ethernet */ + at91_add_device_eth(&kafa_eth_data); + /* USB Host */ + at91_add_device_usbh(&kafa_usbh_data); + /* USB Device */ + at91_add_device_udc(&kafa_udc_data); + /* I2C */ + at91_add_device_i2c(); + /* SPI */ + at91_add_device_spi(NULL, 0); +} + +MACHINE_START(KAFA, "Sperry-Sun KAFA") + /* Maintainer: Sergei Sharonov */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91rm9200_timer, + .map_io = kafa_map_io, + .init_irq = kafa_init_irq, + .init_machine = kafa_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91rm9200/board-kb9202.c b/arch/arm/mach-at91rm9200/board-kb9202.c new file mode 100644 index 00000000000..f06d2b54cc9 --- /dev/null +++ b/arch/arm/mach-at91rm9200/board-kb9202.c @@ -0,0 +1,125 @@ +/* + * linux/arch/arm/mach-at91rm9200/board-kb9202.c + * + * Copyright (c) 2005 kb_admin + * KwikByte, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/config.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/module.h> +#include <linux/platform_device.h> + +#include <asm/hardware.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/irq.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/hardware.h> +#include <asm/arch/board.h> +#include <asm/arch/gpio.h> + +#include "generic.h" + +static void __init kb9202_init_irq(void) +{ + /* Initialize AIC controller */ + at91rm9200_init_irq(NULL); + + /* Set up the GPIO interrupts */ + at91_gpio_irq_setup(PQFP_GPIO_BANKS); +} + +/* + * Serial port configuration. + * 0 .. 3 = USART0 .. USART3 + * 4 = DBGU + */ +static struct at91_uart_config __initdata kb9202_uart_config = { + .console_tty = 0, /* ttyS0 */ + .nr_tty = 3, + .tty_map = { 4, 0, 1, -1, -1 } /* ttyS0, ..., ttyS4 */ +}; + +static void __init kb9202_map_io(void) +{ + at91rm9200_map_io(); + + /* Initialize clocks: 10 MHz crystal */ + at91_clock_init(10000000); + + /* Set up the LEDs */ + at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18); + + /* Setup the serial ports and console */ + at91_init_serial(&kb9202_uart_config); +} + +static struct at91_eth_data __initdata kb9202_eth_data = { + .phy_irq_pin = AT91_PIN_PB29, + .is_rmii = 0, +}; + +static struct at91_usbh_data __initdata kb9202_usbh_data = { + .ports = 1, +}; + +static struct at91_udc_data __initdata kb9202_udc_data = { + .vbus_pin = AT91_PIN_PB24, + .pullup_pin = AT91_PIN_PB22, +}; + +static struct at91_mmc_data __initdata kb9202_mmc_data = { + .det_pin = AT91_PIN_PB2, + .is_b = 0, + .wire4 = 1, +}; + +static void __init kb9202_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* Ethernet */ + at91_add_device_eth(&kb9202_eth_data); + /* USB Host */ + at91_add_device_usbh(&kb9202_usbh_data); + /* USB Device */ + at91_add_device_udc(&kb9202_udc_data); + /* MMC */ + at91_add_device_mmc(&kb9202_mmc_data); + /* I2C */ + at91_add_device_i2c(); + /* SPI */ + at91_add_device_spi(NULL, 0); +} + +MACHINE_START(KB9200, "KB920x") + /* Maintainer: KwikByte, Inc. */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91rm9200_timer, + .map_io = kb9202_map_io, + .init_irq = kb9202_init_irq, + .init_machine = kb9202_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c index 8b95467c6d6..edc2cc837ae 100644 --- a/arch/arm/mach-at91rm9200/clock.c +++ b/arch/arm/mach-at91rm9200/clock.c @@ -27,12 +27,10 @@ #include <asm/io.h> #include <asm/mach-types.h> -#include <asm/arch/hardware.h> -#include <asm/arch/board.h> /* for master clock global */ +#include <asm/hardware.h> #include "generic.h" -#undef DEBUG /* * There's a lot more which can be done with clocks, including cpufreq @@ -41,7 +39,9 @@ */ struct clk { - const char *name; + const char *name; /* unique clock name */ + const char *function; /* function of the clock */ + struct device *dev; /* device associated with function */ unsigned long rate_hz; struct clk *parent; u32 pmc_mask; @@ -71,15 +71,14 @@ static struct clk clk32k = { }; static struct clk main_clk = { .name = "main", - .pmc_mask = 1 << 0, /* in PMC_SR */ - .users = 1, + .pmc_mask = AT91_PMC_MOSCS, /* in PMC_SR */ .id = 1, .primary = 1, }; static struct clk plla = { .name = "plla", .parent = &main_clk, - .pmc_mask = 1 << 1, /* in PMC_SR */ + .pmc_mask = AT91_PMC_LOCKA, /* in PMC_SR */ .id = 2, .primary = 1, .pll = 1, @@ -105,7 +104,7 @@ static void pllb_mode(struct clk *clk, int is_on) static struct clk pllb = { .name = "pllb", .parent = &main_clk, - .pmc_mask = 1 << 2, /* in PMC_SR */ + .pmc_mask = AT91_PMC_LOCKB, /* in PMC_SR */ .mode = pllb_mode, .id = 3, .primary = 1, @@ -177,8 +176,7 @@ static struct clk pck3 = { */ static struct clk mck = { .name = "mck", - .pmc_mask = 1 << 3, /* in PMC_SR */ - .users = 1, /* (must be) always on */ + .pmc_mask = AT91_PMC_MCKRDY, /* in PMC_SR */ }; static void pmc_periph_mode(struct clk *clk, int is_on) @@ -249,6 +247,30 @@ static struct clk spi_clk = { .pmc_mask = 1 << AT91_ID_SPI, .mode = pmc_periph_mode, }; +static struct clk pioA_clk = { + .name = "pioA_clk", + .parent = &mck, + .pmc_mask = 1 << AT91_ID_PIOA, + .mode = pmc_periph_mode, +}; +static struct clk pioB_clk = { + .name = "pioB_clk", + .parent = &mck, + .pmc_mask = 1 << AT91_ID_PIOB, + .mode = pmc_periph_mode, +}; +static struct clk pioC_clk = { + .name = "pioC_clk", + .parent = &mck, + .pmc_mask = 1 << AT91_ID_PIOC, + .mode = pmc_periph_mode, +}; +static struct clk pioD_clk = { + .name = "pioD_clk", + .parent = &mck, + .pmc_mask = 1 << AT91_ID_PIOD, + .mode = pmc_periph_mode, +}; static struct clk *const clock_list[] = { /* four primary clocks -- MUST BE FIRST! */ @@ -279,21 +301,46 @@ static struct clk *const clock_list[] = { &udc_clk, &twi_clk, &spi_clk, + &pioA_clk, + &pioB_clk, + &pioC_clk, + &pioD_clk, // ssc0..ssc2 // tc0..tc5 + // irq0..irq6 &ohci_clk, ðer_clk, }; +/* + * Associate a particular clock with a function (eg, "uart") and device. + * The drivers can then request the same 'function' with several different + * devices and not care about which clock name to use. + */ +void __init at91_clock_associate(const char *id, struct device *dev, const char *func) +{ + struct clk *clk = clk_get(NULL, id); + + if (!dev || !clk || !IS_ERR(clk_get(dev, func))) + return; + + clk->function = func; + clk->dev = dev; +} + /* clocks are all static for now; no refcounting necessary */ struct clk *clk_get(struct device *dev, const char *id) { int i; for (i = 0; i < ARRAY_SIZE(clock_list); i++) { - if (strcmp(id, clock_list[i]->name) == 0) - return clock_list[i]; + struct clk *clk = clock_list[i]; + + if (strcmp(id, clk->name) == 0) + return clk; + if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0) + return clk; } return ERR_PTR(-ENOENT); @@ -593,6 +640,30 @@ fail: return 0; } + +/* + * Several unused clocks may be active. Turn them off. + */ +static void at91_periphclk_reset(void) +{ + unsigned long reg; + int i; + + reg = at91_sys_read(AT91_PMC_PCSR); + + for (i = 0; i < ARRAY_SIZE(clock_list); i++) { + struct clk *clk = clock_list[i]; + + if (clk->mode != pmc_periph_mode) + continue; + + if (clk->users > 0) + reg &= ~clk->pmc_mask; + } + + at91_sys_write(AT91_PMC_PCDR, reg); +} + int __init at91_clock_init(unsigned long main_clock) { unsigned tmp, freq, mckr; @@ -626,7 +697,6 @@ int __init at91_clock_init(unsigned long main_clock) */ at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M; pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init); - at91_sys_write(AT91_PMC_PCDR, (1 << AT91_ID_UHP) | (1 << AT91_ID_UDP)); at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP); at91_sys_write(AT91_CKGR_PLLBR, 0); at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP); @@ -640,19 +710,18 @@ int __init at91_clock_init(unsigned long main_clock) */ mckr = at91_sys_read(AT91_PMC_MCKR); mck.parent = clock_list[mckr & AT91_PMC_CSS]; - mck.parent->users++; freq = mck.parent->rate_hz; freq /= (1 << ((mckr >> 2) & 3)); /* prescale */ mck.rate_hz = freq / (1 + ((mckr >> 8) & 3)); /* mdiv */ + /* MCK and CPU clock are "always on" */ + clk_enable(&mck); + printk("Clocks: CPU %u MHz, master %u MHz, main %u.%03u MHz\n", freq / 1000000, (unsigned) mck.rate_hz / 1000000, (unsigned) main_clock / 1000000, ((unsigned) main_clock % 1000000) / 1000); - /* FIXME get rid of master_clock global */ - at91_master_clock = mck.rate_hz; - #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS /* establish PCK0..PCK3 parentage */ for (tmp = 0; tmp < ARRAY_SIZE(clock_list); tmp++) { @@ -663,19 +732,28 @@ int __init at91_clock_init(unsigned long main_clock) continue; pckr = at91_sys_read(AT91_PMC_PCKR(clk->id)); - parent = clock_list[pckr & 3]; + parent = clock_list[pckr & AT91_PMC_CSS]; clk->parent = parent; clk->rate_hz = parent->rate_hz / (1 << ((pckr >> 2) & 3)); + + if (clk->users == 0) { + /* not being used, so switch it off */ + at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask); + } } #else - /* disable unused clocks */ + /* disable all programmable clocks */ at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK0 | AT91_PMC_PCK1 | AT91_PMC_PCK2 | AT91_PMC_PCK3); -#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */ +#endif - /* FIXME several unused clocks may still be active... provide - * a CONFIG option to turn off all unused clocks at some point - * before driver init starts. - */ + /* enable the PIO clocks */ + clk_enable(&pioA_clk); + clk_enable(&pioB_clk); + clk_enable(&pioC_clk); + clk_enable(&pioD_clk); + + /* disable all other unused peripheral clocks */ + at91_periphclk_reset(); return 0; } diff --git a/arch/arm/mach-at91rm9200/devices.c b/arch/arm/mach-at91rm9200/devices.c index bfe47bd6e50..4352acb8817 100644 --- a/arch/arm/mach-at91rm9200/devices.c +++ b/arch/arm/mach-at91rm9200/devices.c @@ -13,12 +13,17 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <linux/config.h> #include <linux/platform_device.h> +#include <asm/hardware.h> #include <asm/arch/board.h> -#include <asm/arch/pio.h> +#include <asm/arch/gpio.h> +#include "generic.h" + +#define SZ_512 0x00000200 +#define SZ_256 0x00000100 +#define SZ_16 0x00000010 /* -------------------------------------------------------------------- * USB Host @@ -28,7 +33,7 @@ static u64 ohci_dmamask = 0xffffffffUL; static struct at91_usbh_data usbh_data; -static struct resource at91_usbh_resource[] = { +static struct resource at91_usbh_resources[] = { [0] = { .start = AT91_UHP_BASE, .end = AT91_UHP_BASE + SZ_1M - 1, @@ -42,15 +47,15 @@ static struct resource at91_usbh_resource[] = { }; static struct platform_device at91rm9200_usbh_device = { - .name = "at91rm9200-ohci", + .name = "at91_ohci", .id = -1, .dev = { .dma_mask = &ohci_dmamask, .coherent_dma_mask = 0xffffffff, .platform_data = &usbh_data, }, - .resource = at91_usbh_resource, - .num_resources = ARRAY_SIZE(at91_usbh_resource), + .resource = at91_usbh_resources, + .num_resources = ARRAY_SIZE(at91_usbh_resources), }; void __init at91_add_device_usbh(struct at91_usbh_data *data) @@ -74,11 +79,16 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {} static struct at91_udc_data udc_data; static struct resource at91_udc_resources[] = { - { + [0] = { .start = AT91_BASE_UDP, .end = AT91_BASE_UDP + SZ_16K - 1, .flags = IORESOURCE_MEM, - } + }, + [1] = { + .start = AT91_ID_UDP, + .end = AT91_ID_UDP, + .flags = IORESOURCE_IRQ, + }, }; static struct platform_device at91rm9200_udc_device = { @@ -100,10 +110,8 @@ void __init at91_add_device_udc(struct at91_udc_data *data) at91_set_gpio_input(data->vbus_pin, 0); at91_set_deglitch(data->vbus_pin, 1); } - if (data->pullup_pin) { + if (data->pullup_pin) at91_set_gpio_output(data->pullup_pin, 0); - at91_set_multi_drive(data->pullup_pin, 1); - } udc_data = *data; platform_device_register(&at91rm9200_udc_device); @@ -197,7 +205,7 @@ static struct at91_cf_data cf_data; static struct resource at91_cf_resources[] = { [0] = { .start = AT91_CF_BASE, - /* ties up CS4, CS5, and CS6 */ + /* ties up CS4, CS5 and CS6 */ .end = AT91_CF_BASE + (0x30000000 - 1), .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, }, @@ -231,6 +239,12 @@ void __init at91_add_device_cf(struct at91_cf_data *data) at91_set_gpio_output(data->vcc_pin, 0); at91_set_gpio_output(data->rst_pin, 0); + /* force poweron defaults for these pins ... */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */ + at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */ + at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */ + at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */ + cf_data = *data; platform_device_register(&at91rm9200_cf_device); } @@ -319,6 +333,7 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data) void __init at91_add_device_mmc(struct at91_mmc_data *data) {} #endif + /* -------------------------------------------------------------------- * NAND / SmartMedia * -------------------------------------------------------------------- */ @@ -400,22 +415,110 @@ void __init at91_add_device_i2c(void) {} /* -------------------------------------------------------------------- + * SPI + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) +static u64 spi_dmamask = 0xffffffffUL; + +static struct resource at91_spi_resources[] = { + [0] = { + .start = AT91_BASE_SPI, + .end = AT91_BASE_SPI + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91_ID_SPI, + .end = AT91_ID_SPI, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91rm9200_spi_device = { + .name = "at91_spi", + .id = 0, + .dev = { + .dma_mask = &spi_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = at91_spi_resources, + .num_resources = ARRAY_SIZE(at91_spi_resources), +}; + +static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; + +void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) +{ + int i; + unsigned long cs_pin; + + at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */ + at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */ + at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */ + + /* Enable SPI chip-selects */ + for (i = 0; i < nr_devices; i++) { + if (devices[i].controller_data) + cs_pin = (unsigned long) devices[i].controller_data; + else + cs_pin = at91_spi_standard_cs[devices[i].chip_select]; + +#ifdef CONFIG_SPI_AT91_MANUAL_CS + at91_set_gpio_output(cs_pin, 1); +#else + at91_set_A_periph(cs_pin, 0); +#endif + + /* pass chip-select pin to driver */ + devices[i].controller_data = (void *) cs_pin; + } + + spi_register_board_info(devices, nr_devices); + at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi"); + platform_device_register(&at91rm9200_spi_device); +} +#else +void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} +#endif + + +/* -------------------------------------------------------------------- * RTC * -------------------------------------------------------------------- */ -#if defined(CONFIG_AT91_RTC) || defined(CONFIG_AT91_RTC_MODULE) +#if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE) static struct platform_device at91rm9200_rtc_device = { .name = "at91_rtc", .id = -1, .num_resources = 0, }; -void __init at91_add_device_rtc(void) +static void __init at91_add_device_rtc(void) { platform_device_register(&at91rm9200_rtc_device); } #else -void __init at91_add_device_rtc(void) {} +static void __init at91_add_device_rtc(void) {} +#endif + + +/* -------------------------------------------------------------------- + * Watchdog + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE) +static struct platform_device at91rm9200_wdt_device = { + .name = "at91_wdt", + .id = -1, + .num_resources = 0, +}; + +static void __init at91_add_device_watchdog(void) +{ + platform_device_register(&at91rm9200_wdt_device); +} +#else +static void __init at91_add_device_watchdog(void) {} #endif @@ -429,13 +532,281 @@ u8 at91_leds_timer; void __init at91_init_leds(u8 cpu_led, u8 timer_led) { - at91_leds_cpu = cpu_led; - at91_leds_timer = timer_led; + at91_leds_cpu = cpu_led; + at91_leds_timer = timer_led; } - #else void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} #endif +/* -------------------------------------------------------------------- + * UART + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_SERIAL_AT91) +static struct resource dbgu_resources[] = { + [0] = { + .start = AT91_VA_BASE_SYS + AT91_DBGU, + .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct at91_uart_data dbgu_data = { + .use_dma_tx = 0, + .use_dma_rx = 0, /* DBGU not capable of receive DMA */ +}; + +static struct platform_device at91rm9200_dbgu_device = { + .name = "at91_usart", + .id = 0, + .dev = { + .platform_data = &dbgu_data, + .coherent_dma_mask = 0xffffffff, + }, + .resource = dbgu_resources, + .num_resources = ARRAY_SIZE(dbgu_resources), +}; + +static inline void configure_dbgu_pins(void) +{ + at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */ +} + +static struct resource uart0_resources[] = { + [0] = { + .start = AT91_BASE_US0, + .end = AT91_BASE_US0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91_ID_US0, + .end = AT91_ID_US0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct at91_uart_data uart0_data = { + .use_dma_tx = 1, + .use_dma_rx = 1, +}; + +static struct platform_device at91rm9200_uart0_device = { + .name = "at91_usart", + .id = 1, + .dev = { + .platform_data = &uart0_data, + .coherent_dma_mask = 0xffffffff, + }, + .resource = uart0_resources, + .num_resources = ARRAY_SIZE(uart0_resources), +}; + +static inline void configure_usart0_pins(void) +{ + at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */ + at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */ + + /* + * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21. + * We need to drive the pin manually. Default is off (RTS is active low). + */ + at91_set_gpio_output(AT91_PIN_PA21, 1); +} + +static struct resource uart1_resources[] = { + [0] = { + .start = AT91_BASE_US1, + .end = AT91_BASE_US1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91_ID_US1, + .end = AT91_ID_US1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct at91_uart_data uart1_data = { + .use_dma_tx = 1, + .use_dma_rx = 1, +}; + +static struct platform_device at91rm9200_uart1_device = { + .name = "at91_usart", + .id = 2, + .dev = { + .platform_data = &uart1_data, + .coherent_dma_mask = 0xffffffff, + }, + .resource = uart1_resources, + .num_resources = ARRAY_SIZE(uart1_resources), +}; + +static inline void configure_usart1_pins(void) +{ + at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */ + at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */ + at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */ + at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */ + at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */ + at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */ + at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */ +} + +static struct resource uart2_resources[] = { + [0] = { + .start = AT91_BASE_US2, + .end = AT91_BASE_US2 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91_ID_US2, + .end = AT91_ID_US2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct at91_uart_data uart2_data = { + .use_dma_tx = 1, + .use_dma_rx = 1, +}; + +static struct platform_device at91rm9200_uart2_device = { + .name = "at91_usart", + .id = 3, + .dev = { + .platform_data = &uart2_data, + .coherent_dma_mask = 0xffffffff, + }, + .resource = uart2_resources, + .num_resources = ARRAY_SIZE(uart2_resources), +}; + +static inline void configure_usart2_pins(void) +{ + at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */ + at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */ +} + +static struct resource uart3_resources[] = { + [0] = { + .start = AT91_BASE_US3, + .end = AT91_BASE_US3 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91_ID_US3, + .end = AT91_ID_US3, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct at91_uart_data uart3_data = { + .use_dma_tx = 1, + .use_dma_rx = 1, +}; + +static struct platform_device at91rm9200_uart3_device = { + .name = "at91_usart", + .id = 4, + .dev = { + .platform_data = &uart3_data, + .coherent_dma_mask = 0xffffffff, + }, + .resource = uart3_resources, + .num_resources = ARRAY_SIZE(uart3_resources), +}; + +static inline void configure_usart3_pins(void) +{ + at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */ + at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */ +} + +struct platform_device *at91_uarts[AT91_NR_UART]; /* the UARTs to use */ +struct platform_device *at91_default_console_device; /* the serial console device */ + +void __init at91_init_serial(struct at91_uart_config *config) +{ + int i; + + /* Fill in list of supported UARTs */ + for (i = 0; i < config->nr_tty; i++) { + switch (config->tty_map[i]) { + case 0: + configure_usart0_pins(); + at91_uarts[i] = &at91rm9200_uart0_device; + at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart"); + break; + case 1: + configure_usart1_pins(); + at91_uarts[i] = &at91rm9200_uart1_device; + at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart"); + break; + case 2: + configure_usart2_pins(); + at91_uarts[i] = &at91rm9200_uart2_device; + at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart"); + break; + case 3: + configure_usart3_pins(); + at91_uarts[i] = &at91rm9200_uart3_device; + at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart"); + break; + case 4: + configure_dbgu_pins(); + at91_uarts[i] = &at91rm9200_dbgu_device; + at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart"); + break; + default: + continue; + } + at91_uarts[i]->id = i; /* update ID number to mapped ID */ + } + + /* Set serial console device */ + if (config->console_tty < AT91_NR_UART) + at91_default_console_device = at91_uarts[config->console_tty]; + if (!at91_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); +} + +void __init at91_add_device_serial(void) +{ + int i; + + for (i = 0; i < AT91_NR_UART; i++) { + if (at91_uarts[i]) + platform_device_register(at91_uarts[i]); + } +} +#else +void __init at91_init_serial(struct at91_uart_config *config) {} +void __init at91_add_device_serial(void) {} +#endif + + /* -------------------------------------------------------------------- */ + +/* + * These devices are always present and don't need any board-specific + * setup. + */ +static int __init at91_add_standard_devices(void) +{ + at91_add_device_rtc(); + at91_add_device_watchdog(); + return 0; +} + +arch_initcall(at91_add_standard_devices); diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91rm9200/generic.h index 9bd541eba0a..f0d969d7d87 100644 --- a/arch/arm/mach-at91rm9200/generic.h +++ b/arch/arm/mach-at91rm9200/generic.h @@ -16,3 +16,10 @@ extern struct sys_timer at91rm9200_timer; extern void __init at91rm9200_map_io(void); extern int __init at91_clock_init(unsigned long main_clock); +struct device; +extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func); + + /* Power Management */ +extern void at91_irq_suspend(void); +extern void at91_irq_resume(void); + diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c index 5ab46274e1a..5783c282ae7 100644 --- a/arch/arm/mach-at91rm9200/gpio.c +++ b/arch/arm/mach-at91rm9200/gpio.c @@ -10,13 +10,14 @@ */ #include <linux/errno.h> +#include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/kernel.h> #include <linux/list.h> #include <linux/module.h> #include <asm/io.h> -#include <asm/mach/irq.h> -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #include <asm/arch/gpio.h> static const u32 pio_controller_offset[4] = { @@ -213,6 +214,84 @@ EXPORT_SYMBOL(at91_get_gpio_value); /*--------------------------------------------------------------------------*/ +#ifdef CONFIG_PM + +static u32 wakeups[BGA_GPIO_BANKS]; +static u32 backups[BGA_GPIO_BANKS]; + +static int gpio_irq_set_wake(unsigned pin, unsigned state) +{ + unsigned mask = pin_to_mask(pin); + + pin -= PIN_BASE; + pin /= 32; + + if (unlikely(pin >= BGA_GPIO_BANKS)) + return -EINVAL; + + if (state) + wakeups[pin] |= mask; + else + wakeups[pin] &= ~mask; + + return 0; +} + +void at91_gpio_suspend(void) +{ + int i; + + for (i = 0; i < BGA_GPIO_BANKS; i++) { + u32 pio = pio_controller_offset[i]; + + /* + * Note: drivers should have disabled GPIO interrupts that + * aren't supposed to be wakeup sources. + * But that is not much good on ARM..... disable_irq() does + * not update the hardware immediately, so the hardware mask + * (IMR) has the wrong value (not current, too much is + * permitted). + * + * Our workaround is to disable all non-wakeup IRQs ... + * which is exactly what correct drivers asked for in the + * first place! + */ + backups[i] = at91_sys_read(pio + PIO_IMR); + at91_sys_write(pio_controller_offset[i] + PIO_IDR, backups[i]); + at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]); + + if (!wakeups[i]) { + disable_irq_wake(AT91_ID_PIOA + i); + at91_sys_write(AT91_PMC_PCDR, 1 << (AT91_ID_PIOA + i)); + } else { + enable_irq_wake(AT91_ID_PIOA + i); +#ifdef CONFIG_PM_DEBUG + printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]); +#endif + } + } +} + +void at91_gpio_resume(void) +{ + int i; + + for (i = 0; i < BGA_GPIO_BANKS; i++) { + at91_sys_write(pio_controller_offset[i] + PIO_IDR, wakeups[i]); + at91_sys_write(pio_controller_offset[i] + PIO_IER, backups[i]); + } + + at91_sys_write(AT91_PMC_PCER, + (1 << AT91_ID_PIOA) + | (1 << AT91_ID_PIOB) + | (1 << AT91_ID_PIOC) + | (1 << AT91_ID_PIOD)); +} + +#else +#define gpio_irq_set_wake NULL +#endif + /* Several AIC controller irqs are dispatched through this GPIO handler. * To use any AT91_PIN_* as an externally triggered IRQ, first call @@ -252,6 +331,7 @@ static struct irqchip gpio_irqchip = { .mask = gpio_irq_mask, .unmask = gpio_irq_unmask, .set_type = gpio_irq_type, + .set_wake = gpio_irq_set_wake, }; static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs *regs) @@ -261,21 +341,22 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs void __iomem *pio; u32 isr; - pio = desc->base; + pio = get_irq_chip_data(irq); /* temporarily mask (level sensitive) parent IRQ */ desc->chip->ack(irq); for (;;) { + /* reading ISR acks the pending (edge triggered) GPIO interrupt */ isr = __raw_readl(pio + PIO_ISR) & __raw_readl(pio + PIO_IMR); if (!isr) break; - pin = (unsigned) desc->data; + pin = (unsigned) get_irq_data(irq); gpio = &irq_desc[pin]; while (isr) { if (isr & 1) { - if (unlikely(gpio->disable_depth)) { + if (unlikely(gpio->depth)) { /* * The core ARM interrupt handler lazily disables IRQs so * another IRQ must be generated before it actually gets @@ -284,7 +365,7 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs gpio_irq_mask(pin); } else - gpio->handle(pin, gpio, regs); + desc_handle_irq(pin, gpio, regs); } pin++; gpio++; @@ -315,15 +396,16 @@ void __init at91_gpio_irq_setup(unsigned banks) set_irq_chipdata(id, controller); for (i = 0; i < 32; i++, pin++) { + /* + * Can use the "simple" and not "edge" handler since it's + * shorter, and the AIC handles interupts sanely. + */ set_irq_chip(pin, &gpio_irqchip); set_irq_handler(pin, do_simple_IRQ); set_irq_flags(pin, IRQF_VALID); } set_irq_chained_handler(id, gpio_irq_handler); - - /* enable the PIO peripheral clock */ - at91_sys_write(AT91_PMC_PCER, 1 << id); } pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, banks); } diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c index cb62bc83a1d..dcd560dbcfb 100644 --- a/arch/arm/mach-at91rm9200/irq.c +++ b/arch/arm/mach-at91rm9200/irq.c @@ -20,7 +20,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/init.h> #include <linux/module.h> #include <linux/mm.h> @@ -92,10 +91,6 @@ static int at91rm9200_irq_type(unsigned irq, unsigned type) { unsigned int smr, srctype; - /* change triggering only for FIQ and external IRQ0..IRQ6 */ - if ((irq < AT91_ID_IRQ0) && (irq != AT91_ID_FIQ)) - return -EINVAL; - switch (type) { case IRQT_HIGH: srctype = AT91_AIC_SRCTYPE_HIGH; @@ -104,9 +99,13 @@ static int at91rm9200_irq_type(unsigned irq, unsigned type) srctype = AT91_AIC_SRCTYPE_RISING; break; case IRQT_LOW: + if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0)) /* only supported on external interrupts */ + return -EINVAL; srctype = AT91_AIC_SRCTYPE_LOW; break; case IRQT_FALLING: + if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0)) /* only supported on external interrupts */ + return -EINVAL; srctype = AT91_AIC_SRCTYPE_FALLING; break; default: @@ -118,11 +117,47 @@ static int at91rm9200_irq_type(unsigned irq, unsigned type) return 0; } +#ifdef CONFIG_PM + +static u32 wakeups; +static u32 backups; + +static int at91rm9200_irq_set_wake(unsigned irq, unsigned value) +{ + if (unlikely(irq >= 32)) + return -EINVAL; + + if (value) + wakeups |= (1 << irq); + else + wakeups &= ~(1 << irq); + + return 0; +} + +void at91_irq_suspend(void) +{ + backups = at91_sys_read(AT91_AIC_IMR); + at91_sys_write(AT91_AIC_IDCR, backups); + at91_sys_write(AT91_AIC_IECR, wakeups); +} + +void at91_irq_resume(void) +{ + at91_sys_write(AT91_AIC_IDCR, wakeups); + at91_sys_write(AT91_AIC_IECR, backups); +} + +#else +#define at91rm9200_irq_set_wake NULL +#endif + static struct irqchip at91rm9200_irq_chip = { .ack = at91rm9200_mask_irq, .mask = at91rm9200_mask_irq, .unmask = at91rm9200_unmask_irq, .set_type = at91rm9200_irq_type, + .set_wake = at91rm9200_irq_set_wake, }; /* diff --git a/arch/arm/mach-at91rm9200/leds.c b/arch/arm/mach-at91rm9200/leds.c index 28150e8905b..1a333730466 100644 --- a/arch/arm/mach-at91rm9200/leds.c +++ b/arch/arm/mach-at91rm9200/leds.c @@ -9,7 +9,6 @@ * 2 of the License, or (at your option) any later version. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/init.h> diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c new file mode 100644 index 00000000000..47e5480feb7 --- /dev/null +++ b/arch/arm/mach-at91rm9200/pm.c @@ -0,0 +1,225 @@ +/* + * arch/arm/mach-at91rm9200/pm.c + * AT91 Power Management + * + * Copyright (C) 2005 David Brownell + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/pm.h> +#include <linux/sched.h> +#include <linux/proc_fs.h> +#include <linux/pm.h> +#include <linux/interrupt.h> +#include <linux/sysfs.h> +#include <linux/module.h> +#include <linux/platform_device.h> + +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/atomic.h> +#include <asm/mach/time.h> +#include <asm/mach/irq.h> +#include <asm/mach-types.h> + +#include <asm/arch/gpio.h> + +#include "generic.h" + + +static int at91_pm_valid_state(suspend_state_t state) +{ + switch (state) { + case PM_SUSPEND_ON: + case PM_SUSPEND_STANDBY: + case PM_SUSPEND_MEM: + return 1; + + default: + return 0; + } +} + + +static suspend_state_t target_state; + +/* + * Called after processes are frozen, but before we shutdown devices. + */ +static int at91_pm_prepare(suspend_state_t state) +{ + target_state = state; + return 0; +} + +/* + * Verify that all the clocks are correct before entering + * slow-clock mode. + */ +static int at91_pm_verify_clocks(void) +{ + unsigned long scsr; + int i; + + scsr = at91_sys_read(AT91_PMC_SCSR); + + /* USB must not be using PLLB */ + if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) { + pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); + return 0; + } + +#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS + /* PCK0..PCK3 must be disabled, or configured to use clk32k */ + for (i = 0; i < 4; i++) { + u32 css; + + if ((scsr & (AT91_PMC_PCK0 << i)) == 0) + continue; + + css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; + if (css != AT91_PMC_CSS_SLOW) { + pr_debug("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); + return 0; + } + } +#endif + + return 1; +} + +/* + * Call this from platform driver suspend() to see how deeply to suspend. + * For example, some controllers (like OHCI) need one of the PLL clocks + * in order to act as a wakeup source, and those are not available when + * going into slow clock mode. + * + * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have + * the very same problem (but not using at91 main_clk), and it'd be better + * to add one generic API rather than lots of platform-specific ones. + */ +int at91_suspend_entering_slow_clock(void) +{ + return (target_state == PM_SUSPEND_MEM); +} +EXPORT_SYMBOL(at91_suspend_entering_slow_clock); + + +static void (*slow_clock)(void); + + + +static int at91_pm_enter(suspend_state_t state) +{ + at91_gpio_suspend(); + at91_irq_suspend(); + + pr_debug("AT91: PM - wake mask %08x, pm state %d\n", + /* remember all the always-wake irqs */ + (at91_sys_read(AT91_PMC_PCSR) + | (1 << AT91_ID_FIQ) + | (1 << AT91_ID_SYS) + | (1 << AT91_ID_IRQ0) + | (1 << AT91_ID_IRQ1) + | (1 << AT91_ID_IRQ2) + | (1 << AT91_ID_IRQ3) + | (1 << AT91_ID_IRQ4) + | (1 << AT91_ID_IRQ5) + | (1 << AT91_ID_IRQ6)) + & at91_sys_read(AT91_AIC_IMR), + state); + + switch (state) { + /* + * Suspend-to-RAM is like STANDBY plus slow clock mode, so + * drivers must suspend more deeply: only the master clock + * controller may be using the main oscillator. + */ + case PM_SUSPEND_MEM: + /* + * Ensure that clocks are in a valid state. + */ + if (!at91_pm_verify_clocks()) + goto error; + + /* + * Enter slow clock mode by switching over to clk32k and + * turning off the main oscillator; reverse on wakeup. + */ + if (slow_clock) { + slow_clock(); + break; + } else { + /* DEVELOPMENT ONLY */ + pr_info("AT91: PM - no slow clock mode yet ...\n"); + /* FALLTHROUGH leaving master clock alone */ + } + + /* + * STANDBY mode has *all* drivers suspended; ignores irqs not + * marked as 'wakeup' event sources; and reduces DRAM power. + * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and + * nothing fancy done with main or cpu clocks. + */ + case PM_SUSPEND_STANDBY: + /* + * NOTE: the Wait-for-Interrupt instruction needs to be + * in icache so the SDRAM stays in self-refresh mode until + * the wakeup IRQ occurs. + */ + asm("b 1f; .align 5; 1:"); + asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ + at91_sys_write(AT91_SDRAMC_SRR, 1); /* self-refresh mode */ + /* fall though to next state */ + + case PM_SUSPEND_ON: + asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ + break; + + default: + pr_debug("AT91: PM - bogus suspend state %d\n", state); + goto error; + } + + pr_debug("AT91: PM - wakeup %08x\n", + at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); + +error: + target_state = PM_SUSPEND_ON; + at91_irq_resume(); + at91_gpio_resume(); + return 0; +} + + +static struct pm_ops at91_pm_ops ={ + .pm_disk_mode = 0, + .valid = at91_pm_valid_state, + .prepare = at91_pm_prepare, + .enter = at91_pm_enter, +}; + +static int __init at91_pm_init(void) +{ + printk("AT91: Power Management\n"); + +#ifdef CONFIG_AT91_PM_SLOW_CLOCK + /* REVISIT allocations of SRAM should be dynamically managed. + * FIQ handlers and other components will want SRAM/TCM too... + */ + slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K)); + memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz); +#endif + + /* Disable SDRAM low-power mode. Cannot be used with self-refresh. */ + at91_sys_write(AT91_SDRAMC_LPR, 0); + + pm_set_ops(&at91_pm_ops); + + return 0; +} +arch_initcall(at91_pm_init); diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c index ff26a85aa4b..3792ab4f099 100644 --- a/arch/arm/mach-clps711x/fortunet.c +++ b/arch/arm/mach-clps711x/fortunet.c @@ -19,7 +19,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/types.h> #include <linux/init.h> #include <linux/initrd.h> diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c index 9ba45f4d5a7..c8ecd2480c2 100644 --- a/arch/arm/mach-clps711x/p720t.c +++ b/arch/arm/mach-clps711x/p720t.c @@ -17,7 +17,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/types.h> diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c index 1a23f0dcd4b..a071eac4a30 100644 --- a/arch/arm/mach-clps711x/time.c +++ b/arch/arm/mach-clps711x/time.c @@ -19,6 +19,7 @@ #include <linux/timex.h> #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/sched.h> #include <asm/hardware.h> @@ -57,7 +58,7 @@ p720t_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction clps711x_timer_irq = { .name = "CLPS711x Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = p720t_timer_interrupt, }; diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c index 5b12cab0e69..92eaebdd560 100644 --- a/arch/arm/mach-clps7500/core.c +++ b/arch/arm/mach-clps7500/core.c @@ -9,6 +9,7 @@ #include <linux/kernel.h> #include <linux/types.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/list.h> #include <linux/sched.h> #include <linux/init.h> @@ -315,7 +316,7 @@ clps7500_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction clps7500_timer_irq = { .name = "CLPS7500 Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = clps7500_timer_interrupt, }; diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 6d620d8268c..70dd12ef3c4 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -199,7 +199,7 @@ ebsa110_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction ebsa110_timer_irq = { .name = "EBSA110 Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = ebsa110_timer_interrupt, }; diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig index cec5a21ca4e..f1b740083ae 100644 --- a/arch/arm/mach-ep93xx/Kconfig +++ b/arch/arm/mach-ep93xx/Kconfig @@ -2,8 +2,31 @@ if ARCH_EP93XX menu "Cirrus EP93xx Implementation Options" +config CRUNCH + bool "Support for MaverickCrunch" + help + Enable kernel support for MaverickCrunch. + comment "EP93xx Platforms" +config MACH_EDB9302 + bool "Support Cirrus Logic EDB9302" + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9302 Evaluation Board. + +config MACH_EDB9315 + bool "Support Cirrus Logic EDB9315" + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9315 Evaluation Board. + +config MACH_EDB9315A + bool "Support Cirrus Logic EDB9315A" + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9315A Evaluation Board. + config MACH_GESBC9312 bool "Support Glomation GESBC-9312-sx" help diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile index 5393af989e9..1f5a6b0487e 100644 --- a/arch/arm/mach-ep93xx/Makefile +++ b/arch/arm/mach-ep93xx/Makefile @@ -1,10 +1,13 @@ # # Makefile for the linux kernel. # -obj-y := core.o +obj-y := core.o clock.o obj-m := obj-n := obj- := +obj-$(CONFIG_MACH_EDB9302) += edb9302.o +obj-$(CONFIG_MACH_EDB9315) += edb9315.o +obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o obj-$(CONFIG_MACH_TS72XX) += ts72xx.o diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c new file mode 100644 index 00000000000..08ad782c164 --- /dev/null +++ b/arch/arm/mach-ep93xx/clock.c @@ -0,0 +1,156 @@ +/* + * arch/arm/mach-ep93xx/clock.c + * Clock control for Cirrus EP93xx chips. + * + * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/clk.h> +#include <linux/err.h> +#include <linux/string.h> +#include <asm/div64.h> +#include <asm/hardware.h> +#include <asm/io.h> + +struct clk { + char *name; + unsigned long rate; + int users; + u32 enable_reg; + u32 enable_mask; +}; + +static struct clk clk_pll1 = { + .name = "pll1", +}; +static struct clk clk_f = { + .name = "fclk", +}; +static struct clk clk_h = { + .name = "hclk", +}; +static struct clk clk_p = { + .name = "pclk", +}; +static struct clk clk_pll2 = { + .name = "pll2", +}; +static struct clk clk_usb_host = { + .name = "usb_host", + .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, + .enable_mask = EP93XX_SYSCON_CLOCK_USH_EN, +}; + + +static struct clk *clocks[] = { + &clk_pll1, + &clk_f, + &clk_h, + &clk_p, + &clk_pll2, + &clk_usb_host, +}; + +struct clk *clk_get(struct device *dev, const char *id) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(clocks); i++) { + if (!strcmp(clocks[i]->name, id)) + return clocks[i]; + } + + return ERR_PTR(-ENOENT); +} + +int clk_enable(struct clk *clk) +{ + if (!clk->users++ && clk->enable_reg) { + u32 value; + + value = __raw_readl(clk->enable_reg); + __raw_writel(value | clk->enable_mask, clk->enable_reg); + } + + return 0; +} + +void clk_disable(struct clk *clk) +{ + if (!--clk->users && clk->enable_reg) { + u32 value; + + value = __raw_readl(clk->enable_reg); + __raw_writel(value & ~clk->enable_mask, clk->enable_reg); + } +} + +unsigned long clk_get_rate(struct clk *clk) +{ + return clk->rate; +} + +void clk_put(struct clk *clk) +{ +} + + + +static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; +static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 }; +static char pclk_divisors[] = { 1, 2, 4, 8 }; + +/* + * PLL rate = 14.7456 MHz * (X1FBD + 1) * (X2FBD + 1) / (X2IPD + 1) / 2^PS + */ +static unsigned long calc_pll_rate(u32 config_word) +{ + unsigned long long rate; + int i; + + rate = 14745600; + rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */ + rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */ + do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */ + for (i = 0; i < ((config_word >> 16) & 3); i++) /* PS */ + rate >>= 1; + + return (unsigned long)rate; +} + +void ep93xx_clock_init(void) +{ + u32 value; + + value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); + if (!(value & 0x00800000)) { /* PLL1 bypassed? */ + clk_pll1.rate = 14745600; + } else { + clk_pll1.rate = calc_pll_rate(value); + } + clk_f.rate = clk_pll1.rate / fclk_divisors[(value >> 25) & 0x7]; + clk_h.rate = clk_pll1.rate / hclk_divisors[(value >> 20) & 0x7]; + clk_p.rate = clk_h.rate / pclk_divisors[(value >> 18) & 0x3]; + + value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); + if (!(value & 0x00080000)) { /* PLL2 bypassed? */ + clk_pll2.rate = 14745600; + } else if (value & 0x00040000) { /* PLL2 enabled? */ + clk_pll2.rate = calc_pll_rate(value); + } else { + clk_pll2.rate = 0; + } + clk_usb_host.rate = clk_pll2.rate / (((value >> 28) & 0xf) + 1); + + printk(KERN_INFO "ep93xx: PLL1 running at %ld MHz, PLL2 at %ld MHz\n", + clk_pll1.rate / 1000000, clk_pll2.rate / 1000000); + printk(KERN_INFO "ep93xx: FCLK %ld MHz, HCLK %ld MHz, PCLK %ld MHz\n", + clk_f.rate / 1000000, clk_h.rate / 1000000, + clk_p.rate / 1000000); +} diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index dcd41762538..a87a784b920 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -13,7 +13,6 @@ * your option) any later version. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/spinlock.h> @@ -103,7 +102,8 @@ static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) write_seqlock(&xtime_lock); __raw_writel(1, EP93XX_TIMER1_CLEAR); - while (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time + while ((signed long) + (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time) >= TIMER4_TICKS_PER_JIFFY) { last_jiffy_time += TIMER4_TICKS_PER_JIFFY; timer_tick(regs); @@ -116,7 +116,7 @@ static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction ep93xx_timer_irq = { .name = "ep93xx timer", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = ep93xx_timer_interrupt, }; @@ -124,7 +124,7 @@ static void __init ep93xx_timer_init(void) { /* Enable periodic HZ timer. */ __raw_writel(0x48, EP93XX_TIMER1_CONTROL); - __raw_writel((508000 / HZ) - 1, EP93XX_TIMER1_LOAD); + __raw_writel((508469 / HZ) - 1, EP93XX_TIMER1_LOAD); __raw_writel(0xc8, EP93XX_TIMER1_CONTROL); /* Enable lost jiffy timer. */ @@ -432,10 +432,37 @@ static struct platform_device ep93xx_rtc_device = { }; +static struct resource ep93xx_ohci_resources[] = { + [0] = { + .start = EP93XX_USB_PHYS_BASE, + .end = EP93XX_USB_PHYS_BASE + 0x0fff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_EP93XX_USB, + .end = IRQ_EP93XX_USB, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ep93xx_ohci_device = { + .name = "ep93xx-ohci", + .id = -1, + .dev = { + .dma_mask = (void *)0xffffffff, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), + .resource = ep93xx_ohci_resources, +}; + + void __init ep93xx_init_devices(void) { unsigned int v; + ep93xx_clock_init(); + /* * Disallow access to MaverickCrunch initially. */ @@ -449,4 +476,5 @@ void __init ep93xx_init_devices(void) amba_device_register(&uart3_device, &iomem_resource); platform_device_register(&ep93xx_rtc_device); + platform_device_register(&ep93xx_ohci_device); } diff --git a/arch/arm/mach-ep93xx/edb9302.c b/arch/arm/mach-ep93xx/edb9302.c new file mode 100644 index 00000000000..62a8efd2325 --- /dev/null +++ b/arch/arm/mach-ep93xx/edb9302.c @@ -0,0 +1,62 @@ +/* + * arch/arm/mach-ep93xx/edb9302.c + * Cirrus Logic EDB9302 support. + * + * Copyright (C) 2006 George Kashperko <george@chas.com.ua> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#include <linux/config.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/sched.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/mtd/physmap.h> +#include <linux/platform_device.h> +#include <asm/io.h> +#include <asm/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +static struct physmap_flash_data edb9302_flash_data = { + .width = 2, +}; + +static struct resource edb9302_flash_resource = { + .start = 0x60000000, + .end = 0x60ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device edb9302_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &edb9302_flash_data, + }, + .num_resources = 1, + .resource = &edb9302_flash_resource, +}; + +static void __init edb9302_init_machine(void) +{ + ep93xx_init_devices(); + platform_device_register(&edb9302_flash); +} + +MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board") + /* Maintainer: George Kashperko <george@chas.com.ua> */ + .phys_io = EP93XX_APB_PHYS_BASE, + .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, + .boot_params = 0x00000100, + .map_io = ep93xx_map_io, + .init_irq = ep93xx_init_irq, + .timer = &ep93xx_timer, + .init_machine = edb9302_init_machine, +MACHINE_END diff --git a/arch/arm/mach-ep93xx/edb9315.c b/arch/arm/mach-ep93xx/edb9315.c new file mode 100644 index 00000000000..ef7482faad8 --- /dev/null +++ b/arch/arm/mach-ep93xx/edb9315.c @@ -0,0 +1,62 @@ +/* + * arch/arm/mach-ep93xx/edb9315.c + * Cirrus Logic EDB9315 support. + * + * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#include <linux/config.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/sched.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/mtd/physmap.h> +#include <linux/platform_device.h> +#include <asm/io.h> +#include <asm/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +static struct physmap_flash_data edb9315_flash_data = { + .width = 4, +}; + +static struct resource edb9315_flash_resource = { + .start = 0x60000000, + .end = 0x61ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device edb9315_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &edb9315_flash_data, + }, + .num_resources = 1, + .resource = &edb9315_flash_resource, +}; + +static void __init edb9315_init_machine(void) +{ + ep93xx_init_devices(); + platform_device_register(&edb9315_flash); +} + +MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board") + /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ + .phys_io = EP93XX_APB_PHYS_BASE, + .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, + .boot_params = 0x00000100, + .map_io = ep93xx_map_io, + .init_irq = ep93xx_init_irq, + .timer = &ep93xx_timer, + .init_machine = edb9315_init_machine, +MACHINE_END diff --git a/arch/arm/mach-ep93xx/edb9315a.c b/arch/arm/mach-ep93xx/edb9315a.c new file mode 100644 index 00000000000..bfefdaa8f79 --- /dev/null +++ b/arch/arm/mach-ep93xx/edb9315a.c @@ -0,0 +1,62 @@ +/* + * arch/arm/mach-ep93xx/edb9315a.c + * Cirrus Logic EDB9315A support. + * + * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#include <linux/config.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/sched.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/mtd/physmap.h> +#include <linux/platform_device.h> +#include <asm/io.h> +#include <asm/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +static struct physmap_flash_data edb9315a_flash_data = { + .width = 2, +}; + +static struct resource edb9315a_flash_resource = { + .start = 0x60000000, + .end = 0x60ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device edb9315a_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &edb9315a_flash_data, + }, + .num_resources = 1, + .resource = &edb9315a_flash_resource, +}; + +static void __init edb9315a_init_machine(void) +{ + ep93xx_init_devices(); + platform_device_register(&edb9315a_flash); +} + +MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board") + /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ + .phys_io = EP93XX_APB_PHYS_BASE, + .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, + .boot_params = 0xc0000100, + .map_io = ep93xx_map_io, + .init_irq = ep93xx_init_irq, + .timer = &ep93xx_timer, + .init_machine = edb9315a_init_machine, +MACHINE_END diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c index d18fcb1a2f1..e760fd4f365 100644 --- a/arch/arm/mach-ep93xx/gesbc9312.c +++ b/arch/arm/mach-ep93xx/gesbc9312.c @@ -10,22 +10,43 @@ * your option) any later version. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/mm.h> #include <linux/sched.h> #include <linux/interrupt.h> +#include <linux/ioport.h> #include <linux/mtd/physmap.h> +#include <linux/platform_device.h> #include <asm/io.h> #include <asm/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +static struct physmap_flash_data gesbc9312_flash_data = { + .width = 4, +}; + +static struct resource gesbc9312_flash_resource = { + .start = 0x60000000, + .end = 0x607fffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device gesbc9312_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &gesbc9312_flash_data, + }, + .num_resources = 1, + .resource = &gesbc9312_flash_resource, +}; + static void __init gesbc9312_init_machine(void) { ep93xx_init_devices(); - physmap_configure(0x60000000, 0x00800000, 4, NULL); + platform_device_register(&gesbc9312_flash); } MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c index e24566b88a7..df315f2e9be 100644 --- a/arch/arm/mach-ep93xx/ts72xx.c +++ b/arch/arm/mach-ep93xx/ts72xx.c @@ -10,12 +10,12 @@ * your option) any later version. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/mm.h> #include <linux/sched.h> #include <linux/interrupt.h> +#include <linux/ioport.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> #include <linux/m48t86.h> @@ -111,6 +111,26 @@ static void __init ts72xx_map_io(void) } } +static struct physmap_flash_data ts72xx_flash_data = { + .width = 1, +}; + +static struct resource ts72xx_flash_resource = { + .start = TS72XX_NOR_PHYS_BASE, + .end = TS72XX_NOR_PHYS_BASE + 0x00ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device ts72xx_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &ts72xx_flash_data, + }, + .num_resources = 1, + .resource = &ts72xx_flash_resource, +}; + static unsigned char ts72xx_rtc_readbyte(unsigned long addr) { __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE); @@ -141,7 +161,7 @@ static void __init ts72xx_init_machine(void) { ep93xx_init_devices(); if (board_is_ts7200()) - physmap_configure(TS72XX_NOR_PHYS_BASE, 0x01000000, 1, NULL); + platform_device_register(&ts72xx_flash); platform_device_register(&ts72xx_rtc_device); } diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index bbe6e4a0bf6..af900f4755a 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -7,7 +7,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/types.h> #include <linux/mm.h> diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c index 14a62d6008f..2af610811ca 100644 --- a/arch/arm/mach-footbridge/dc21285-timer.c +++ b/arch/arm/mach-footbridge/dc21285-timer.c @@ -6,6 +6,7 @@ */ #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <asm/irq.h> @@ -43,7 +44,7 @@ timer1_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction footbridge_timer_irq = { .name = "Timer1 timer tick", .handler = timer1_interrupt, - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, }; /* diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c index 5dace259783..607ed1f5b3f 100644 --- a/arch/arm/mach-footbridge/dc21285.c +++ b/arch/arm/mach-footbridge/dc21285.c @@ -332,15 +332,15 @@ void __init dc21285_preinit(void) /* * We don't care if these fail. */ - request_irq(IRQ_PCI_SERR, dc21285_serr_irq, SA_INTERRUPT, + request_irq(IRQ_PCI_SERR, dc21285_serr_irq, IRQF_DISABLED, "PCI system error", &serr_timer); - request_irq(IRQ_PCI_PERR, dc21285_parity_irq, SA_INTERRUPT, + request_irq(IRQ_PCI_PERR, dc21285_parity_irq, IRQF_DISABLED, "PCI parity error", &perr_timer); - request_irq(IRQ_PCI_ABORT, dc21285_abort_irq, SA_INTERRUPT, + request_irq(IRQ_PCI_ABORT, dc21285_abort_irq, IRQF_DISABLED, "PCI abort", NULL); - request_irq(IRQ_DISCARD_TIMER, dc21285_discard_irq, SA_INTERRUPT, + request_irq(IRQ_DISCARD_TIMER, dc21285_discard_irq, IRQF_DISABLED, "Discard timer", NULL); - request_irq(IRQ_PCI_DPERR, dc21285_dparity_irq, SA_INTERRUPT, + request_irq(IRQ_PCI_DPERR, dc21285_dparity_irq, IRQF_DISABLED, "PCI data parity", NULL); if (cfn_mode) { diff --git a/arch/arm/mach-footbridge/dma.c b/arch/arm/mach-footbridge/dma.c index 7a54578b51a..1f9b09b8ed8 100644 --- a/arch/arm/mach-footbridge/dma.c +++ b/arch/arm/mach-footbridge/dma.c @@ -10,7 +10,6 @@ * 17-Mar-1999 RMK Allow any EBSA285-like architecture to have * ISA DMA controllers. */ -#include <linux/config.h> #include <linux/init.h> #include <asm/dma.h> diff --git a/arch/arm/mach-footbridge/ebsa285-leds.c b/arch/arm/mach-footbridge/ebsa285-leds.c index 2c7c3630401..a64e2222651 100644 --- a/arch/arm/mach-footbridge/ebsa285-leds.c +++ b/arch/arm/mach-footbridge/ebsa285-leds.c @@ -16,7 +16,6 @@ * Changelog: * 02-05-1999 RMK Various cleanups */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c index c1d74f7ab66..c4810a40c8e 100644 --- a/arch/arm/mach-footbridge/isa-timer.c +++ b/arch/arm/mach-footbridge/isa-timer.c @@ -6,6 +6,7 @@ */ #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <asm/io.h> #include <asm/irq.h> @@ -72,7 +73,7 @@ isa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction isa_timer_irq = { .name = "ISA timer tick", .handler = isa_timer_interrupt, - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, }; static void __init isa_timer_init(void) diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c index 229bf0585e4..a1f381c64a3 100644 --- a/arch/arm/mach-footbridge/netwinder-hw.c +++ b/arch/arm/mach-footbridge/netwinder-hw.c @@ -5,7 +5,6 @@ * * Copyright (C) 1998, 1999 Russell King, Phil Blundell */ -#include <linux/config.h> #include <linux/module.h> #include <linux/ioport.h> #include <linux/kernel.h> diff --git a/arch/arm/mach-footbridge/netwinder-leds.c b/arch/arm/mach-footbridge/netwinder-leds.c index 7451fc07b85..8e9cac5a213 100644 --- a/arch/arm/mach-footbridge/netwinder-leds.c +++ b/arch/arm/mach-footbridge/netwinder-leds.c @@ -16,7 +16,6 @@ * Changelog: * 02-05-1999 RMK Various cleanups */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/mach-h720x/cpu-h7201.c b/arch/arm/mach-h720x/cpu-h7201.c index af9e4a5d5ea..a9a8255a3a0 100644 --- a/arch/arm/mach-h720x/cpu-h7201.c +++ b/arch/arm/mach-h720x/cpu-h7201.c @@ -41,7 +41,7 @@ h7201_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction h7201_timer_irq = { .name = "h7201 Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = h7201_timer_interrupt, }; diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c index a4a7c0125d0..da678d163fd 100644 --- a/arch/arm/mach-h720x/cpu-h7202.c +++ b/arch/arm/mach-h720x/cpu-h7202.c @@ -171,7 +171,7 @@ static struct irqchip h7202_timerx_chip = { static struct irqaction h7202_timer_irq = { .name = "h7202 Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = h7202_timer_interrupt, }; diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c index 193f968edac..407cd4c0aa8 100644 --- a/arch/arm/mach-h720x/h7201-eval.c +++ b/arch/arm/mach-h720x/h7201-eval.c @@ -13,7 +13,6 @@ * */ -#include <linux/config.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/types.h> diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c index 36266896979..bf2acdce62e 100644 --- a/arch/arm/mach-h720x/h7202-eval.c +++ b/arch/arm/mach-h720x/h7202-eval.c @@ -13,7 +13,6 @@ * */ -#include <linux/config.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/types.h> diff --git a/arch/arm/mach-imx/dma.c b/arch/arm/mach-imx/dma.c index 4ca51dcf13a..36578871ecc 100644 --- a/arch/arm/mach-imx/dma.c +++ b/arch/arm/mach-imx/dma.c @@ -15,6 +15,9 @@ * Changed to support scatter gather DMA * by taking Russell's code from RiscPC * + * 2006-05-31 Pavel Pisa <pisa@cmp.felk.cvut.cz> + * Corrected error handling code. + * */ #undef DEBUG @@ -277,7 +280,7 @@ imx_dma_setup_sg(imx_dmach_t dma_ch, int imx_dma_setup_handlers(imx_dmach_t dma_ch, void (*irq_handler) (int, void *, struct pt_regs *), - void (*err_handler) (int, void *, struct pt_regs *), + void (*err_handler) (int, void *, struct pt_regs *, int), void *data) { struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; @@ -463,43 +466,53 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id, struct pt_regs *regs) int i, disr = DISR; struct imx_dma_channel *channel; unsigned int err_mask = DBTOSR | DRTOSR | DSESR | DBOSR; + int errcode; - DISR = disr; + DISR = disr & err_mask; for (i = 0; i < IMX_DMA_CHANNELS; i++) { - channel = &imx_dma_channels[i]; - - if ((err_mask & 1 << i) && channel->name - && channel->err_handler) { - channel->err_handler(i, channel->data, regs); + if(!(err_mask & (1 << i))) continue; - } - - imx_dma_channels[i].sg = NULL; + channel = &imx_dma_channels[i]; + errcode = 0; if (DBTOSR & (1 << i)) { - printk(KERN_WARNING - "Burst timeout on channel %d (%s)\n", - i, channel->name); - DBTOSR |= (1 << i); + DBTOSR = (1 << i); + errcode |= IMX_DMA_ERR_BURST; } if (DRTOSR & (1 << i)) { - printk(KERN_WARNING - "Request timeout on channel %d (%s)\n", - i, channel->name); - DRTOSR |= (1 << i); + DRTOSR = (1 << i); + errcode |= IMX_DMA_ERR_REQUEST; } if (DSESR & (1 << i)) { - printk(KERN_WARNING - "Transfer timeout on channel %d (%s)\n", - i, channel->name); - DSESR |= (1 << i); + DSESR = (1 << i); + errcode |= IMX_DMA_ERR_TRANSFER; } if (DBOSR & (1 << i)) { - printk(KERN_WARNING - "Buffer overflow timeout on channel %d (%s)\n", - i, channel->name); - DBOSR |= (1 << i); + DBOSR = (1 << i); + errcode |= IMX_DMA_ERR_BUFFER; } + + /* + * The cleaning of @sg field would be questionable + * there, because its value can help to compute + * remaining/transfered bytes count in the handler + */ + /*imx_dma_channels[i].sg = NULL;*/ + + if (channel->name && channel->err_handler) { + channel->err_handler(i, channel->data, regs, errcode); + continue; + } + + imx_dma_channels[i].sg = NULL; + + printk(KERN_WARNING + "DMA timeout on channel %d (%s) -%s%s%s%s\n", + i, channel->name, + errcode&IMX_DMA_ERR_BURST? " burst":"", + errcode&IMX_DMA_ERR_REQUEST? " request":"", + errcode&IMX_DMA_ERR_TRANSFER? " transfer":"", + errcode&IMX_DMA_ERR_BUFFER? " buffer":""); } return IRQ_HANDLED; } diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c index ea805bfa5e5..6ed7523c65b 100644 --- a/arch/arm/mach-imx/time.c +++ b/arch/arm/mach-imx/time.c @@ -8,11 +8,11 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/sched.h> #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/time.h> #include <asm/hardware.h> @@ -72,7 +72,7 @@ imx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction imx_timer_irq = { .name = "i.MX Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = imx_timer_interrupt, }; diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 576a5e979c0..42021fdfa0c 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c @@ -13,6 +13,7 @@ #include <linux/device.h> #include <linux/spinlock.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/sched.h> #include <linux/smp.h> #include <linux/termios.h> @@ -281,7 +282,7 @@ integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction integrator_timer_irq = { .name = "Integrator Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = integrator_timer_interrupt, }; diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index 229a63a525c..f9043592e29 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@ -20,7 +20,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/pci.h> #include <linux/ptrace.h> diff --git a/arch/arm/mach-integrator/time.c b/arch/arm/mach-integrator/time.c index bc07f52a6fd..ee49cf790da 100644 --- a/arch/arm/mach-integrator/time.c +++ b/arch/arm/mach-integrator/time.c @@ -125,7 +125,7 @@ static int rtc_probe(struct amba_device *dev, void *id) xtime.tv_sec = __raw_readl(rtc_base + RTC_DR); - ret = request_irq(dev->irq[0], arm_rtc_interrupt, SA_INTERRUPT, + ret = request_irq(dev->irq[0], arm_rtc_interrupt, IRQF_DISABLED, "rtc-pl030", dev); if (ret) goto map_out; diff --git a/arch/arm/mach-iop3xx/Kconfig b/arch/arm/mach-iop3xx/Kconfig index 2bfe8c729f9..4422f238860 100644 --- a/arch/arm/mach-iop3xx/Kconfig +++ b/arch/arm/mach-iop3xx/Kconfig @@ -30,12 +30,15 @@ config MACH_IQ80332 select ARCH_IOP331 help Say Y here if you want to run your kernel on the Intel IQ80332 - evaluation kit for the IOP332 chipset + evaluation kit for the IOP332 chipset. config ARCH_EP80219 - bool "Enable support for EP80219" - select ARCH_IOP321 - select ARCH_IQ31244 + bool "Enable support for EP80219" + select ARCH_IOP321 + select ARCH_IQ31244 + help + Say Y here if you want to run your kernel on the Intel EP80219 + evaluation kit for the Intel 80219 chipset (a IOP321 variant). # Which IOP variant are we running? config ARCH_IOP321 @@ -56,8 +59,8 @@ config IOP331_STEPD bool "Chip stepping D of the IOP80331 processor or IOP80333" depends on (ARCH_IOP331) help - Say Y here if you have StepD of the IOP80331 or IOP8033 - based platforms. + Say Y here if you have StepD of the IOP80331 or IOP8033 + based platforms. endmenu endif diff --git a/arch/arm/mach-iop3xx/common.c b/arch/arm/mach-iop3xx/common.c index fdeeef489a7..d7f50e57e75 100644 --- a/arch/arm/mach-iop3xx/common.c +++ b/arch/arm/mach-iop3xx/common.c @@ -12,7 +12,6 @@ * warranty of any kind, whether express or implied. */ -#include <linux/config.h> #include <linux/delay.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-iop3xx/iop321-setup.c b/arch/arm/mach-iop3xx/iop321-setup.c index 0ebbcb20c6a..b6d096903c4 100644 --- a/arch/arm/mach-iop3xx/iop321-setup.c +++ b/arch/arm/mach-iop3xx/iop321-setup.c @@ -12,7 +12,6 @@ */ #include <linux/mm.h> #include <linux/init.h> -#include <linux/config.h> #include <linux/major.h> #include <linux/fs.h> #include <linux/platform_device.h> diff --git a/arch/arm/mach-iop3xx/iop321-time.c b/arch/arm/mach-iop3xx/iop321-time.c index d67ac0e5d43..04b1a6f7eba 100644 --- a/arch/arm/mach-iop3xx/iop321-time.c +++ b/arch/arm/mach-iop3xx/iop321-time.c @@ -85,7 +85,7 @@ iop321_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction iop321_timer_irq = { .name = "IOP321 Timer Tick", .handler = iop321_timer_interrupt, - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, }; static void __init iop321_timer_init(void) diff --git a/arch/arm/mach-iop3xx/iop331-setup.c b/arch/arm/mach-iop3xx/iop331-setup.c index 7b7b6eea384..3cc98d892ad 100644 --- a/arch/arm/mach-iop3xx/iop331-setup.c +++ b/arch/arm/mach-iop3xx/iop331-setup.c @@ -11,7 +11,6 @@ */ #include <linux/mm.h> #include <linux/init.h> -#include <linux/config.h> #include <linux/major.h> #include <linux/fs.h> #include <linux/platform_device.h> diff --git a/arch/arm/mach-iop3xx/iop331-time.c b/arch/arm/mach-iop3xx/iop331-time.c index 3c1f0ebbd63..0c09e74c574 100644 --- a/arch/arm/mach-iop3xx/iop331-time.c +++ b/arch/arm/mach-iop3xx/iop331-time.c @@ -82,7 +82,7 @@ iop331_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction iop331_timer_irq = { .name = "IOP331 Timer Tick", .handler = iop331_timer_interrupt, - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, }; static void __init iop331_timer_init(void) diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 6e8d504aca5..7f91f689a04 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -14,12 +14,12 @@ * warranty of any kind, whether express or implied. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/spinlock.h> #include <linux/sched.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/serial.h> #include <linux/tty.h> #include <linux/bitops.h> @@ -211,7 +211,8 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) /* clear timer 1 */ ixp2000_reg_wrb(IXP2000_T1_CLR, 1); - while ((next_jiffy_time - *missing_jiffy_timer_csr) > ticks_per_jiffy) { + while ((signed long)(next_jiffy_time - *missing_jiffy_timer_csr) + >= ticks_per_jiffy) { timer_tick(regs); next_jiffy_time -= ticks_per_jiffy; } @@ -223,7 +224,7 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction ixp2000_timer_irq = { .name = "IXP2000 Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = ixp2000_timer_interrupt, }; @@ -301,6 +302,7 @@ void gpio_line_config(int line, int direction) } local_irq_restore(flags); } +EXPORT_SYMBOL(gpio_line_config); /************************************************************************* @@ -407,7 +409,7 @@ static void ixp2000_err_irq_handler(unsigned int irq, struct irqdesc *desc, str for(i = 31; i >= 0; i--) { if(status & (1 << i)) { desc = irq_desc + IRQ_IXP2000_DRAM0_MIN_ERR + i; - desc->handle(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc, regs); + desc_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc, regs); } } } diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c index 52fac89e95b..ac29298c5d3 100644 --- a/arch/arm/mach-ixp2000/enp2611.c +++ b/arch/arm/mach-ixp2000/enp2611.c @@ -18,7 +18,6 @@ * option) any later version. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/mm.h> diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c index 09101271298..a6f14801872 100644 --- a/arch/arm/mach-ixp2000/ixdp2400.c +++ b/arch/arm/mach-ixp2000/ixdp2400.c @@ -14,7 +14,6 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/mm.h> diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c index 076e3f8acc9..91d36d91dac 100644 --- a/arch/arm/mach-ixp2000/ixdp2800.c +++ b/arch/arm/mach-ixp2000/ixdp2800.c @@ -14,7 +14,6 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/mm.h> diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c index d628da56b4b..40eef8b3674 100644 --- a/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/arch/arm/mach-ixp2000/ixdp2x00.c @@ -14,7 +14,6 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/mm.h> @@ -168,7 +167,7 @@ void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long } /* Hook into PCI interrupt */ - set_irq_chained_handler(IRQ_IXP2000_PCIB, &ixdp2x00_irq_handler); + set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler); } /************************************************************************* diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index 66915282a46..7f42366f60d 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c @@ -15,7 +15,6 @@ * option) any later version. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/mm.h> @@ -128,7 +127,7 @@ void __init ixdp2x01_init_irq(void) } /* Hook into PCI interrupts */ - set_irq_chained_handler(IRQ_IXP2000_PCIB, &ixdp2x01_irq_handler); + set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler); } diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index affd1d5d744..566a07821c7 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c @@ -14,7 +14,6 @@ * warranty of any kind, whether express or implied. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/spinlock.h> @@ -272,7 +271,7 @@ static void pci_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs * } int_desc = irq_desc + irqno; - int_desc->handle(irqno, int_desc, regs); + desc_handle_irq(irqno, int_desc, regs); desc->chip->unmask(irq); } @@ -334,7 +333,7 @@ void __init ixp23xx_init_irq(void) /************************************************************************* * Timer-tick functions for IXP23xx *************************************************************************/ -#define CLOCK_TICKS_PER_USEC CLOCK_TICK_RATE / (USEC_PER_SEC) +#define CLOCK_TICKS_PER_USEC (CLOCK_TICK_RATE / USEC_PER_SEC) static unsigned long next_jiffy_time; @@ -353,7 +352,7 @@ ixp23xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { /* Clear Pending Interrupt by writing '1' to it */ *IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND; - while ((*IXP23XX_TIMER_CONT - next_jiffy_time) > LATCH) { + while ((signed long)(*IXP23XX_TIMER_CONT - next_jiffy_time) >= LATCH) { timer_tick(regs); next_jiffy_time += LATCH; } @@ -364,7 +363,7 @@ ixp23xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction ixp23xx_timer_irq = { .name = "IXP23xx Timer Tick", .handler = ixp23xx_timer_interrupt, - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, }; void __init ixp23xx_init_timer(void) @@ -439,5 +438,6 @@ static struct platform_device *ixp23xx_devices[] __initdata = { void __init ixp23xx_sys_init(void) { + *IXP23XX_EXP_UNIT_FUSE |= 0xf; platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); } diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c index bf688c12863..7a85ced5671 100644 --- a/arch/arm/mach-ixp23xx/espresso.c +++ b/arch/arm/mach-ixp23xx/espresso.c @@ -10,7 +10,6 @@ * warranty of any kind, whether express or implied. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/spinlock.h> @@ -53,9 +52,29 @@ static int __init espresso_pci_init(void) }; subsys_initcall(espresso_pci_init); +static struct physmap_flash_data espresso_flash_data = { + .width = 2, +}; + +static struct resource espresso_flash_resource = { + .start = 0x90000000, + .end = 0x91ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device espresso_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &espresso_flash_data, + }, + .num_resources = 1, + .resource = &espresso_flash_resource, +}; + static void __init espresso_init(void) { - physmap_configure(0x90000000, 0x02000000, 2, NULL); + platform_device_register(&espresso_flash); /* * Mark flash as writeable. diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index 00146c35daa..37a32e6bcca 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c @@ -14,12 +14,12 @@ * warranty of any kind, whether express or implied. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/spinlock.h> #include <linux/sched.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/serial.h> #include <linux/tty.h> #include <linux/bitops.h> @@ -37,7 +37,6 @@ #include <asm/memory.h> #include <asm/hardware.h> #include <asm/mach-types.h> -#include <asm/irq.h> #include <asm/system.h> #include <asm/tlbflush.h> #include <asm/pgtable.h> @@ -75,7 +74,7 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irqdesc *desc, struct int cpld_irq = IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i); cpld_desc = irq_desc + cpld_irq; - cpld_desc->handle(cpld_irq, cpld_desc, regs); + desc_handle_irq(cpld_irq, cpld_desc, regs); } } @@ -112,7 +111,7 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irqdesc *desc, struct int cpld_irq = IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i); cpld_desc = irq_desc + cpld_irq; - cpld_desc->handle(cpld_irq, cpld_desc, regs); + desc_handle_irq(cpld_irq, cpld_desc, regs); } } @@ -159,8 +158,8 @@ void ixdp2351_init_irq(void) } } - set_irq_chained_handler(IRQ_IXP23XX_INTA, &ixdp2351_inta_handler); - set_irq_chained_handler(IRQ_IXP23XX_INTB, &ixdp2351_intb_handler); + set_irq_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler); + set_irq_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler); } /* @@ -298,9 +297,29 @@ static void __init ixdp2351_map_io(void) iotable_init(ixdp2351_io_desc, ARRAY_SIZE(ixdp2351_io_desc)); } +static struct physmap_flash_data ixdp2351_flash_data = { + .width = 1, +}; + +static struct resource ixdp2351_flash_resource = { + .start = 0x90000000, + .end = 0x93ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device ixdp2351_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &ixdp2351_flash_data, + }, + .num_resources = 1, + .resource = &ixdp2351_flash_resource, +}; + static void __init ixdp2351_init(void) { - physmap_configure(0x90000000, 0x04000000, 1, NULL); + platform_device_register(&ixdp2351_flash); /* * Mark flash as writeable diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c index ac72f94c5b4..3b34fa35e36 100644 --- a/arch/arm/mach-ixp23xx/pci.c +++ b/arch/arm/mach-ixp23xx/pci.c @@ -16,7 +16,6 @@ * option) any later version. */ -#include <linux/config.h> #include <linux/sched.h> #include <linux/kernel.h> #include <linux/pci.h> diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c index 43c14e74079..d06e21b70de 100644 --- a/arch/arm/mach-ixp23xx/roadrunner.c +++ b/arch/arm/mach-ixp23xx/roadrunner.c @@ -14,7 +14,6 @@ * warranty of any kind, whether express or implied. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/spinlock.h> @@ -137,9 +136,29 @@ static int __init roadrunner_pci_init(void) subsys_initcall(roadrunner_pci_init); +static struct physmap_flash_data roadrunner_flash_data = { + .width = 2, +}; + +static struct resource roadrunner_flash_resource = { + .start = 0x90000000, + .end = 0x93ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device roadrunner_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &roadrunner_flash_data, + }, + .num_resources = 1, + .resource = &roadrunner_flash_resource, +}; + static void __init roadrunner_init(void) { - physmap_configure(0x90000000, 0x04000000, 2, NULL); + platform_device_register(&roadrunner_flash); /* * Mark flash as writeable diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig index 3b23f43cb16..57f23b46539 100644 --- a/arch/arm/mach-ixp4xx/Kconfig +++ b/arch/arm/mach-ixp4xx/Kconfig @@ -35,7 +35,6 @@ config ARCH_ADI_COYOTE config ARCH_IXDP425 bool "IXDP425" - select PCI help Say 'Y' here if you want your kernel to support Intel's IXDP425 Development Platform (Also known as Richfield). @@ -43,7 +42,6 @@ config ARCH_IXDP425 config MACH_IXDPG425 bool "IXDPG425" - select PCI help Say 'Y' here if you want your kernel to support Intel's IXDPG425 Development Platform (Also known as Montajade). @@ -51,7 +49,6 @@ config MACH_IXDPG425 config MACH_IXDP465 bool "IXDP465" - select PCI help Say 'Y' here if you want your kernel to support Intel's IXDP465 Development Platform (Also known as BMP). diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile index 5a4aaa0e0a0..640315d8b96 100644 --- a/arch/arm/mach-ixp4xx/Makefile +++ b/arch/arm/mach-ixp4xx/Makefile @@ -2,13 +2,23 @@ # Makefile for the linux kernel. # +obj-pci-y := +obj-pci-n := + +obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o +obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o +obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o +obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o +obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-pci.o +obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o + obj-y += common.o -obj-$(CONFIG_PCI) += common-pci.o -obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o ixdp425-setup.o -obj-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o coyote-setup.o -obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o coyote-setup.o -obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o gtwx5715-setup.o -obj-$(CONFIG_MACH_NSLU2) += nslu2-pci.o nslu2-setup.o nslu2-power.o -obj-$(CONFIG_MACH_NAS100D) += nas100d-pci.o nas100d-setup.o nas100d-power.o +obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o +obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o +obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o +obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o +obj-$(CONFIG_MACH_NSLU2) += nslu2-setup.o nslu2-power.o +obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o nas100d-power.o +obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 00b761ff0f9..7c25dbd5a18 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -13,7 +13,6 @@ * warranty of any kind, whether express or implied. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/mm.h> #include <linux/init.h> @@ -276,7 +275,7 @@ static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id, struct pt_regs /* * Catch up with the real idea of time */ - while ((*IXP4XX_OSTS - last_jiffy_time) > LATCH) { + while ((signed long)(*IXP4XX_OSTS - last_jiffy_time) >= LATCH) { timer_tick(regs); last_jiffy_time += LATCH; } @@ -288,7 +287,7 @@ static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id, struct pt_regs static struct irqaction ixp4xx_timer_irq = { .name = "IXP4xx Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = ixp4xx_timer_interrupt, }; diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c index e6b7fcd923f..2cebb287889 100644 --- a/arch/arm/mach-ixp4xx/coyote-pci.c +++ b/arch/arm/mach-ixp4xx/coyote-pci.c @@ -17,6 +17,7 @@ #include <linux/kernel.h> #include <linux/pci.h> #include <linux/init.h> +#include <linux/irq.h> #include <asm/mach-types.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c index da415d5d7f3..d5156c043f0 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c @@ -15,9 +15,9 @@ */ #include <linux/kernel.h> -#include <linux/config.h> #include <linux/pci.h> #include <linux/init.h> +#include <linux/irq.h> #include <linux/delay.h> #include <asm/mach/pci.h> diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c index 526fb6175bc..ed527080021 100644 --- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c @@ -16,10 +16,10 @@ #include <linux/kernel.h> #include <linux/pci.h> #include <linux/init.h> +#include <linux/irq.h> #include <asm/mach-types.h> #include <asm/hardware.h> -#include <asm/irq.h> #include <asm/mach/pci.h> diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c index 26b7c001ff6..b8ebaf4a9c8 100644 --- a/arch/arm/mach-ixp4xx/nas100d-pci.c +++ b/arch/arm/mach-ixp4xx/nas100d-pci.c @@ -15,9 +15,9 @@ * */ -#include <linux/config.h> #include <linux/pci.h> #include <linux/init.h> +#include <linux/irq.h> #include <asm/mach/pci.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-ixp4xx/nas100d-power.c b/arch/arm/mach-ixp4xx/nas100d-power.c index 99d333d7ebd..81ffcae1f56 100644 --- a/arch/arm/mach-ixp4xx/nas100d-power.c +++ b/arch/arm/mach-ixp4xx/nas100d-power.c @@ -17,14 +17,13 @@ * */ +#include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/module.h> #include <linux/reboot.h> -#include <linux/interrupt.h> #include <asm/mach-types.h> -extern void ctrl_alt_del(void); - static irqreturn_t nas100d_reset_handler(int irq, void *dev_id, struct pt_regs *regs) { /* Signal init to do the ctrlaltdel action, this will bypass init if @@ -43,7 +42,7 @@ static int __init nas100d_power_init(void) set_irq_type(NAS100D_RB_IRQ, IRQT_LOW); if (request_irq(NAS100D_RB_IRQ, &nas100d_reset_handler, - SA_INTERRUPT, "NAS100D reset button", NULL) < 0) { + IRQF_DISABLED, "NAS100D reset button", NULL) < 0) { printk(KERN_DEBUG "Reset Button IRQ %d not available\n", NAS100D_RB_IRQ); diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c index a3b4c6ac570..9a31444d921 100644 --- a/arch/arm/mach-ixp4xx/nas100d-setup.c +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c @@ -15,6 +15,7 @@ #include <linux/kernel.h> #include <linux/serial.h> #include <linux/serial_8250.h> +#include <linux/leds.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -37,6 +38,36 @@ static struct platform_device nas100d_flash = { .resource = &nas100d_flash_resource, }; +#ifdef CONFIG_LEDS_IXP4XX +static struct resource nas100d_led_resources[] = { + { + .name = "wlan", /* green led */ + .start = 0, + .end = 0, + .flags = IXP4XX_GPIO_LOW, + }, + { + .name = "ready", /* blue power led (off is flashing!) */ + .start = 15, + .end = 15, + .flags = IXP4XX_GPIO_LOW, + }, + { + .name = "disk", /* yellow led */ + .start = 3, + .end = 3, + .flags = IXP4XX_GPIO_LOW, + }, +}; + +static struct platform_device nas100d_leds = { + .name = "IXP4XX-GPIO-LED", + .id = -1, + .num_resources = ARRAY_SIZE(nas100d_led_resources), + .resource = nas100d_led_resources, +}; +#endif + static struct ixp4xx_i2c_pins nas100d_i2c_gpio_pins = { .sda_pin = NAS100D_SDA_PIN, .scl_pin = NAS100D_SCL_PIN, @@ -95,7 +126,9 @@ static struct platform_device nas100d_uart = { static struct platform_device *nas100d_devices[] __initdata = { &nas100d_i2c_controller, &nas100d_flash, - &nas100d_uart, +#ifdef CONFIG_LEDS_IXP4XX + &nas100d_leds, +#endif }; static void nas100d_power_off(void) @@ -122,6 +155,12 @@ static void __init nas100d_init(void) pm_power_off = nas100d_power_off; + /* This is only useful on a modified machine, but it is valuable + * to have it first in order to see debug messages, and so that + * it does *not* get removed if platform_add_devices fails! + */ + (void)platform_device_register(&nas100d_uart); + platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices)); } diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c index ece860444d5..0de639d6e60 100644 --- a/arch/arm/mach-ixp4xx/nslu2-pci.c +++ b/arch/arm/mach-ixp4xx/nslu2-pci.c @@ -15,7 +15,6 @@ * */ -#include <linux/config.h> #include <linux/pci.h> #include <linux/init.h> diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c index d80c362bc53..e2a2230b69f 100644 --- a/arch/arm/mach-ixp4xx/nslu2-power.c +++ b/arch/arm/mach-ixp4xx/nslu2-power.c @@ -20,11 +20,10 @@ #include <linux/module.h> #include <linux/reboot.h> #include <linux/interrupt.h> +#include <linux/reboot.h> #include <asm/mach-types.h> -extern void ctrl_alt_del(void); - static irqreturn_t nslu2_power_handler(int irq, void *dev_id, struct pt_regs *regs) { /* Signal init to do the ctrlaltdel action, this will bypass init if @@ -55,7 +54,7 @@ static int __init nslu2_power_init(void) set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH); if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler, - SA_INTERRUPT, "NSLU2 reset button", NULL) < 0) { + IRQF_DISABLED, "NSLU2 reset button", NULL) < 0) { printk(KERN_DEBUG "Reset Button IRQ %d not available\n", NSLU2_RB_IRQ); @@ -64,7 +63,7 @@ static int __init nslu2_power_init(void) } if (request_irq(NSLU2_PB_IRQ, &nslu2_power_handler, - SA_INTERRUPT, "NSLU2 power button", NULL) < 0) { + IRQF_DISABLED, "NSLU2 power button", NULL) < 0) { printk(KERN_DEBUG "Power Button IRQ %d not available\n", NSLU2_PB_IRQ); diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c index 55411f21d83..749a337494d 100644 --- a/arch/arm/mach-ixp4xx/nslu2-setup.c +++ b/arch/arm/mach-ixp4xx/nslu2-setup.c @@ -7,6 +7,7 @@ * Copyright (C) 2003-2004 MontaVista Software, Inc. * * Author: Mark Rakes <mrakes at mac.com> + * Author: Rod Whitby <rod@whitby.id.au> * Maintainers: http://www.nslu2-linux.org/ * * Fixed missing init_time in MACHINE_START kas11 10/22/04 @@ -16,6 +17,7 @@ #include <linux/kernel.h> #include <linux/serial.h> #include <linux/serial_8250.h> +#include <linux/leds.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -43,6 +45,42 @@ static struct ixp4xx_i2c_pins nslu2_i2c_gpio_pins = { .scl_pin = NSLU2_SCL_PIN, }; +#ifdef CONFIG_LEDS_IXP4XX +static struct resource nslu2_led_resources[] = { + { + .name = "ready", /* green led */ + .start = NSLU2_LED_GRN, + .end = NSLU2_LED_GRN, + .flags = IXP4XX_GPIO_HIGH, + }, + { + .name = "status", /* red led */ + .start = NSLU2_LED_RED, + .end = NSLU2_LED_RED, + .flags = IXP4XX_GPIO_HIGH, + }, + { + .name = "disk-1", + .start = NSLU2_LED_DISK1, + .end = NSLU2_LED_DISK1, + .flags = IXP4XX_GPIO_LOW, + }, + { + .name = "disk-2", + .start = NSLU2_LED_DISK2, + .end = NSLU2_LED_DISK2, + .flags = IXP4XX_GPIO_LOW, + }, +}; + +static struct platform_device nslu2_leds = { + .name = "IXP4XX-GPIO-LED", + .id = -1, + .num_resources = ARRAY_SIZE(nslu2_led_resources), + .resource = nslu2_led_resources, +}; +#endif + static struct platform_device nslu2_i2c_controller = { .name = "IXP4XX-I2C", .id = 0, @@ -102,8 +140,10 @@ static struct platform_device nslu2_uart = { static struct platform_device *nslu2_devices[] __initdata = { &nslu2_i2c_controller, &nslu2_flash, - &nslu2_uart, &nslu2_beeper, +#ifdef CONFIG_LEDS_IXP4XX + &nslu2_leds, +#endif }; static void nslu2_power_off(void) @@ -127,6 +167,12 @@ static void __init nslu2_init(void) pm_power_off = nslu2_power_off; + /* This is only useful on a modified machine, but it is valuable + * to have it first in order to see debug messages, and so that + * it does *not* get removed if platform_add_devices fails! + */ + (void)platform_device_register(&nslu2_uart); + platform_add_devices(nslu2_devices, ARRAY_SIZE(nslu2_devices)); } diff --git a/arch/arm/mach-l7200/core.c b/arch/arm/mach-l7200/core.c index ac626436e96..b7af5640ea7 100644 --- a/arch/arm/mach-l7200/core.c +++ b/arch/arm/mach-l7200/core.c @@ -7,6 +7,7 @@ */ #include <linux/kernel.h> #include <linux/init.h> +#include <linux/irq.h> #include <linux/device.h> #include <asm/types.h> diff --git a/arch/arm/mach-lh7a40x/Kconfig b/arch/arm/mach-lh7a40x/Kconfig index 8a17867a6a2..558a34f53b1 100644 --- a/arch/arm/mach-lh7a40x/Kconfig +++ b/arch/arm/mach-lh7a40x/Kconfig @@ -14,6 +14,7 @@ config MACH_LPD7A400 bool "LPD7A400 Card Engine" select ARCH_LH7A400 # select IDE_POLL + select HAS_TOUCHSCREEN_ADS7843_LH7 help Say Y here if you are using Logic Product Development's LPD7A400 CardEngine. For the time being, the LPD7A400 and @@ -23,6 +24,7 @@ config MACH_LPD7A404 bool "LPD7A404 Card Engine" select ARCH_LH7A404 # select IDE_POLL + select HAS_TOUCHSCREEN_ADC_LH7 help Say Y here if you are using Logic Product Development's LPD7A404 CardEngine. For the time being, the LPD7A400 and @@ -34,6 +36,9 @@ config ARCH_LH7A400 config ARCH_LH7A404 bool +config LPD7A40X_CPLD_SSP + bool + config LH7A40X_CONTIGMEM bool "Disable NUMA Support" depends on ARCH_LH7A40X diff --git a/arch/arm/mach-lh7a40x/Makefile b/arch/arm/mach-lh7a40x/Makefile index e90512dbc2d..94b8615fb3c 100644 --- a/arch/arm/mach-lh7a40x/Makefile +++ b/arch/arm/mach-lh7a40x/Makefile @@ -4,11 +4,14 @@ # Object file lists. -obj-y := time.o -obj-$(CONFIG_MACH_KEV7A400) += arch-kev7a400.o irq-lh7a400.o -obj-$(CONFIG_MACH_LPD7A400) += arch-lpd7a40x.o irq-lh7a400.o -obj-$(CONFIG_MACH_LPD7A404) += arch-lpd7a40x.o irq-lh7a404.o - -obj-m := -obj-n := -obj- := +obj-y := time.o clocks.o +obj-m := +obj-n := +obj- := + +obj-$(CONFIG_MACH_KEV7A400) += arch-kev7a400.o irq-lh7a400.o +obj-$(CONFIG_MACH_LPD7A400) += arch-lpd7a40x.o irq-lh7a400.o +obj-$(CONFIG_MACH_LPD7A404) += arch-lpd7a40x.o irq-lh7a404.o +obj-$(CONFIG_LPD7A40X_CPLD_SSP) += ssp-cpld.o +obj-$(CONFIG_FB_ARMCLCD) += clcd.o + diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c index 12e23277c5e..35c3606a207 100644 --- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c @@ -12,6 +12,7 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <asm/hardware.h> #include <asm/setup.h> @@ -23,6 +24,28 @@ #include "common.h" +#define CPLD_INT_NETHERNET (1<<0) +#define CPLD_INTMASK_ETHERNET (1<<2) +#if defined (CONFIG_MACH_LPD7A400) +# define CPLD_INT_NTOUCH (1<<1) +# define CPLD_INTMASK_TOUCH (1<<3) +# define CPLD_INT_PEN (1<<4) +# define CPLD_INTMASK_PEN (1<<4) +# define CPLD_INT_PIRQ (1<<4) +#endif +#define CPLD_INTMASK_CPLD (1<<7) +#define CPLD_INT_CPLD (1<<6) + +#define CPLD_CONTROL_SWINT (1<<7) /* Disable all CPLD IRQs */ +#define CPLD_CONTROL_OCMSK (1<<6) /* Mask USB1 connect IRQ */ +#define CPLD_CONTROL_PDRV (1<<5) /* PCC_nDRV high */ +#define CPLD_CONTROL_USB1C (1<<4) /* USB1 connect IRQ active */ +#define CPLD_CONTROL_USB1P (1<<3) /* USB1 power disable */ +#define CPLD_CONTROL_AWKP (1<<2) /* Auto-wakeup disabled */ +#define CPLD_CONTROL_LCD_ENABLE (1<<1) /* LCD Vee enable */ +#define CPLD_CONTROL_WRLAN_NENABLE (1<<0) /* SMC91x power disable */ + + static struct resource smc91x_resources[] = { [0] = { .start = CPLD00_PHYS, @@ -48,12 +71,12 @@ static struct platform_device smc91x_device = { static struct resource lh7a40x_usbclient_resources[] = { [0] = { .start = USB_PHYS, - .end = (USB_PHYS + 0xFF), + .end = (USB_PHYS + PAGE_SIZE), .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_USBINTR, - .end = IRQ_USBINTR, + .start = IRQ_USB, + .end = IRQ_USB, .flags = IORESOURCE_IRQ, }, }; @@ -61,7 +84,8 @@ static struct resource lh7a40x_usbclient_resources[] = { static u64 lh7a40x_usbclient_dma_mask = 0xffffffffUL; static struct platform_device lh7a40x_usbclient_device = { - .name = "lh7a40x_udc", +// .name = "lh7a40x_udc", + .name = "lh7-udc", .id = 0, .dev = { .dma_mask = &lh7a40x_usbclient_dma_mask, @@ -101,7 +125,7 @@ static struct platform_device lh7a404_usbhost_device = { #endif -static struct platform_device *lpd7a40x_devs[] __initdata = { +static struct platform_device* lpd7a40x_devs[] __initdata = { &smc91x_device, &lh7a40x_usbclient_device, #if defined (CONFIG_ARCH_LH7A404) @@ -113,29 +137,52 @@ extern void lpd7a400_map_io (void); static void __init lpd7a40x_init (void) { - CPLD_CONTROL |= (1<<6); /* Mask USB1 connection IRQ */ +#if defined (CONFIG_MACH_LPD7A400) + CPLD_CONTROL |= 0 + | CPLD_CONTROL_SWINT /* Disable software interrupt */ + | CPLD_CONTROL_OCMSK; /* Mask USB1 connection IRQ */ CPLD_CONTROL &= ~(0 - | (1<<1) /* Disable LCD */ - | (1<<0) /* Enable WLAN */ + | CPLD_CONTROL_LCD_ENABLE /* Disable LCD */ + | CPLD_CONTROL_WRLAN_NENABLE /* Enable SMC91x */ ); +#endif + +#if defined (CONFIG_MACH_LPD7A404) + CPLD_CONTROL &= ~(0 + | CPLD_CONTROL_WRLAN_NENABLE /* Enable SMC91x */ + ); +#endif platform_add_devices (lpd7a40x_devs, ARRAY_SIZE (lpd7a40x_devs)); +#if defined (CONFIG_FB_ARMCLCD) + lh7a40x_clcd_init (); +#endif } static void lh7a40x_ack_cpld_irq (u32 irq) { - /* CPLD doesn't have ack capability */ + /* CPLD doesn't have ack capability, but some devices may */ + +#if defined (CPLD_INTMASK_TOUCH) + /* The touch control *must* mask the the interrupt because the + * interrupt bit is read by the driver to determine if the pen + * is still down. */ + if (irq == IRQ_TOUCH) + CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH; +#endif } static void lh7a40x_mask_cpld_irq (u32 irq) { switch (irq) { case IRQ_LPD7A40X_ETH_INT: - CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4; + CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET; break; - case IRQ_LPD7A400_TS: - CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x8; +#if defined (IRQ_TOUCH) + case IRQ_TOUCH: + CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH; break; +#endif } } @@ -143,11 +190,13 @@ static void lh7a40x_unmask_cpld_irq (u32 irq) { switch (irq) { case IRQ_LPD7A40X_ETH_INT: - CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4; + CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET; break; - case IRQ_LPD7A400_TS: - CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x8; +#if defined (IRQ_TOUCH) + case IRQ_TOUCH: + CPLD_INTERRUPTS &= ~CPLD_INTMASK_TOUCH; break; +#endif } } @@ -164,11 +213,13 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc, desc->chip->ack (irq); - if ((mask & 0x1) == 0) /* WLAN */ + if ((mask & (1<<0)) == 0) /* WLAN */ IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); - if ((mask & 0x2) == 0) /* Touch */ - IRQ_DISPATCH (IRQ_LPD7A400_TS); +#if defined (IRQ_TOUCH) + if ((mask & (1<<1)) == 0) /* Touch */ + IRQ_DISPATCH (IRQ_TOUCH); +#endif desc->chip->unmask (irq); /* Level-triggered need this */ } @@ -204,9 +255,21 @@ void __init lh7a40x_init_board_irq (void) /* Then, configure CPLD interrupt */ - CPLD_INTERRUPTS = 0x9c; /* Disable all CPLD interrupts */ + /* Disable all CPLD interrupts */ +#if defined (CONFIG_MACH_LPD7A400) + CPLD_INTERRUPTS = CPLD_INTMASK_TOUCH | CPLD_INTMASK_PEN + | CPLD_INTMASK_ETHERNET; + /* *** FIXME: don't know why we need 7 and 4. 7 is way wrong + and 4 is uncefined. */ + // (1<<7)|(1<<4)|(1<<3)|(1<<2); +#endif +#if defined (CONFIG_MACH_LPD7A404) + CPLD_INTERRUPTS = CPLD_INTMASK_ETHERNET; + /* *** FIXME: don't know why we need 6 and 5, neither is defined. */ + // (1<<6)|(1<<5)|(1<<3); +#endif GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */ - GPIO_INTTYPE1 |= (1 << pinCPLD); /* Edge triggered */ + GPIO_INTTYPE1 &= ~(1 << pinCPLD); /* Level triggered */ GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */ barrier (); GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */ @@ -216,7 +279,7 @@ void __init lh7a40x_init_board_irq (void) for (irq = IRQ_BOARD_START; irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) { set_irq_chip (irq, &lpd7a40x_cpld_chip); - set_irq_handler (irq, do_edge_IRQ); + set_irq_handler (irq, do_level_IRQ); set_irq_flags (irq, IRQF_VALID); } @@ -226,91 +289,109 @@ void __init lh7a40x_init_board_irq (void) lpd7a40x_cpld_handler); } -static struct map_desc lpd7a400_io_desc[] __initdata = { +static struct map_desc lpd7a40x_io_desc[] __initdata = { { - .virtual = IO_VIRT, + .virtual = IO_VIRT, .pfn = __phys_to_pfn(IO_PHYS), - .length = IO_SIZE, + .length = IO_SIZE, .type = MT_DEVICE - }, { /* Mapping added to work around chip select problems */ + }, + { /* Mapping added to work around chip select problems */ .virtual = IOBARRIER_VIRT, .pfn = __phys_to_pfn(IOBARRIER_PHYS), .length = IOBARRIER_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CF_VIRT, .pfn = __phys_to_pfn(CF_PHYS), - .length = CF_SIZE, + .length = CF_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD02_VIRT, .pfn = __phys_to_pfn(CPLD02_PHYS), - .length = CPLD02_SIZE, + .length = CPLD02_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD06_VIRT, .pfn = __phys_to_pfn(CPLD06_PHYS), - .length = CPLD06_SIZE, + .length = CPLD06_SIZE, + .type = MT_DEVICE + }, + { + .virtual = CPLD08_VIRT, + .pfn = __phys_to_pfn(CPLD08_PHYS), + .length = CPLD08_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD08_VIRT, .pfn = __phys_to_pfn(CPLD08_PHYS), - .length = CPLD08_SIZE, + .length = CPLD08_SIZE, .type = MT_DEVICE - }, { + }, + { + .virtual = CPLD0A_VIRT, + .pfn = __phys_to_pfn(CPLD0A_PHYS), + .length = CPLD0A_SIZE, + .type = MT_DEVICE + }, + { .virtual = CPLD0C_VIRT, .pfn = __phys_to_pfn(CPLD0C_PHYS), - .length = CPLD0C_SIZE, + .length = CPLD0C_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD0E_VIRT, .pfn = __phys_to_pfn(CPLD0E_PHYS), - .length = CPLD0E_SIZE, + .length = CPLD0E_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD10_VIRT, .pfn = __phys_to_pfn(CPLD10_PHYS), - .length = CPLD10_SIZE, + .length = CPLD10_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD12_VIRT, .pfn = __phys_to_pfn(CPLD12_PHYS), - .length = CPLD12_SIZE, + .length = CPLD12_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD14_VIRT, .pfn = __phys_to_pfn(CPLD14_PHYS), - .length = CPLD14_SIZE, + .length = CPLD14_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD16_VIRT, .pfn = __phys_to_pfn(CPLD16_PHYS), - .length = CPLD16_SIZE, + .length = CPLD16_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD18_VIRT, .pfn = __phys_to_pfn(CPLD18_PHYS), - .length = CPLD18_SIZE, + .length = CPLD18_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD1A_VIRT, .pfn = __phys_to_pfn(CPLD1A_PHYS), - .length = CPLD1A_SIZE, + .length = CPLD1A_SIZE, .type = MT_DEVICE }, - /* This mapping is redundant since the smc driver performs another. */ -/* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */ }; void __init -lpd7a400_map_io(void) +lpd7a40x_map_io(void) { - iotable_init (lpd7a400_io_desc, ARRAY_SIZE (lpd7a400_io_desc)); - - /* Fixup (improve) Static Memory Controller settings */ - SMC_BCR0 = 0x200039af; /* Boot Flash */ - SMC_BCR6 = 0x1000fbe0; /* CPLD */ - SMC_BCR7 = 0x1000b2c2; /* Compact Flash */ + iotable_init (lpd7a40x_io_desc, ARRAY_SIZE (lpd7a40x_io_desc)); } #ifdef CONFIG_MACH_LPD7A400 @@ -320,7 +401,7 @@ MACHINE_START (LPD7A400, "Logic Product Development LPD7A400-10") .phys_io = 0x80000000, .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, .boot_params = 0xc0000100, - .map_io = lpd7a400_map_io, + .map_io = lpd7a40x_map_io, .init_irq = lh7a400_init_irq, .timer = &lh7a40x_timer, .init_machine = lpd7a40x_init, @@ -335,7 +416,7 @@ MACHINE_START (LPD7A404, "Logic Product Development LPD7A404-10") .phys_io = 0x80000000, .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, .boot_params = 0xc0000100, - .map_io = lpd7a400_map_io, + .map_io = lpd7a40x_map_io, .init_irq = lh7a404_init_irq, .timer = &lh7a40x_timer, .init_machine = lpd7a40x_init, diff --git a/arch/arm/mach-lh7a40x/clcd.c b/arch/arm/mach-lh7a40x/clcd.c new file mode 100644 index 00000000000..93751fee793 --- /dev/null +++ b/arch/arm/mach-lh7a40x/clcd.c @@ -0,0 +1,241 @@ +/* + * arch/arm/mach-lh7a40x/clcd.c + * + * Copyright (C) 2004 Marc Singer + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ +#include <linux/config.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/dma-mapping.h> +#include <linux/sysdev.h> +#include <linux/interrupt.h> + +//#include <linux/module.h> +//#include <linux/time.h> +//#include <asm/hardware.h> + +//#include <asm/mach/time.h> +#include <asm/irq.h> +#include <asm/mach/irq.h> + +#include <asm/system.h> +#include <asm/hardware.h> +#include <linux/amba/bus.h> +#include <linux/amba/clcd.h> + +#define HRTFTC_HRSETUP __REG(HRTFTC_PHYS + 0x00) +#define HRTFTC_HRCON __REG(HRTFTC_PHYS + 0x04) +#define HRTFTC_HRTIMING1 __REG(HRTFTC_PHYS + 0x08) +#define HRTFTC_HRTIMING2 __REG(HRTFTC_PHYS + 0x0c) + +#define ALI_SETUP __REG(ALI_PHYS + 0x00) +#define ALI_CONTROL __REG(ALI_PHYS + 0x04) +#define ALI_TIMING1 __REG(ALI_PHYS + 0x08) +#define ALI_TIMING2 __REG(ALI_PHYS + 0x0c) + +#include "lcd-panel.h" + +static void lh7a40x_clcd_disable (struct clcd_fb *fb) +{ +#if defined (CONFIG_MACH_LPD7A400) + CPLD_CONTROL &= ~(1<<1); /* Disable LCD Vee */ +#endif + +#if defined (CONFIG_MACH_LPD7A404) + GPIO_PCD &= ~(1<<3); /* Disable LCD Vee */ +#endif + +#if defined (CONFIG_ARCH_LH7A400) + HRTFTC_HRSETUP &= ~(1<<13); /* Disable HRTFT controller */ +#endif + +#if defined (CONFIG_ARCH_LH7A404) + ALI_SETUP &= ~(1<<13); /* Disable ALI */ +#endif +} + +static void lh7a40x_clcd_enable (struct clcd_fb *fb) +{ + struct clcd_panel_extra* extra + = (struct clcd_panel_extra*) fb->board_data; + +#if defined (CONFIG_MACH_LPD7A400) + CPLD_CONTROL |= (1<<1); /* Enable LCD Vee */ +#endif + +#if defined (CONFIG_MACH_LPD7A404) + GPIO_PCDD &= ~(1<<3); /* Enable LCD Vee */ + GPIO_PCD |= (1<<3); +#endif + +#if defined (CONFIG_ARCH_LH7A400) + + if (extra) { + HRTFTC_HRSETUP + = (1 << 13) + | ((fb->fb.var.xres - 1) << 4) + | 0xc + | (extra->hrmode ? 1 : 0); + HRTFTC_HRCON + = ((extra->clsen ? 1 : 0) << 1) + | ((extra->spsen ? 1 : 0) << 0); + HRTFTC_HRTIMING1 + = (extra->pcdel << 8) + | (extra->revdel << 4) + | (extra->lpdel << 0); + HRTFTC_HRTIMING2 + = (extra->spldel << 9) + | (extra->pc2del << 0); + } + else + HRTFTC_HRSETUP + = (1 << 13) + | 0xc; +#endif + +#if defined (CONFIG_ARCH_LH7A404) + + if (extra) { + ALI_SETUP + = (1 << 13) + | ((fb->fb.var.xres - 1) << 4) + | 0xc + | (extra->hrmode ? 1 : 0); + ALI_CONTROL + = ((extra->clsen ? 1 : 0) << 1) + | ((extra->spsen ? 1 : 0) << 0); + ALI_TIMING1 + = (extra->pcdel << 8) + | (extra->revdel << 4) + | (extra->lpdel << 0); + ALI_TIMING2 + = (extra->spldel << 9) + | (extra->pc2del << 0); + } + else + ALI_SETUP + = (1 << 13) + | 0xc; +#endif + +} + +#define FRAMESIZE(s) (((s) + PAGE_SIZE - 1)&PAGE_MASK) + +static int lh7a40x_clcd_setup (struct clcd_fb *fb) +{ + dma_addr_t dma; + u32 len = FRAMESIZE (lcd_panel.mode.xres*lcd_panel.mode.yres + *(lcd_panel.bpp/8)); + + fb->panel = &lcd_panel; + + /* Enforce the sync polarity defaults */ + if (!(fb->panel->tim2 & TIM2_IHS)) + fb->fb.var.sync |= FB_SYNC_HOR_HIGH_ACT; + if (!(fb->panel->tim2 & TIM2_IVS)) + fb->fb.var.sync |= FB_SYNC_VERT_HIGH_ACT; + +#if defined (HAS_LCD_PANEL_EXTRA) + fb->board_data = &lcd_panel_extra; +#endif + + fb->fb.screen_base + = dma_alloc_writecombine (&fb->dev->dev, len, + &dma, GFP_KERNEL); + printk ("CLCD: LCD setup fb virt 0x%p phys 0x%p l %x io 0x%p \n", + fb->fb.screen_base, (void*) dma, len, + (void*) io_p2v (CLCDC_PHYS)); + printk ("CLCD: pixclock %d\n", lcd_panel.mode.pixclock); + + if (!fb->fb.screen_base) { + printk(KERN_ERR "CLCD: unable to map framebuffer\n"); + return -ENOMEM; + } + +#if defined (USE_RGB555) + fb->fb.var.green.length = 5; /* Panel uses RGB 5:5:5 */ +#endif + + fb->fb.fix.smem_start = dma; + fb->fb.fix.smem_len = len; + + /* Drive PE4 high to prevent CPLD crash */ + GPIO_PEDD |= (1<<4); + GPIO_PED |= (1<<4); + + GPIO_PINMUX |= (1<<1) | (1<<0); /* LCDVD[15:4] */ + +// fb->fb.fbops->fb_check_var (&fb->fb.var, &fb->fb); +// fb->fb.fbops->fb_set_par (&fb->fb); + + return 0; +} + +static int lh7a40x_clcd_mmap (struct clcd_fb *fb, struct vm_area_struct *vma) +{ + return dma_mmap_writecombine(&fb->dev->dev, vma, + fb->fb.screen_base, + fb->fb.fix.smem_start, + fb->fb.fix.smem_len); +} + +static void lh7a40x_clcd_remove (struct clcd_fb *fb) +{ + dma_free_writecombine (&fb->dev->dev, fb->fb.fix.smem_len, + fb->fb.screen_base, fb->fb.fix.smem_start); +} + +static struct clcd_board clcd_platform_data = { + .name = "lh7a40x FB", + .check = clcdfb_check, + .decode = clcdfb_decode, + .enable = lh7a40x_clcd_enable, + .setup = lh7a40x_clcd_setup, + .mmap = lh7a40x_clcd_mmap, + .remove = lh7a40x_clcd_remove, + .disable = lh7a40x_clcd_disable, +}; + +#define IRQ_CLCDC (IRQ_LCDINTR) + +#define AMBA_DEVICE(name,busid,base,plat,pid) \ +static struct amba_device name##_device = { \ + .dev = { \ + .coherent_dma_mask = ~0, \ + .bus_id = busid, \ + .platform_data = plat, \ + }, \ + .res = { \ + .start = base##_PHYS, \ + .end = (base##_PHYS) + (4*1024) - 1, \ + .flags = IORESOURCE_MEM, \ + }, \ + .dma_mask = ~0, \ + .irq = { IRQ_##base, }, \ + /* .dma = base##_DMA,*/ \ + .periphid = pid, \ +} + +AMBA_DEVICE(clcd, "cldc-lh7a40x", CLCDC, &clcd_platform_data, 0x41110); + +static struct amba_device *amba_devs[] __initdata = { + &clcd_device, +}; + +void __init lh7a40x_clcd_init (void) +{ + int i; + int result; + printk ("CLCD: registering amba devices\n"); + for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { + struct amba_device *d = amba_devs[i]; + result = amba_device_register(d, &iomem_resource); + printk (" %d -> %d\n", i ,result); + } +} diff --git a/arch/arm/mach-lh7a40x/clocks.c b/arch/arm/mach-lh7a40x/clocks.c new file mode 100644 index 00000000000..2291afe9f23 --- /dev/null +++ b/arch/arm/mach-lh7a40x/clocks.c @@ -0,0 +1,199 @@ +/* arch/arm/mach-lh7a40x/clocks.c + * + * Copyright (C) 2004 Marc Singer + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ + +#include <linux/config.h> +#include <linux/cpufreq.h> +#include <asm/hardware.h> +#include <asm/arch/clocks.h> +#include <linux/err.h> + +struct module; +struct icst525_params; + +struct clk { + struct list_head node; + unsigned long rate; + struct module *owner; + const char *name; +// void *data; +// const struct icst525_params *params; +// void (*setvco)(struct clk *, struct icst525_vco vco); +}; + +int clk_register(struct clk *clk); +void clk_unregister(struct clk *clk); + +/* ----- */ + +#define MAINDIV1(c) (((c) >> 7) & 0x0f) +#define MAINDIV2(c) (((c) >> 11) & 0x1f) +#define PS(c) (((c) >> 18) & 0x03) +#define PREDIV(c) (((c) >> 2) & 0x1f) +#define HCLKDIV(c) (((c) >> 0) & 0x02) +#define PCLKDIV(c) (((c) >> 16) & 0x03) + +unsigned int cpufreq_get (unsigned int cpu) /* in kHz */ +{ + return fclkfreq_get ()/1000; +} +EXPORT_SYMBOL(cpufreq_get); + +unsigned int fclkfreq_get (void) +{ + unsigned int clkset = CSC_CLKSET; + unsigned int gclk + = XTAL_IN + / (1 << PS(clkset)) + * (MAINDIV1(clkset) + 2) + / (PREDIV(clkset) + 2) + * (MAINDIV2(clkset) + 2) + ; + return gclk; +} + +unsigned int hclkfreq_get (void) +{ + unsigned int clkset = CSC_CLKSET; + unsigned int hclk = fclkfreq_get () / (HCLKDIV(clkset) + 1); + + return hclk; +} + +unsigned int pclkfreq_get (void) +{ + unsigned int clkset = CSC_CLKSET; + int pclkdiv = PCLKDIV(clkset); + unsigned int pclk; + if (pclkdiv == 0x3) + pclkdiv = 0x2; + pclk = hclkfreq_get () / (1 << pclkdiv); + + return pclk; +} + +/* ----- */ + +static LIST_HEAD(clocks); +static DECLARE_MUTEX(clocks_sem); + +struct clk *clk_get (struct device *dev, const char *id) +{ + struct clk *p; + struct clk *clk = ERR_PTR(-ENOENT); + + down (&clocks_sem); + list_for_each_entry (p, &clocks, node) { + if (strcmp (id, p->name) == 0 + && try_module_get(p->owner)) { + clk = p; + break; + } + } + up (&clocks_sem); + + return clk; +} +EXPORT_SYMBOL(clk_get); + +void clk_put (struct clk *clk) +{ + module_put(clk->owner); +} +EXPORT_SYMBOL(clk_put); + +int clk_enable (struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable (struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_disable); + +int clk_use (struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_use); + +void clk_unuse (struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_unuse); + +unsigned long clk_get_rate (struct clk *clk) +{ + return clk->rate; +} +EXPORT_SYMBOL(clk_get_rate); + +long clk_round_rate (struct clk *clk, unsigned long rate) +{ + return rate; +} +EXPORT_SYMBOL(clk_round_rate); + +int clk_set_rate (struct clk *clk, unsigned long rate) +{ + int ret = -EIO; + return ret; +} +EXPORT_SYMBOL(clk_set_rate); + +#if 0 +/* + * These are fixed clocks. + */ +static struct clk kmi_clk = { + .name = "KMIREFCLK", + .rate = 24000000, +}; + +static struct clk uart_clk = { + .name = "UARTCLK", + .rate = 24000000, +}; + +static struct clk mmci_clk = { + .name = "MCLK", + .rate = 33000000, +}; +#endif + +static struct clk clcd_clk = { + .name = "CLCDCLK", + .rate = 0, +}; + +int clk_register (struct clk *clk) +{ + down (&clocks_sem); + list_add (&clk->node, &clocks); + up (&clocks_sem); + return 0; +} +EXPORT_SYMBOL(clk_register); + +void clk_unregister (struct clk *clk) +{ + down (&clocks_sem); + list_del (&clk->node); + up (&clocks_sem); +} +EXPORT_SYMBOL(clk_unregister); + +static int __init clk_init (void) +{ + clk_register(&clcd_clk); + return 0; +} +arch_initcall(clk_init); diff --git a/arch/arm/mach-lh7a40x/common.h b/arch/arm/mach-lh7a40x/common.h index ea8de7e3ab1..18e8bb4eb20 100644 --- a/arch/arm/mach-lh7a40x/common.h +++ b/arch/arm/mach-lh7a40x/common.h @@ -12,6 +12,7 @@ extern struct sys_timer lh7a40x_timer; extern void lh7a400_init_irq (void); extern void lh7a404_init_irq (void); +extern void lh7a40x_clcd_init (void); extern void lh7a40x_init_board_irq (void); #define IRQ_DISPATCH(irq) desc_handle_irq((irq),(irq_desc + irq), regs) diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c index e902e3d87da..2685a81454d 100644 --- a/arch/arm/mach-lh7a40x/irq-lh7a404.c +++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c @@ -28,13 +28,17 @@ static unsigned char irq_pri_vic1[] = { #if defined (USE_PRIORITIES) -IRQ_GPIO3INTR, + IRQ_GPIO3INTR, /* CPLD */ + IRQ_DMAM2P4, IRQ_DMAM2P5, /* AC97 */ #endif }; static unsigned char irq_pri_vic2[] = { #if defined (USE_PRIORITIES) - IRQ_T3UI, IRQ_GPIO7INTR, + IRQ_T3UI, /* Timer */ + IRQ_GPIO7INTR, /* CPLD */ IRQ_UART1INTR, IRQ_UART2INTR, IRQ_UART3INTR, + IRQ_LCDINTR, /* LCD */ + IRQ_TSCINTR, /* ADC/Touchscreen */ #endif }; @@ -98,10 +102,19 @@ static struct irqchip lh7a404_gpio_vic2_chip = { /* IRQ initialization */ +#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) +extern void* branch_irq_lh7a400; +#endif + void __init lh7a404_init_irq (void) { int irq; +#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) +#define NOP 0xe1a00000 /* mov r0, r0 */ + branch_irq_lh7a400 = NOP; +#endif + VIC1_INTENCLR = 0xffffffff; VIC2_INTENCLR = 0xffffffff; VIC1_INTSEL = 0; /* All IRQs */ diff --git a/arch/arm/mach-lh7a40x/lcd-panel.h b/arch/arm/mach-lh7a40x/lcd-panel.h new file mode 100644 index 00000000000..4fb2efc4950 --- /dev/null +++ b/arch/arm/mach-lh7a40x/lcd-panel.h @@ -0,0 +1,346 @@ +/* lcd-panel.h + $Id$ + + written by Marc Singer + 18 Jul 2005 + + Copyright (C) 2005 Marc Singer + + ----------- + DESCRIPTION + ----------- + + Only one panel may be defined at a time. + + The pixel clock is calculated to be no greater than the target. + + Each timing value is accompanied by a specification comment. + + UNITS/MIN/TYP/MAX + + Most of the units will be in clocks. + + USE_RGB555 + + Define this macro to configure the AMBA LCD controller to use an + RGB555 encoding for the pels instead of the normal RGB565. + + LPD9520, LPD79524, LPD7A400, LPD7A404-10, LPD7A404-11 + + These boards are best approximated by 555 for all panels. Some + can use an extra low-order bit of blue in bit 16 of the color + value, but we don't have a way to communicate this non-linear + mapping to the kernel. + +*/ + +#if !defined (__LCD_PANEL_H__) +# define __LCD_PANEL_H__ + +#if defined (MACH_LPD79520)\ + || defined (MACH_LPD79524)\ + || defined (MACH_LPD7A400)\ + || defined (MACH_LPD7A404) +# define USE_RGB555 +#endif + +struct clcd_panel_extra { + unsigned int hrmode; + unsigned int clsen; + unsigned int spsen; + unsigned int pcdel; + unsigned int revdel; + unsigned int lpdel; + unsigned int spldel; + unsigned int pc2del; +}; + +#define NS_TO_CLOCK(ns,c) ((((ns)*((c)/1000) + (1000000 - 1))/1000000)) +#define CLOCK_TO_DIV(e,c) (((c) + (e) - 1)/(e)) + +#if defined CONFIG_FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT + + /* Logic Product Development LCD 3.5" QVGA HRTFT -10 */ + /* Sharp PN LQ035Q7DB02 w/HRTFT controller chip */ + +#define PIX_CLOCK_TARGET (6800000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "3.5in QVGA (LQ035Q7DB02)", + .xres = 240, + .yres = 320, + .pixclock = PIX_CLOCK, + .left_margin = 16, + .right_margin = 21, + .upper_margin = 8, // line/8/8/8 + .lower_margin = 5, + .hsync_len = 61, + .vsync_len = NS_TO_CLOCK (60, PIX_CLOCK), + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IPC | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#define HAS_LCD_PANEL_EXTRA + +static struct clcd_panel_extra lcd_panel_extra = { + .hrmode = 1, + .clsen = 1, + .spsen = 1, + .pcdel = 8, + .revdel = 7, + .lpdel = 13, + .spldel = 77, + .pc2del = 208, +}; + +#endif + +#if defined CONFIG_FB_ARMCLCD_SHARP_LQ057Q3DC02 + + /* Logic Product Development LCD 5.7" QVGA -10 */ + /* Sharp PN LQ057Q3DC02 */ + /* QVGA mode, V/Q=LOW */ + +/* From Sharp on 2006.1.3. I believe some of the values are incorrect + * based on the datasheet. + + Timing0 TIMING1 TIMING2 CONTROL + 0x140A0C4C 0x080504EF 0x013F380D 0x00000829 + HBP= 20 VBP= 8 BCD= 0 + HFP= 10 VFP= 5 CPL=319 + HSW= 12 VSW= 1 IOE= 0 + PPL= 19 LPP=239 IPC= 1 + IHS= 1 + IVS= 1 + ACB= 0 + CSEL= 0 + PCD= 13 + + */ + +/* The full horozontal cycle (Th) is clock/360/400/450. */ +/* The full vertical cycle (Tv) is line/251/262/280. */ + +#define PIX_CLOCK_TARGET (6300000) /* -/6.3/7 MHz */ +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "5.7in QVGA (LQ057Q3DC02)", + .xres = 320, + .yres = 240, + .pixclock = PIX_CLOCK, + .left_margin = 11, + .right_margin = 400-11-320-2, + .upper_margin = 7, // line/7/7/7 + .lower_margin = 262-7-240-2, + .hsync_len = 2, // clk/2/96/200 + .vsync_len = 2, // line/2/-/34 + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + +#if defined CONFIG_FB_ARMCLCD_SHARP_LQ64D343 + + /* Logic Product Development LCD 6.4" VGA -10 */ + /* Sharp PN LQ64D343 */ + +/* The full horozontal cycle (Th) is clock/750/800/900. */ +/* The full vertical cycle (Tv) is line/515/525/560. */ + +#define PIX_CLOCK_TARGET (28330000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "6.4in QVGA (LQ64D343)", + .xres = 640, + .yres = 480, + .pixclock = PIX_CLOCK, + .left_margin = 32, + .right_margin = 800-32-640-96, + .upper_margin = 32, // line/34/34/34 + .lower_margin = 540-32-480-2, + .hsync_len = 96, // clk/2/96/200 + .vsync_len = 2, // line/2/-/34 + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + +#if defined CONFIG_FB_ARMCLCD_SHARP_LQ10D368 + + /* Logic Product Development LCD 10.4" VGA -10 */ + /* Sharp PN LQ10D368 */ + +#define PIX_CLOCK_TARGET (28330000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "10.4in VGA (LQ10D368)", + .xres = 640, + .yres = 480, + .pixclock = PIX_CLOCK, + .left_margin = 21, + .right_margin = 15, + .upper_margin = 34, + .lower_margin = 5, + .hsync_len = 96, + .vsync_len = 16, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + +#if defined CONFIG_FB_ARMCLCD_SHARP_LQ121S1DG41 + + /* Logic Product Development LCD 12.1" SVGA -10 */ + /* Sharp PN LQ121S1DG41, was LQ121S1DG31 */ + +/* Note that with a 99993900 Hz HCLK, it is not possible to hit the + * target clock frequency range of 35MHz to 42MHz. */ + +/* If the target pixel clock is substantially lower than the panel + * spec, this is done to prevent the LCD display from glitching when + * the CPU is under load. A pixel clock higher than 25MHz + * (empirically determined) will compete with the CPU for bus cycles + * for the Ethernet chip. However, even a pixel clock of 10MHz + * competes with Compact Flash interface during some operations + * (fdisk, e2fsck). And, at that speed the display may have a visible + * flicker. */ + +/* The full horozontal cycle (Th) is clock/832/1056/1395. */ + +#define PIX_CLOCK_TARGET (20000000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "12.1in SVGA (LQ121S1DG41)", + .xres = 800, + .yres = 600, + .pixclock = PIX_CLOCK, + .left_margin = 89, // ns/5/-/(1/PIX_CLOCK)-10 + .right_margin = 1056-800-89-128, + .upper_margin = 23, // line/23/23/23 + .lower_margin = 44, + .hsync_len = 128, // clk/2/128/200 + .vsync_len = 4, // line/2/4/6 + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + +#if defined CONFIG_FB_ARMCLCD_HITACHI + + /* Hitachi*/ + /* Submitted by Michele Da Rold <michele.darold@ecsproject.com> */ + +#define PIX_CLOCK_TARGET (49000000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "Hitachi 800x480", + .xres = 800, + .yres = 480, + .pixclock = PIX_CLOCK, + .left_margin = 88, + .right_margin = 40, + .upper_margin = 32, + .lower_margin = 11, + .hsync_len = 128, + .vsync_len = 2, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IPC | TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + + +#if defined CONFIG_FB_ARMCLCD_AUO_A070VW01_WIDE + + /* AU Optotronics A070VW01 7.0 Wide Screen color Display*/ + /* Submitted by Michele Da Rold <michele.darold@ecsproject.com> */ + +#define PIX_CLOCK_TARGET (10000000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "7.0in Wide (A070VW01)", + .xres = 480, + .yres = 234, + .pixclock = PIX_CLOCK, + .left_margin = 30, + .right_margin = 25, + .upper_margin = 14, + .lower_margin = 12, + .hsync_len = 100, + .vsync_len = 1, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IPC | TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + +#undef NS_TO_CLOCK +#undef CLOCK_TO_DIV + +#endif /* __LCD_PANEL_H__ */ diff --git a/arch/arm/mach-lh7a40x/ssp-cpld.c b/arch/arm/mach-lh7a40x/ssp-cpld.c new file mode 100644 index 00000000000..a10830186da --- /dev/null +++ b/arch/arm/mach-lh7a40x/ssp-cpld.c @@ -0,0 +1,343 @@ +/* arch/arm/mach-lh7a40x/ssp-cpld.c + * + * Copyright (C) 2004,2005 Marc Singer + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * SSP/SPI driver for the CardEngine CPLD. + * + */ + +/* NOTES + ----- + + o *** This driver is cribbed from the 7952x implementation. + Some comments may not apply. + + o This driver contains sufficient logic to control either the + serial EEPROMs or the audio codec. It is included in the kernel + to support the codec. The EEPROMs are really the responsibility + of the boot loader and should probably be left alone. + + o The code must be augmented to cope with multiple, simultaneous + clients. + o The audio codec writes to the codec chip whenever playback + starts. + o The touchscreen driver writes to the ads chip every time it + samples. + o The audio codec must write 16 bits, but the touch chip writes + are 8 bits long. + o We need to be able to keep these configurations separate while + simultaneously active. + + */ + +#include <linux/module.h> +#include <linux/kernel.h> +//#include <linux/sched.h> +#include <linux/errno.h> +#include <linux/interrupt.h> +//#include <linux/ioport.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/spinlock.h> + +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/hardware.h> + +#include <asm/arch/ssp.h> + +//#define TALK + +#if defined (TALK) +#define PRINTK(f...) printk (f) +#else +#define PRINTK(f...) do {} while (0) +#endif + +#if defined (CONFIG_ARCH_LH7A400) +# define CPLD_SPID __REGP16(CPLD06_VIRT) /* SPI data */ +# define CPLD_SPIC __REGP16(CPLD08_VIRT) /* SPI control */ +# define CPLD_SPIC_CS_CODEC (1<<0) +# define CPLD_SPIC_CS_TOUCH (1<<1) +# define CPLD_SPIC_WRITE (0<<2) +# define CPLD_SPIC_READ (1<<2) +# define CPLD_SPIC_DONE (1<<3) /* r/o */ +# define CPLD_SPIC_LOAD (1<<4) +# define CPLD_SPIC_START (1<<4) +# define CPLD_SPIC_LOADED (1<<5) /* r/o */ +#endif + +#define CPLD_SPI __REGP16(CPLD0A_VIRT) /* SPI operation */ +#define CPLD_SPI_CS_EEPROM (1<<3) +#define CPLD_SPI_SCLK (1<<2) +#define CPLD_SPI_TX_SHIFT (1) +#define CPLD_SPI_TX (1<<CPLD_SPI_TX_SHIFT) +#define CPLD_SPI_RX_SHIFT (0) +#define CPLD_SPI_RX (1<<CPLD_SPI_RX_SHIFT) + +/* *** FIXME: these timing values are substantially larger than the + *** chip requires. We may implement an nsleep () function. */ +#define T_SKH 1 /* Clock time high (us) */ +#define T_SKL 1 /* Clock time low (us) */ +#define T_CS 1 /* Minimum chip select low time (us) */ +#define T_CSS 1 /* Minimum chip select setup time (us) */ +#define T_DIS 1 /* Data setup time (us) */ + + /* EEPROM SPI bits */ +#define P_START (1<<9) +#define P_WRITE (1<<7) +#define P_READ (2<<7) +#define P_ERASE (3<<7) +#define P_EWDS (0<<7) +#define P_WRAL (0<<7) +#define P_ERAL (0<<7) +#define P_EWEN (0<<7) +#define P_A_EWDS (0<<5) +#define P_A_WRAL (1<<5) +#define P_A_ERAL (2<<5) +#define P_A_EWEN (3<<5) + +struct ssp_configuration { + int device; + int mode; + int speed; + int frame_size_write; + int frame_size_read; +}; + +static struct ssp_configuration ssp_configuration; +static spinlock_t ssp_lock; + +static void enable_cs (void) +{ + switch (ssp_configuration.device) { + case DEVICE_EEPROM: + CPLD_SPI |= CPLD_SPI_CS_EEPROM; + break; + } + udelay (T_CSS); +} + +static void disable_cs (void) +{ + switch (ssp_configuration.device) { + case DEVICE_EEPROM: + CPLD_SPI &= ~CPLD_SPI_CS_EEPROM; + break; + } + udelay (T_CS); +} + +static void pulse_clock (void) +{ + CPLD_SPI |= CPLD_SPI_SCLK; + udelay (T_SKH); + CPLD_SPI &= ~CPLD_SPI_SCLK; + udelay (T_SKL); +} + + +/* execute_spi_command + + sends an spi command to a device. It first sends cwrite bits from + v. If cread is greater than zero it will read cread bits + (discarding the leading 0 bit) and return them. If cread is less + than zero it will check for completetion status and return 0 on + success or -1 on timeout. If cread is zero it does nothing other + than sending the command. + + On the LPD7A400, we can only read or write multiples of 8 bits on + the codec and the touch screen device. Here, we round up. + +*/ + +static int execute_spi_command (int v, int cwrite, int cread) +{ + unsigned long l = 0; + +#if defined (CONFIG_MACH_LPD7A400) + /* The codec and touch devices cannot be bit-banged. Instead, + * the CPLD provides an eight-bit shift register and a crude + * interface. */ + if ( ssp_configuration.device == DEVICE_CODEC + || ssp_configuration.device == DEVICE_TOUCH) { + int select = 0; + + PRINTK ("spi(%d %d.%d) 0x%04x", + ssp_configuration.device, cwrite, cread, + v); +#if defined (TALK) + if (ssp_configuration.device == DEVICE_CODEC) + PRINTK (" 0x%03x -> %2d", v & 0x1ff, (v >> 9) & 0x7f); +#endif + PRINTK ("\n"); + + if (ssp_configuration.device == DEVICE_CODEC) + select = CPLD_SPIC_CS_CODEC; + if (ssp_configuration.device == DEVICE_TOUCH) + select = CPLD_SPIC_CS_TOUCH; + if (cwrite) { + for (cwrite = (cwrite + 7)/8; cwrite-- > 0; ) { + CPLD_SPID = (v >> (8*cwrite)) & 0xff; + CPLD_SPIC = select | CPLD_SPIC_LOAD; + while (!(CPLD_SPIC & CPLD_SPIC_LOADED)) + ; + CPLD_SPIC = select; + while (!(CPLD_SPIC & CPLD_SPIC_DONE)) + ; + } + v = 0; + } + if (cread) { + mdelay (2); /* *** FIXME: required by ads7843? */ + v = 0; + for (cread = (cread + 7)/8; cread-- > 0;) { + CPLD_SPID = 0; + CPLD_SPIC = select | CPLD_SPIC_READ + | CPLD_SPIC_START; + while (!(CPLD_SPIC & CPLD_SPIC_LOADED)) + ; + CPLD_SPIC = select | CPLD_SPIC_READ; + while (!(CPLD_SPIC & CPLD_SPIC_DONE)) + ; + v = (v << 8) | CPLD_SPID; + } + } + return v; + } +#endif + + PRINTK ("spi(%d) 0x%04x -> 0x%x\r\n", ssp_configuration.device, + v & 0x1ff, (v >> 9) & 0x7f); + + enable_cs (); + + v <<= CPLD_SPI_TX_SHIFT; /* Correction for position of SPI_TX bit */ + while (cwrite--) { + CPLD_SPI + = (CPLD_SPI & ~CPLD_SPI_TX) + | ((v >> cwrite) & CPLD_SPI_TX); + udelay (T_DIS); + pulse_clock (); + } + + if (cread < 0) { + int delay = 10; + disable_cs (); + udelay (1); + enable_cs (); + + l = -1; + do { + if (CPLD_SPI & CPLD_SPI_RX) { + l = 0; + break; + } + } while (udelay (1), --delay); + } + else + /* We pulse the clock before the data to skip the leading zero. */ + while (cread-- > 0) { + pulse_clock (); + l = (l<<1) + | (((CPLD_SPI & CPLD_SPI_RX) + >> CPLD_SPI_RX_SHIFT) & 0x1); + } + + disable_cs (); + return l; +} + +static int ssp_init (void) +{ + spin_lock_init (&ssp_lock); + memset (&ssp_configuration, 0, sizeof (ssp_configuration)); + return 0; +} + + +/* ssp_chip_select + + drops the chip select line for the CPLD shift-register controlled + devices. It doesn't enable chip + +*/ + +static void ssp_chip_select (int enable) +{ +#if defined (CONFIG_MACH_LPD7A400) + int select; + + if (ssp_configuration.device == DEVICE_CODEC) + select = CPLD_SPIC_CS_CODEC; + else if (ssp_configuration.device == DEVICE_TOUCH) + select = CPLD_SPIC_CS_TOUCH; + else + return; + + if (enable) + CPLD_SPIC = select; + else + CPLD_SPIC = 0; +#endif +} + +static void ssp_acquire (void) +{ + spin_lock (&ssp_lock); +} + +static void ssp_release (void) +{ + ssp_chip_select (0); /* just in case */ + spin_unlock (&ssp_lock); +} + +static int ssp_configure (int device, int mode, int speed, + int frame_size_write, int frame_size_read) +{ + ssp_configuration.device = device; + ssp_configuration.mode = mode; + ssp_configuration.speed = speed; + ssp_configuration.frame_size_write = frame_size_write; + ssp_configuration.frame_size_read = frame_size_read; + + return 0; +} + +static int ssp_read (void) +{ + return execute_spi_command (0, 0, ssp_configuration.frame_size_read); +} + +static int ssp_write (u16 data) +{ + execute_spi_command (data, ssp_configuration.frame_size_write, 0); + return 0; +} + +static int ssp_write_read (u16 data) +{ + return execute_spi_command (data, ssp_configuration.frame_size_write, + ssp_configuration.frame_size_read); +} + +struct ssp_driver lh7a40x_cpld_ssp_driver = { + .init = ssp_init, + .acquire = ssp_acquire, + .release = ssp_release, + .configure = ssp_configure, + .chip_select = ssp_chip_select, + .read = ssp_read, + .write = ssp_write, + .write_read = ssp_write_read, +}; + + +MODULE_AUTHOR("Marc Singer"); +MODULE_DESCRIPTION("LPD7A40X CPLD SPI driver"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c index be377e331f2..ad5652e0150 100644 --- a/arch/arm/mach-lh7a40x/time.c +++ b/arch/arm/mach-lh7a40x/time.c @@ -1,4 +1,4 @@ -/* +/* * arch/arm/mach-lh7a40x/time.c * * Copyright (C) 2004 Logic Product Development @@ -8,10 +8,10 @@ * version 2 as published by the Free Software Foundation. * */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/time.h> #include <asm/hardware.h> @@ -53,11 +53,11 @@ lh7a40x_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction lh7a40x_timer_irq = { .name = "LHA740x Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = lh7a40x_timer_interrupt, }; -static void __init lh7a40x_timer_init(void) +static void __init lh7a40x_timer_init (void) { /* Stop/disable all timers */ TIMER_CONTROL1 = 0; diff --git a/arch/arm/mach-netx/Kconfig b/arch/arm/mach-netx/Kconfig new file mode 100644 index 00000000000..3d90ef19be2 --- /dev/null +++ b/arch/arm/mach-netx/Kconfig @@ -0,0 +1,24 @@ +menu "NetX Implementations" + depends on ARCH_NETX + +config MACH_NXDKN + bool "Enable Hilscher nxdkn Eval Board support" + depends on ARCH_NETX + help + Board support for the Hilscher NetX Eval Board + +config MACH_NXDB500 + bool "Enable Hilscher nxdb500 Eval Board support" + depends on ARCH_NETX + select ARM_AMBA + help + Board support for the Hilscher nxdb500 Eval Board + +config MACH_NXEB500HMI + bool "Enable Hilscher nxeb500hmi Eval Board support" + depends on ARCH_NETX + select ARM_AMBA + help + Board support for the Hilscher nxeb500hmi Eval Board + +endmenu diff --git a/arch/arm/mach-netx/Makefile b/arch/arm/mach-netx/Makefile new file mode 100644 index 00000000000..18785ff3765 --- /dev/null +++ b/arch/arm/mach-netx/Makefile @@ -0,0 +1,15 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). + +# Object file lists. + +obj-y += time.o generic.o pfifo.o xc.o + +# Specific board support +obj-$(CONFIG_MACH_NXDKN) += nxdkn.o +obj-$(CONFIG_MACH_NXDB500) += nxdb500.o fb.o +obj-$(CONFIG_MACH_NXEB500HMI) += nxeb500hmi.o fb.o diff --git a/arch/arm/mach-netx/Makefile.boot b/arch/arm/mach-netx/Makefile.boot new file mode 100644 index 00000000000..b81cf6aff0a --- /dev/null +++ b/arch/arm/mach-netx/Makefile.boot @@ -0,0 +1,2 @@ + zreladdr-y := 0x80008000 + diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c new file mode 100644 index 00000000000..ef0ab6115c0 --- /dev/null +++ b/arch/arm/mach-netx/fb.c @@ -0,0 +1,114 @@ +/* + * arch/arm/mach-netx/fb.c + * + * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/device.h> +#include <linux/init.h> +#include <linux/dma-mapping.h> +#include <linux/amba/bus.h> +#include <linux/amba/clcd.h> + +#include <asm/arch/netx-regs.h> +#include <asm/hardware.h> + +struct clk {}; + +static struct clk fb_clk; + +static struct clcd_panel *netx_panel; + +void netx_clcd_enable(struct clcd_fb *fb) +{ +} + +int netx_clcd_setup(struct clcd_fb *fb) +{ + dma_addr_t dma; + + fb->panel = netx_panel; + + fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, 1024*1024, + &dma, GFP_KERNEL); + if (!fb->fb.screen_base) { + printk(KERN_ERR "CLCD: unable to map framebuffer\n"); + return -ENOMEM; + } + + fb->fb.fix.smem_start = dma; + fb->fb.fix.smem_len = 1024*1024; + + return 0; +} + +int netx_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) +{ + return dma_mmap_writecombine(&fb->dev->dev, vma, + fb->fb.screen_base, + fb->fb.fix.smem_start, + fb->fb.fix.smem_len); +} + +void netx_clcd_remove(struct clcd_fb *fb) +{ + dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, + fb->fb.screen_base, fb->fb.fix.smem_start); +} + +void clk_disable(struct clk *clk) +{ +} + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + return 0; +} + +int clk_enable(struct clk *clk) +{ + return 0; +} + +struct clk *clk_get(struct device *dev, const char *id) +{ + return &fb_clk; +} + +void clk_put(struct clk *clk) +{ +} + +static struct amba_device fb_device = { + .dev = { + .bus_id = "fb", + .coherent_dma_mask = ~0, + }, + .res = { + .start = 0x00104000, + .end = 0x00104fff, + .flags = IORESOURCE_MEM, + }, + .irq = { NETX_IRQ_LCD, NO_IRQ }, + .periphid = 0x10112400, +}; + +int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) +{ + netx_panel = panel; + fb_device.dev.platform_data = board; + return amba_device_register(&fb_device, &iomem_resource); +} diff --git a/arch/arm/mach-netx/fb.h b/arch/arm/mach-netx/fb.h new file mode 100644 index 00000000000..4919cf33a5f --- /dev/null +++ b/arch/arm/mach-netx/fb.h @@ -0,0 +1,24 @@ +/* + * arch/arm/mach-netx/fb.h + * + * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +void netx_clcd_enable(struct clcd_fb *fb); +int netx_clcd_setup(struct clcd_fb *fb); +int netx_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma); +void netx_clcd_remove(struct clcd_fb *fb); +int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel); diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c new file mode 100644 index 00000000000..af0b13534cf --- /dev/null +++ b/arch/arm/mach-netx/generic.c @@ -0,0 +1,193 @@ +/* + * arch/arm/mach-netx/generic.c + * + * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/device.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <asm/hardware.h> +#include <asm/mach/map.h> +#include <asm/hardware/vic.h> +#include <asm/io.h> +#include <asm/arch/netx-regs.h> +#include <asm/mach/irq.h> + +static struct map_desc netx_io_desc[] __initdata = { + { + .virtual = NETX_IO_VIRT, + .pfn = __phys_to_pfn(NETX_IO_PHYS), + .length = NETX_IO_SIZE, + .type = MT_DEVICE + } +}; + +void __init netx_map_io(void) +{ + iotable_init(netx_io_desc, ARRAY_SIZE(netx_io_desc)); +} + +static struct resource netx_rtc_resources[] = { + [0] = { + .start = 0x00101200, + .end = 0x00101220, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device netx_rtc_device = { + .name = "netx-rtc", + .id = 0, + .num_resources = ARRAY_SIZE(netx_rtc_resources), + .resource = netx_rtc_resources, +}; + +static struct platform_device *devices[] __initdata = { + &netx_rtc_device, +}; + +#if 0 +#define DEBUG_IRQ(fmt...) printk(fmt) +#else +#define DEBUG_IRQ(fmt...) while (0) {} +#endif + +static void +netx_hif_demux_handler(unsigned int irq_unused, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int irq = NETX_IRQ_HIF_CHAINED(0); + unsigned int stat; + + stat = ((readl(NETX_DPMAS_INT_EN) & + readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f; + + desc = irq_desc + NETX_IRQ_HIF_CHAINED(0); + + while (stat) { + if (stat & 1) { + DEBUG_IRQ("handling irq %d\n", irq); + desc_handle_irq(irq, desc, regs); + } + irq++; + desc++; + stat >>= 1; + } +} + +static int +netx_hif_irq_type(unsigned int _irq, unsigned int type) +{ + unsigned int val, irq; + + val = readl(NETX_DPMAS_IF_CONF1); + + irq = _irq - NETX_IRQ_HIF_CHAINED(0); + + if (type & __IRQT_RISEDGE) { + DEBUG_IRQ("rising edges\n"); + val |= (1 << 26) << irq; + } + if (type & __IRQT_FALEDGE) { + DEBUG_IRQ("falling edges\n"); + val &= ~((1 << 26) << irq); + } + if (type & __IRQT_LOWLVL) { + DEBUG_IRQ("low level\n"); + val &= ~((1 << 26) << irq); + } + if (type & __IRQT_HIGHLVL) { + DEBUG_IRQ("high level\n"); + val |= (1 << 26) << irq; + } + + writel(val, NETX_DPMAS_IF_CONF1); + + return 0; +} + +static void +netx_hif_ack_irq(unsigned int _irq) +{ + unsigned int val, irq; + + irq = _irq - NETX_IRQ_HIF_CHAINED(0); + writel((1 << 24) << irq, NETX_DPMAS_INT_STAT); + + val = readl(NETX_DPMAS_INT_EN); + val &= ~((1 << 24) << irq); + writel(val, NETX_DPMAS_INT_EN); + + DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq); +} + +static void +netx_hif_mask_irq(unsigned int _irq) +{ + unsigned int val, irq; + + irq = _irq - NETX_IRQ_HIF_CHAINED(0); + val = readl(NETX_DPMAS_INT_EN); + val &= ~((1 << 24) << irq); + writel(val, NETX_DPMAS_INT_EN); + DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq); +} + +static void +netx_hif_unmask_irq(unsigned int _irq) +{ + unsigned int val, irq; + + irq = _irq - NETX_IRQ_HIF_CHAINED(0); + val = readl(NETX_DPMAS_INT_EN); + val |= (1 << 24) << irq; + writel(val, NETX_DPMAS_INT_EN); + DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq); +} + +static struct irqchip netx_hif_chip = { + .ack = netx_hif_ack_irq, + .mask = netx_hif_mask_irq, + .unmask = netx_hif_unmask_irq, + .set_type = netx_hif_irq_type, +}; + +void __init netx_init_irq(void) +{ + int irq; + + vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0); + + for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { + set_irq_chip(irq, &netx_hif_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID); + } + + writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN); + set_irq_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler); +} + +static int __init netx_init(void) +{ + return platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +subsys_initcall(netx_init); + diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h new file mode 100644 index 00000000000..ede2d35341c --- /dev/null +++ b/arch/arm/mach-netx/generic.h @@ -0,0 +1,24 @@ +/* + * arch/arm/mach-netx/generic.h + * + * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +extern void __init netx_map_io(void); +extern void __init netx_init_irq(void); + +struct sys_timer; +extern struct sys_timer netx_timer; diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c new file mode 100644 index 00000000000..e4a133d6284 --- /dev/null +++ b/arch/arm/mach-netx/nxdb500.c @@ -0,0 +1,210 @@ +/* + * arch/arm/mach-netx/nxdb500.c + * + * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/dma-mapping.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/mtd/plat-ram.h> +#include <linux/platform_device.h> +#include <linux/amba/bus.h> +#include <linux/amba/clcd.h> + +#include <asm/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/arch/netx-regs.h> +#include <asm/arch/eth.h> + +#include "generic.h" +#include "fb.h" + +static struct clcd_panel qvga = { + .mode = { + .name = "QVGA", + .refresh = 60, + .xres = 240, + .yres = 320, + .pixclock = 187617, + .left_margin = 6, + .right_margin = 26, + .upper_margin = 0, + .lower_margin = 6, + .hsync_len = 6, + .vsync_len = 1, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = 16, + .cntl = CNTL_LCDTFT | CNTL_BGR, + .bpp = 16, + .grayscale = 0, +}; + +static inline int nxdb500_check(struct clcd_fb *fb, struct fb_var_screeninfo *var) +{ + var->green.length = 5; + var->green.msb_right = 0; + + return clcdfb_check(fb, var); +} + +static int nxdb500_clcd_setup(struct clcd_fb *fb) +{ + unsigned int val; + + fb->fb.var.green.length = 5; + fb->fb.var.green.msb_right = 0; + + /* enable asic control */ + val = readl(NETX_SYSTEM_IOC_ACCESS_KEY); + writel(val, NETX_SYSTEM_IOC_ACCESS_KEY); + + writel(3, NETX_SYSTEM_IOC_CR); + + val = readl(NETX_PIO_OUTPIO); + writel(val | 1, NETX_PIO_OUTPIO); + + val = readl(NETX_PIO_OEPIO); + writel(val | 1, NETX_PIO_OEPIO); + return netx_clcd_setup(fb); +} + +static struct clcd_board clcd_data = { + .name = "netX", + .check = nxdb500_check, + .decode = clcdfb_decode, + .enable = netx_clcd_enable, + .setup = nxdb500_clcd_setup, + .mmap = netx_clcd_mmap, + .remove = netx_clcd_remove, +}; + +static struct netxeth_platform_data eth0_platform_data = { + .xcno = 0, +}; + +static struct platform_device netx_eth0_device = { + .name = "netx-eth", + .id = 0, + .num_resources = 0, + .resource = NULL, + .dev = { + .platform_data = ð0_platform_data, + } +}; + +static struct netxeth_platform_data eth1_platform_data = { + .xcno = 1, +}; + +static struct platform_device netx_eth1_device = { + .name = "netx-eth", + .id = 1, + .num_resources = 0, + .resource = NULL, + .dev = { + .platform_data = ð1_platform_data, + } +}; + +static struct resource netx_uart0_resources[] = { + [0] = { + .start = 0x00100A00, + .end = 0x00100A3F, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = (NETX_IRQ_UART0), + .end = (NETX_IRQ_UART0), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device netx_uart0_device = { + .name = "netx-uart", + .id = 0, + .num_resources = ARRAY_SIZE(netx_uart0_resources), + .resource = netx_uart0_resources, +}; + +static struct resource netx_uart1_resources[] = { + [0] = { + .start = 0x00100A40, + .end = 0x00100A7F, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = (NETX_IRQ_UART1), + .end = (NETX_IRQ_UART1), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device netx_uart1_device = { + .name = "netx-uart", + .id = 1, + .num_resources = ARRAY_SIZE(netx_uart1_resources), + .resource = netx_uart1_resources, +}; + +static struct resource netx_uart2_resources[] = { + [0] = { + .start = 0x00100A80, + .end = 0x00100ABF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = (NETX_IRQ_UART2), + .end = (NETX_IRQ_UART2), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device netx_uart2_device = { + .name = "netx-uart", + .id = 2, + .num_resources = ARRAY_SIZE(netx_uart2_resources), + .resource = netx_uart2_resources, +}; + +static struct platform_device *devices[] __initdata = { + &netx_eth0_device, + &netx_eth1_device, + &netx_uart0_device, + &netx_uart1_device, + &netx_uart2_device, +}; + +static void __init nxdb500_init(void) +{ + netx_fb_init(&clcd_data, &qvga); + platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +MACHINE_START(NXDB500, "Hilscher nxdb500") + .phys_io = 0x00100000, + .io_pg_offst = (io_p2v(0x00100000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = netx_map_io, + .init_irq = netx_init_irq, + .timer = &netx_timer, + .init_machine = nxdb500_init, +MACHINE_END diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c new file mode 100644 index 00000000000..7e26c42d1ac --- /dev/null +++ b/arch/arm/mach-netx/nxdkn.c @@ -0,0 +1,103 @@ +/* + * arch/arm/mach-netx/nxdkn.c + * + * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/dma-mapping.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/mtd/plat-ram.h> +#include <linux/platform_device.h> +#include <linux/amba/bus.h> +#include <linux/amba/clcd.h> + +#include <asm/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/arch/netx-regs.h> +#include <asm/arch/eth.h> + +#include "generic.h" + +static struct netxeth_platform_data eth0_platform_data = { + .xcno = 0, +}; + +static struct platform_device nxdkn_eth0_device = { + .name = "netx-eth", + .id = 0, + .num_resources = 0, + .resource = NULL, + .dev = { + .platform_data = ð0_platform_data, + } +}; + +static struct netxeth_platform_data eth1_platform_data = { + .xcno = 1, +}; + +static struct platform_device nxdkn_eth1_device = { + .name = "netx-eth", + .id = 1, + .num_resources = 0, + .resource = NULL, + .dev = { + .platform_data = ð1_platform_data, + } +}; + +static struct resource netx_uart0_resources[] = { + [0] = { + .start = 0x00100A00, + .end = 0x00100A3F, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = (NETX_IRQ_UART0), + .end = (NETX_IRQ_UART0), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device netx_uart0_device = { + .name = "netx-uart", + .id = 0, + .num_resources = ARRAY_SIZE(netx_uart0_resources), + .resource = netx_uart0_resources, +}; + +static struct platform_device *devices[] __initdata = { + &nxdkn_eth0_device, + &nxdkn_eth1_device, + &netx_uart0_device, +}; + +static void __init nxdkn_init(void) +{ + platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +MACHINE_START(NXDKN, "Hilscher nxdkn") + .phys_io = 0x00100000, + .io_pg_offst = (io_p2v(0x00100000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = netx_map_io, + .init_irq = netx_init_irq, + .timer = &netx_timer, + .init_machine = nxdkn_init, +MACHINE_END diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c new file mode 100644 index 00000000000..53e10a9849f --- /dev/null +++ b/arch/arm/mach-netx/nxeb500hmi.c @@ -0,0 +1,187 @@ +/* + * arch/arm/mach-netx/nxeb500hmi.c + * + * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/dma-mapping.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/mtd/plat-ram.h> +#include <linux/platform_device.h> +#include <linux/amba/bus.h> +#include <linux/amba/clcd.h> + +#include <asm/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/arch/netx-regs.h> +#include <asm/arch/eth.h> + +#include "generic.h" +#include "fb.h" + +static struct clcd_panel qvga = { + .mode = { + .name = "QVGA", + .refresh = 60, + .xres = 240, + .yres = 320, + .pixclock = 187617, + .left_margin = 6, + .right_margin = 26, + .upper_margin = 0, + .lower_margin = 6, + .hsync_len = 6, + .vsync_len = 1, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = 16, + .cntl = CNTL_LCDTFT | CNTL_BGR, + .bpp = 16, + .grayscale = 0, +}; + +static inline int nxeb500hmi_check(struct clcd_fb *fb, struct fb_var_screeninfo *var) +{ + var->green.length = 5; + var->green.msb_right = 0; + + return clcdfb_check(fb, var); +} + +static int nxeb500hmi_clcd_setup(struct clcd_fb *fb) +{ + unsigned int val; + + fb->fb.var.green.length = 5; + fb->fb.var.green.msb_right = 0; + + /* enable asic control */ + val = readl(NETX_SYSTEM_IOC_ACCESS_KEY); + writel(val, NETX_SYSTEM_IOC_ACCESS_KEY); + + writel(3, NETX_SYSTEM_IOC_CR); + + /* GPIO 14 is used for display enable on newer boards */ + writel(9, NETX_GPIO_CFG(14)); + + val = readl(NETX_PIO_OUTPIO); + writel(val | 1, NETX_PIO_OUTPIO); + + val = readl(NETX_PIO_OEPIO); + writel(val | 1, NETX_PIO_OEPIO); + return netx_clcd_setup(fb); +} + +static struct clcd_board clcd_data = { + .name = "netX", + .check = nxeb500hmi_check, + .decode = clcdfb_decode, + .enable = netx_clcd_enable, + .setup = nxeb500hmi_clcd_setup, + .mmap = netx_clcd_mmap, + .remove = netx_clcd_remove, +}; + +static struct netxeth_platform_data eth0_platform_data = { + .xcno = 0, +}; + +static struct platform_device netx_eth0_device = { + .name = "netx-eth", + .id = 0, + .num_resources = 0, + .resource = NULL, + .dev = { + .platform_data = ð0_platform_data, + } +}; + +static struct netxeth_platform_data eth1_platform_data = { + .xcno = 1, +}; + +static struct platform_device netx_eth1_device = { + .name = "netx-eth", + .id = 1, + .num_resources = 0, + .resource = NULL, + .dev = { + .platform_data = ð1_platform_data, + } +}; + +static struct resource netx_cf_resources[] = { + [0] = { + .start = 0x20000000, + .end = 0x25ffffff, + .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, + }, +}; + +static struct platform_device netx_cf_device = { + .name = "netx-cf", + .id = 0, + .resource = netx_cf_resources, + .num_resources = ARRAY_SIZE(netx_cf_resources), +}; + +static struct resource netx_uart0_resources[] = { + [0] = { + .start = 0x00100A00, + .end = 0x00100A3F, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = (NETX_IRQ_UART0), + .end = (NETX_IRQ_UART0), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device netx_uart0_device = { + .name = "netx-uart", + .id = 0, + .num_resources = ARRAY_SIZE(netx_uart0_resources), + .resource = netx_uart0_resources, +}; + +static struct platform_device *devices[] __initdata = { + &netx_eth0_device, + &netx_eth1_device, + &netx_cf_device, + &netx_uart0_device, +}; + +static void __init nxeb500hmi_init(void) +{ + netx_fb_init(&clcd_data, &qvga); + platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi") + .phys_io = 0x00100000, + .io_pg_offst = (io_p2v(0x00100000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = netx_map_io, + .init_irq = netx_init_irq, + .timer = &netx_timer, + .init_machine = nxeb500hmi_init, +MACHINE_END diff --git a/arch/arm/mach-netx/pfifo.c b/arch/arm/mach-netx/pfifo.c new file mode 100644 index 00000000000..44dea61a9de --- /dev/null +++ b/arch/arm/mach-netx/pfifo.c @@ -0,0 +1,68 @@ +/* + * arch/arm/mach-netx/pfifo.c + * + * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> + +#include <asm/io.h> +#include <asm/hardware.h> +#include <asm/arch/netx-regs.h> +#include <asm/arch/pfifo.h> + +static DEFINE_MUTEX(pfifo_lock); + +static unsigned int pfifo_used = 0; + +int pfifo_request(unsigned int pfifo_mask) +{ + int err = 0; + unsigned int val; + + mutex_lock(&pfifo_lock); + + if (pfifo_mask & pfifo_used) { + err = -EBUSY; + goto out; + } + + pfifo_used |= pfifo_mask; + + val = readl(NETX_PFIFO_RESET); + writel(val | pfifo_mask, NETX_PFIFO_RESET); + writel(val, NETX_PFIFO_RESET); + +out: + mutex_unlock(&pfifo_lock); + return err; +} + +void pfifo_free(unsigned int pfifo_mask) +{ + mutex_lock(&pfifo_lock); + pfifo_used &= ~pfifo_mask; + mutex_unlock(&pfifo_lock); +} + +EXPORT_SYMBOL(pfifo_push); +EXPORT_SYMBOL(pfifo_pop); +EXPORT_SYMBOL(pfifo_fill_level); +EXPORT_SYMBOL(pfifo_empty); +EXPORT_SYMBOL(pfifo_request); +EXPORT_SYMBOL(pfifo_free); diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c new file mode 100644 index 00000000000..6d72c81b7d9 --- /dev/null +++ b/arch/arm/mach-netx/time.c @@ -0,0 +1,88 @@ +/* + * arch/arm/mach-netx/time.c + * + * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/init.h> +#include <linux/interrupt.h> + +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/mach/time.h> +#include <asm/arch/netx-regs.h> + +/* + * Returns number of us since last clock interrupt. Note that interrupts + * will have been disabled by do_gettimeoffset() + */ +static unsigned long netx_gettimeoffset(void) +{ + return readl(NETX_GPIO_COUNTER_CURRENT(0)) / 100; +} + +/* + * IRQ handler for the timer + */ +static irqreturn_t +netx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + write_seqlock(&xtime_lock); + + timer_tick(regs); + write_sequnlock(&xtime_lock); + + /* acknowledge interrupt */ + writel(COUNTER_BIT(0), NETX_GPIO_IRQ); + + return IRQ_HANDLED; +} + + +static struct irqaction netx_timer_irq = { + .name = "NetX Timer Tick", + .flags = IRQF_DISABLED | IRQF_TIMER, + .handler = netx_timer_interrupt, +}; + +/* + * Set up timer interrupt + */ +static void __init netx_timer_init(void) +{ + /* disable timer initially */ + writel(0, NETX_GPIO_COUNTER_CTRL(0)); + + /* Reset the timer value to zero */ + writel(0, NETX_GPIO_COUNTER_CURRENT(0)); + + writel(LATCH, NETX_GPIO_COUNTER_MAX(0)); + + /* acknowledge interrupt */ + writel(COUNTER_BIT(0), NETX_GPIO_IRQ); + + /* Enable the interrupt in the specific timer register and start timer */ + writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE); + writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN, + NETX_GPIO_COUNTER_CTRL(0)); + + setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq); +} + +struct sys_timer netx_timer = { + .init = netx_timer_init, + .offset = netx_gettimeoffset, +}; diff --git a/arch/arm/mach-netx/xc.c b/arch/arm/mach-netx/xc.c new file mode 100644 index 00000000000..172a058ddd6 --- /dev/null +++ b/arch/arm/mach-netx/xc.c @@ -0,0 +1,255 @@ +/* + * arch/arm/mach-netx/xc.c + * + * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/init.h> +#include <linux/device.h> +#include <linux/firmware.h> +#include <linux/mutex.h> + +#include <asm/io.h> +#include <asm/hardware.h> +#include <asm/arch/netx-regs.h> + +#include <asm/arch/xc.h> + +static DEFINE_MUTEX(xc_lock); + +static int xc_in_use = 0; + +struct fw_desc { + unsigned int ofs; + unsigned int size; + unsigned int patch_ofs; + unsigned int patch_entries; +}; + +struct fw_header { + unsigned int magic; + unsigned int type; + unsigned int version; + unsigned int reserved[5]; + struct fw_desc fw_desc[3]; +} __attribute__ ((packed)); + +int xc_stop(struct xc *x) +{ + writel(RPU_HOLD_PC, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS); + writel(TPU_HOLD_PC, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS); + writel(XPU_HOLD_PC, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS); + return 0; +} + +int xc_start(struct xc *x) +{ + writel(0, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS); + writel(0, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS); + writel(0, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS); + return 0; +} + +int xc_running(struct xc *x) +{ + return (readl(x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS) & RPU_HOLD_PC) + || (readl(x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS) & TPU_HOLD_PC) + || (readl(x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS) & XPU_HOLD_PC) ? + 0 : 1; +} + +int xc_reset(struct xc *x) +{ + writel(0, x->xpec_base + NETX_XPEC_PC_OFS); + return 0; +} + +static int xc_check_ptr(struct xc *x, unsigned long adr, unsigned int size) +{ + if (adr >= NETX_PA_XMAC(x->no) && + adr + size < NETX_PA_XMAC(x->no) + XMAC_MEM_SIZE) + return 0; + + if (adr >= NETX_PA_XPEC(x->no) && + adr + size < NETX_PA_XPEC(x->no) + XPEC_MEM_SIZE) + return 0; + + dev_err(x->dev, "Illegal pointer in firmware found. aborting\n"); + + return -1; +} + +static int xc_patch(struct xc *x, void *patch, int count) +{ + unsigned int val, adr; + unsigned int *data = patch; + + int i; + for (i = 0; i < count; i++) { + adr = *data++; + val = *data++; + if (xc_check_ptr(x, adr, 4) < 0) + return -EINVAL; + + writel(val, (void __iomem *)io_p2v(adr)); + } + return 0; +} + +int xc_request_firmware(struct xc *x) +{ + int ret; + char name[16]; + const struct firmware *fw; + struct fw_header *head; + unsigned int size; + int i; + void *src; + unsigned long dst; + + sprintf(name, "xc%d.bin", x->no); + + ret = request_firmware(&fw, name, x->dev); + + if (ret < 0) { + dev_err(x->dev, "request_firmware failed\n"); + return ret; + } + + head = (struct fw_header *)fw->data; + if (head->magic != 0x4e657458) { + if (head->magic == 0x5874654e) { + dev_err(x->dev, + "firmware magic is 'XteN'. Endianess problems?\n"); + ret = -ENODEV; + goto exit_release_firmware; + } + dev_err(x->dev, "unrecognized firmware magic 0x%08x\n", + head->magic); + ret = -ENODEV; + goto exit_release_firmware; + } + + x->type = head->type; + x->version = head->version; + + ret = -EINVAL; + + for (i = 0; i < 3; i++) { + src = fw->data + head->fw_desc[i].ofs; + dst = *(unsigned int *)src; + src += sizeof (unsigned int); + size = head->fw_desc[i].size - sizeof (unsigned int); + + if (xc_check_ptr(x, dst, size)) + goto exit_release_firmware; + + memcpy((void *)io_p2v(dst), src, size); + + src = fw->data + head->fw_desc[i].patch_ofs; + size = head->fw_desc[i].patch_entries; + ret = xc_patch(x, src, size); + if (ret < 0) + goto exit_release_firmware; + } + + ret = 0; + + exit_release_firmware: + release_firmware(fw); + + return ret; +} + +struct xc *request_xc(int xcno, struct device *dev) +{ + struct xc *x = NULL; + + mutex_lock(&xc_lock); + + if (xcno > 3) + goto exit; + if (xc_in_use & (1 << xcno)) + goto exit; + + x = kmalloc(sizeof (struct xc), GFP_KERNEL); + if (!x) + goto exit; + + if (!request_mem_region + (NETX_PA_XPEC(xcno), XPEC_MEM_SIZE, dev->kobj.name)) + goto exit_free; + + if (!request_mem_region + (NETX_PA_XMAC(xcno), XMAC_MEM_SIZE, dev->kobj.name)) + goto exit_release_1; + + if (!request_mem_region + (SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE, dev->kobj.name)) + goto exit_release_2; + + x->xpec_base = (void * __iomem)io_p2v(NETX_PA_XPEC(xcno)); + x->xmac_base = (void * __iomem)io_p2v(NETX_PA_XMAC(xcno)); + x->sram_base = ioremap(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE); + if (!x->sram_base) + goto exit_release_3; + + x->irq = NETX_IRQ_XPEC(xcno); + + x->no = xcno; + x->dev = dev; + + xc_in_use |= (1 << xcno); + + goto exit; + + exit_release_3: + release_mem_region(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE); + exit_release_2: + release_mem_region(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE); + exit_release_1: + release_mem_region(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE); + exit_free: + kfree(x); + x = NULL; + exit: + mutex_unlock(&xc_lock); + return x; +} + +void free_xc(struct xc *x) +{ + int xcno = x->no; + + mutex_lock(&xc_lock); + + iounmap(x->sram_base); + release_mem_region(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE); + release_mem_region(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE); + release_mem_region(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE); + xc_in_use &= ~(1 << x->no); + kfree(x); + + mutex_unlock(&xc_lock); +} + +EXPORT_SYMBOL(free_xc); +EXPORT_SYMBOL(request_xc); +EXPORT_SYMBOL(xc_request_firmware); +EXPORT_SYMBOL(xc_reset); +EXPORT_SYMBOL(xc_running); +EXPORT_SYMBOL(xc_start); +EXPORT_SYMBOL(xc_stop); diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index f8d716ccc1d..d135568dc9e 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -62,6 +62,13 @@ config MACH_OMAP_PERSEUS2 Support for TI OMAP 730 Perseus2 board. Say Y here if you have such a board. +config MACH_OMAP_FSAMPLE + bool "TI F-Sample" + depends on ARCH_OMAP1 && ARCH_OMAP730 + help + Support for TI OMAP 850 F-Sample board. Say Y here if you have such + a board. + config MACH_VOICEBLUE bool "Voiceblue" depends on ARCH_OMAP1 && ARCH_OMAP15XX diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 9ea719550ad..7165f74f78d 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o +obj-$(CONFIG_MACH_OMAP_FSAMPLE) += board-fsample.o obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 6178f046f12..8437d065ada 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -80,8 +80,24 @@ static struct omap_uart_config ams_delta_uart_config __initdata = { .enabled_uarts = 1, }; +static struct omap_usb_config ams_delta_usb_config __initdata = { + .register_host = 1, + .hmc_mode = 16, + .pins[0] = 2, +}; + static struct omap_board_config_kernel ams_delta_config[] = { { OMAP_TAG_UART, &ams_delta_uart_config }, + { OMAP_TAG_USB, &ams_delta_usb_config }, +}; + +static struct platform_device ams_delta_led_device = { + .name = "ams-delta-led", + .id = -1 +}; + +static struct platform_device *ams_delta_devices[] __initdata = { + &ams_delta_led_device, }; static void __init ams_delta_init(void) @@ -94,6 +110,8 @@ static void __init ams_delta_init(void) /* Clear latch2 (NAND, LCD, modem enable) */ ams_delta_latch2_write(~0, 0); + + platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); } static void __init ams_delta_map_io(void) diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c new file mode 100644 index 00000000000..c753a3c5aad --- /dev/null +++ b/arch/arm/mach-omap1/board-fsample.c @@ -0,0 +1,319 @@ +/* + * linux/arch/arm/mach-omap1/board-fsample.c + * + * Modified from board-perseus2.c + * + * Original OMAP730 support by Jean Pihet <j-pihet@ti.com> + * Updated for 2.6 by Kevin Hilman <kjh@hilman.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/delay.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> +#include <linux/input.h> + +#include <asm/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/flash.h> +#include <asm/mach/map.h> + +#include <asm/arch/tc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mux.h> +#include <asm/arch/fpga.h> +#include <asm/arch/keypad.h> +#include <asm/arch/common.h> +#include <asm/arch/board.h> +#include <asm/arch/board-fsample.h> + +static int fsample_keymap[] = { + KEY(0,0,KEY_UP), + KEY(0,1,KEY_RIGHT), + KEY(0,2,KEY_LEFT), + KEY(0,3,KEY_DOWN), + KEY(0,4,KEY_CENTER), + KEY(0,5,KEY_0_5), + KEY(1,0,KEY_SOFT2), + KEY(1,1,KEY_SEND), + KEY(1,2,KEY_END), + KEY(1,3,KEY_VOLUMEDOWN), + KEY(1,4,KEY_VOLUMEUP), + KEY(1,5,KEY_RECORD), + KEY(2,0,KEY_SOFT1), + KEY(2,1,KEY_3), + KEY(2,2,KEY_6), + KEY(2,3,KEY_9), + KEY(2,4,KEY_SHARP), + KEY(2,5,KEY_2_5), + KEY(3,0,KEY_BACK), + KEY(3,1,KEY_2), + KEY(3,2,KEY_5), + KEY(3,3,KEY_8), + KEY(3,4,KEY_0), + KEY(3,5,KEY_HEADSETHOOK), + KEY(4,0,KEY_HOME), + KEY(4,1,KEY_1), + KEY(4,2,KEY_4), + KEY(4,3,KEY_7), + KEY(4,4,KEY_STAR), + KEY(4,5,KEY_POWER), + 0 +}; + +static struct resource smc91x_resources[] = { + [0] = { + .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */ + .end = H2P2_DBG_FPGA_ETHR_START + 0xf, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = INT_730_MPU_EXT_NIRQ, + .end = 0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mtd_partition nor_partitions[] = { + /* bootloader (U-Boot, etc) in first sector */ + { + .name = "bootloader", + .offset = 0, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + /* bootloader params in the next sector */ + { + .name = "params", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = 0, + }, + /* kernel */ + { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = SZ_2M, + .mask_flags = 0 + }, + /* rest of flash is a file system */ + { + .name = "rootfs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0 + }, +}; + +static struct flash_platform_data nor_data = { + .map_name = "cfi_probe", + .width = 2, + .parts = nor_partitions, + .nr_parts = ARRAY_SIZE(nor_partitions), +}; + +static struct resource nor_resource = { + .start = OMAP_CS0_PHYS, + .end = OMAP_CS0_PHYS + SZ_32M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device nor_device = { + .name = "omapflash", + .id = 0, + .dev = { + .platform_data = &nor_data, + }, + .num_resources = 1, + .resource = &nor_resource, +}; + +static struct nand_platform_data nand_data = { + .options = NAND_SAMSUNG_LP_OPTIONS, +}; + +static struct resource nand_resource = { + .start = OMAP_CS3_PHYS, + .end = OMAP_CS3_PHYS + SZ_4K - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device nand_device = { + .name = "omapnand", + .id = 0, + .dev = { + .platform_data = &nand_data, + }, + .num_resources = 1, + .resource = &nand_resource, +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = 0, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, +}; + +static struct resource kp_resources[] = { + [0] = { + .start = INT_730_MPUIO_KEYPAD, + .end = INT_730_MPUIO_KEYPAD, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct omap_kp_platform_data kp_data = { + .rows = 8, + .cols = 8, + .keymap = fsample_keymap, +}; + +static struct platform_device kp_device = { + .name = "omap-keypad", + .id = -1, + .dev = { + .platform_data = &kp_data, + }, + .num_resources = ARRAY_SIZE(kp_resources), + .resource = kp_resources, +}; + +static struct platform_device lcd_device = { + .name = "lcd_p2", + .id = -1, +}; + +static struct platform_device *devices[] __initdata = { + &nor_device, + &nand_device, + &smc91x_device, + &kp_device, + &lcd_device, +}; + +#define P2_NAND_RB_GPIO_PIN 62 + +static int nand_dev_ready(struct nand_platform_data *data) +{ + return omap_get_gpio_datain(P2_NAND_RB_GPIO_PIN); +} + +static struct omap_uart_config fsample_uart_config __initdata = { + .enabled_uarts = ((1 << 0) | (1 << 1)), +}; + +static struct omap_lcd_config fsample_lcd_config __initdata = { + .ctrl_name = "internal", +}; + +static struct omap_board_config_kernel fsample_config[] = { + { OMAP_TAG_UART, &fsample_uart_config }, + { OMAP_TAG_LCD, &fsample_lcd_config }, +}; + +static void __init omap_fsample_init(void) +{ + if (!(omap_request_gpio(P2_NAND_RB_GPIO_PIN))) + nand_data.dev_ready = nand_dev_ready; + + omap_cfg_reg(L3_1610_FLASH_CS2B_OE); + omap_cfg_reg(M8_1610_FLASH_CS2B_WE); + + platform_add_devices(devices, ARRAY_SIZE(devices)); + + omap_board_config = fsample_config; + omap_board_config_size = ARRAY_SIZE(fsample_config); + omap_serial_init(); +} + +static void __init fsample_init_smc91x(void) +{ + fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); + mdelay(50); + fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, + H2P2_DBG_FPGA_LAN_RESET); + mdelay(50); +} + +void omap_fsample_init_irq(void) +{ + omap1_init_common_hw(); + omap_init_irq(); + omap_gpio_init(); + fsample_init_smc91x(); +} + +/* Only FPGA needs to be mapped here. All others are done with ioremap */ +static struct map_desc omap_fsample_io_desc[] __initdata = { + { + .virtual = H2P2_DBG_FPGA_BASE, + .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START), + .length = H2P2_DBG_FPGA_SIZE, + .type = MT_DEVICE + }, + { + .virtual = FSAMPLE_CPLD_BASE, + .pfn = __phys_to_pfn(FSAMPLE_CPLD_START), + .length = FSAMPLE_CPLD_SIZE, + .type = MT_DEVICE + } +}; + +static void __init omap_fsample_map_io(void) +{ + omap1_map_common_io(); + iotable_init(omap_fsample_io_desc, + ARRAY_SIZE(omap_fsample_io_desc)); + + /* Early, board-dependent init */ + + /* + * Hold GSM Reset until needed + */ + omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL); + + /* + * UARTs -> done automagically by 8250 driver + */ + + /* + * CSx timings, GPIO Mux ... setup + */ + + /* Flash: CS0 timings setup */ + omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0); + omap_writel(0x00000088, OMAP730_FLASH_ACFG_0); + + /* + * Ethernet support through the debug board + * CS1 timings setup + */ + omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1); + omap_writel(0x00000000, OMAP730_FLASH_ACFG_1); + + /* + * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, + * It is used as the Ethernet controller interrupt + */ + omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9); +} + +MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") +/* Maintainer: Brian Swetland <swetland@google.com> */ + .phys_io = 0xfff00000, + .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, + .boot_params = 0x10000100, + .map_io = omap_fsample_map_io, + .init_irq = omap_fsample_init_irq, + .init_machine = omap_fsample_init, + .timer = &omap_timer, +MACHINE_END diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 4b8d0ec73cb..7b206116cd0 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -14,7 +14,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/types.h> #include <linux/init.h> #include <linux/major.h> diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index e90c137a4cf..4cbc62db5b5 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -37,6 +37,8 @@ #include <asm/arch/usb.h> #include <asm/arch/keypad.h> #include <asm/arch/common.h> +#include <asm/arch/mcbsp.h> +#include <asm/arch/omap-alsa.h> static int innovator_keymap[] = { KEY(0, 0, KEY_F1), @@ -112,6 +114,42 @@ static struct platform_device innovator_flash_device = { .resource = &innovator_flash_resource, }; +#define DEFAULT_BITPERSAMPLE 16 + +static struct omap_mcbsp_reg_cfg mcbsp_regs = { + .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), + .spcr1 = RINTM(3) | RRST, + .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | + RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), + .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), + .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | + XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, + .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), + .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), + .srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), + /*.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,*/ /* mcbsp: master */ + .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ +}; + +static struct omap_alsa_codec_config alsa_config = { + .name = "OMAP Innovator AIC23", + .mcbsp_regs_alsa = &mcbsp_regs, + .codec_configure_dev = NULL, // aic23_configure, + .codec_set_samplerate = NULL, // aic23_set_samplerate, + .codec_clock_setup = NULL, // aic23_clock_setup, + .codec_clock_on = NULL, // aic23_clock_on, + .codec_clock_off = NULL, // aic23_clock_off, + .get_default_samplerate = NULL, // aic23_get_default_samplerate, +}; + +static struct platform_device innovator_mcbsp1_device = { + .name = "omap_alsa_mcbsp", + .id = 1, + .dev = { + .platform_data = &alsa_config, + }, +}; + static struct resource innovator_kp_resources[] = { [0] = { .start = INT_KEYBOARD, @@ -139,6 +177,10 @@ static struct platform_device innovator_kp_device = { #ifdef CONFIG_ARCH_OMAP15XX +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> + + /* Only FPGA needs to be mapped here. All others are done with ioremap */ static struct map_desc innovator1510_io_desc[] __initdata = { { @@ -174,13 +216,44 @@ static struct platform_device innovator1510_lcd_device = { .id = -1, }; +static struct platform_device innovator1510_spi_device = { + .name = "spi_inn1510", + .id = -1, +}; + static struct platform_device *innovator1510_devices[] __initdata = { &innovator_flash_device, &innovator1510_smc91x_device, + &innovator_mcbsp1_device, &innovator_kp_device, &innovator1510_lcd_device, + &innovator1510_spi_device, }; +static int innovator_get_pendown_state(void) +{ + return !(fpga_read(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5)); +} + +static const struct ads7846_platform_data innovator1510_ts_info = { + .model = 7846, + .vref_delay_usecs = 100, /* internal, no capacitor */ + .x_plate_ohms = 419, + .y_plate_ohms = 486, + .get_pendown_state = innovator_get_pendown_state, +}; + +static struct spi_board_info __initdata innovator1510_boardinfo[] = { { + /* FPGA (bus "10") CS0 has an ads7846e */ + .modalias = "ads7846", + .platform_data = &innovator1510_ts_info, + .irq = OMAP1510_INT_FPGA_TS, + .max_speed_hz = 120000 /* max sample rate at 3V */ + * 26 /* command + data + overhead */, + .bus_num = 10, + .chip_select = 0, +} }; + #endif /* CONFIG_ARCH_OMAP15XX */ #ifdef CONFIG_ARCH_OMAP16XX @@ -311,6 +384,8 @@ static void __init innovator_init(void) #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap1510()) { platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices)); + spi_register_board_info(innovator1510_boardinfo, + ARRAY_SIZE(innovator1510_boardinfo)); } #endif #ifdef CONFIG_ARCH_OMAP16XX diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 1160093e8ef..b742261c97a 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -29,11 +29,10 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> -#include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> -#include <linux/input.h> #include <asm/hardware.h> #include <asm/mach-types.h> @@ -45,25 +44,10 @@ #include <asm/arch/usb.h> #include <asm/arch/mux.h> #include <asm/arch/tc.h> -#include <asm/arch/keypad.h> #include <asm/arch/common.h> #include <asm/arch/mcbsp.h> #include <asm/arch/omap-alsa.h> -static int osk_keymap[] = { - KEY(0, 0, KEY_F1), - KEY(0, 3, KEY_UP), - KEY(1, 1, KEY_LEFTCTRL), - KEY(1, 2, KEY_LEFT), - KEY(2, 0, KEY_SPACE), - KEY(2, 1, KEY_ESC), - KEY(2, 2, KEY_DOWN), - KEY(3, 2, KEY_ENTER), - KEY(3, 3, KEY_RIGHT), - 0 -}; - - static struct mtd_partition osk_partitions[] = { /* bootloader (U-Boot, etc) in first sector */ { @@ -181,48 +165,17 @@ static struct omap_alsa_codec_config alsa_config = { static struct platform_device osk5912_mcbsp1_device = { .name = "omap_alsa_mcbsp", - .id = 1, + .id = 1, .dev = { .platform_data = &alsa_config, }, }; -static struct resource osk5912_kp_resources[] = { - [0] = { - .start = INT_KEYBOARD, - .end = INT_KEYBOARD, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct omap_kp_platform_data osk_kp_data = { - .rows = 8, - .cols = 8, - .keymap = osk_keymap, -}; - -static struct platform_device osk5912_kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &osk_kp_data, - }, - .num_resources = ARRAY_SIZE(osk5912_kp_resources), - .resource = osk5912_kp_resources, -}; - -static struct platform_device osk5912_lcd_device = { - .name = "lcd_osk", - .id = -1, -}; - static struct platform_device *osk5912_devices[] __initdata = { &osk5912_flash_device, &osk5912_smc91x_device, &osk5912_cf_device, &osk5912_mcbsp1_device, - &osk5912_kp_device, - &osk5912_lcd_device, }; static void __init osk_init_smc91x(void) @@ -276,18 +229,100 @@ static struct omap_uart_config osk_uart_config __initdata = { .enabled_uarts = (1 << 0), }; +#ifdef CONFIG_OMAP_OSK_MISTRAL static struct omap_lcd_config osk_lcd_config __initdata = { .ctrl_name = "internal", }; +#endif static struct omap_board_config_kernel osk_config[] = { { OMAP_TAG_USB, &osk_usb_config }, { OMAP_TAG_UART, &osk_uart_config }, +#ifdef CONFIG_OMAP_OSK_MISTRAL { OMAP_TAG_LCD, &osk_lcd_config }, +#endif }; #ifdef CONFIG_OMAP_OSK_MISTRAL +#include <linux/input.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> + +#include <asm/arch/keypad.h> + +static const int osk_keymap[] = { + /* KEY(col, row, code) */ + KEY(0, 0, KEY_F1), /* SW4 */ + KEY(0, 3, KEY_UP), /* (sw2/up) */ + KEY(1, 1, KEY_LEFTCTRL), /* SW5 */ + KEY(1, 2, KEY_LEFT), /* (sw2/left) */ + KEY(2, 0, KEY_SPACE), /* SW3 */ + KEY(2, 1, KEY_ESC), /* SW6 */ + KEY(2, 2, KEY_DOWN), /* (sw2/down) */ + KEY(3, 2, KEY_ENTER), /* (sw2/select) */ + KEY(3, 3, KEY_RIGHT), /* (sw2/right) */ + 0 +}; + +static struct omap_kp_platform_data osk_kp_data = { + .rows = 8, + .cols = 8, + .keymap = (int *) osk_keymap, +}; + +static struct resource osk5912_kp_resources[] = { + [0] = { + .start = INT_KEYBOARD, + .end = INT_KEYBOARD, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device osk5912_kp_device = { + .name = "omap-keypad", + .id = -1, + .dev = { + .platform_data = &osk_kp_data, + }, + .num_resources = ARRAY_SIZE(osk5912_kp_resources), + .resource = osk5912_kp_resources, +}; + +static struct platform_device osk5912_lcd_device = { + .name = "lcd_osk", + .id = -1, +}; + +static struct platform_device *mistral_devices[] __initdata = { + &osk5912_kp_device, + &osk5912_lcd_device, +}; + +static int mistral_get_pendown_state(void) +{ + return !omap_get_gpio_datain(4); +} + +static const struct ads7846_platform_data mistral_ts_info = { + .model = 7846, + .vref_delay_usecs = 100, /* internal, no capacitor */ + .x_plate_ohms = 419, + .y_plate_ohms = 486, + .get_pendown_state = mistral_get_pendown_state, +}; + +static struct spi_board_info __initdata mistral_boardinfo[] = { { + /* MicroWire (bus 2) CS0 has an ads7846e */ + .modalias = "ads7846", + .platform_data = &mistral_ts_info, + .irq = OMAP_GPIO_IRQ(4), + .max_speed_hz = 120000 /* max sample rate at 3V */ + * 26 /* command + data + overhead */, + .bus_num = 2, + .chip_select = 0, +} }; + #ifdef CONFIG_PM static irqreturn_t osk_mistral_wake_interrupt(int irq, void *ignored, struct pt_regs *regs) @@ -298,14 +333,18 @@ osk_mistral_wake_interrupt(int irq, void *ignored, struct pt_regs *regs) static void __init osk_mistral_init(void) { - /* FIXME here's where to feed in framebuffer, touchpad, and - * keyboard setup ... not in the drivers for those devices! - * - * NOTE: we could actually tell if there's a Mistral board + /* NOTE: we could actually tell if there's a Mistral board * attached, e.g. by trying to read something from the ads7846. - * But this is too early for that... + * But this arch_init() code is too early for that, since we + * can't talk to the ads or even the i2c eeprom. */ + // omap_cfg_reg(P19_1610_GPIO6); // BUSY + omap_cfg_reg(P20_1610_GPIO4); // PENIRQ + set_irq_type(OMAP_GPIO_IRQ(4), IRQT_FALLING); + spi_register_board_info(mistral_boardinfo, + ARRAY_SIZE(mistral_boardinfo)); + /* the sideways button (SW1) is for use as a "wakeup" button */ omap_cfg_reg(N15_1610_MPUIO2); if (omap_request_gpio(OMAP_MPUIO(2)) == 0) { @@ -318,7 +357,7 @@ static void __init osk_mistral_init(void) */ ret = request_irq(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), &osk_mistral_wake_interrupt, - SA_SHIRQ, "mistral_wakeup", + IRQF_SHARED, "mistral_wakeup", &osk_mistral_wake_interrupt); if (ret != 0) { omap_free_gpio(OMAP_MPUIO(2)); @@ -329,6 +368,8 @@ static void __init osk_mistral_init(void) #endif } else printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n"); + + platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices)); } #else static void __init osk_mistral_init(void) { } diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 619db18144e..f1958e882e8 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -1,3 +1,4 @@ +//kernel/linux-omap-fsample/arch/arm/mach-omap1/clock.c#2 - edit change 3808 (text) /* * linux/arch/arm/mach-omap1/clock.c * @@ -20,6 +21,7 @@ #include <asm/io.h> +#include <asm/arch/cpu.h> #include <asm/arch/usb.h> #include <asm/arch/clock.h> #include <asm/arch/sram.h> @@ -270,8 +272,12 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate) /* * In most cases we should not need to reprogram DPLL. * Reprogramming the DPLL is tricky, it must be done from SRAM. + * (on 730, bit 13 must always be 1) */ - omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); + if (cpu_is_omap730()) + omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000); + else + omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); ck_dpll1.rate = ptr->pll_rate; propagate_rate(&ck_dpll1); @@ -748,7 +754,7 @@ int __init omap1_clk_init(void) printk(KERN_ERR "System frequencies not set. Check your config.\n"); /* Guess sane values (60MHz) */ omap_writew(0x2290, DPLL_CTL); - omap_writew(0x1005, ARM_CKCTL); + omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL); ck_dpll1.rate = 60000000; propagate_rate(&ck_dpll1); } @@ -761,13 +767,17 @@ int __init omap1_clk_init(void) ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); -#ifdef CONFIG_MACH_OMAP_PERSEUS2 +#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE) /* Select slicer output as OMAP input clock */ omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL); #endif /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ - omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); + /* (on 730, bit 13 must not be cleared) */ + if (cpu_is_omap730()) + omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); + else + omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); /* Put DSP/MPUI into reset until needed */ omap_writew(0, ARM_RSTCT1); diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 847329cafc5..a611c3b6395 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -9,7 +9,6 @@ * (at your option) any later version. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index aca2a120813..34eb79ee6e6 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -16,7 +16,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/types.h> #include <linux/init.h> #include <linux/kernel.h> @@ -134,7 +133,7 @@ static struct irqchip omap_fpga_irq = { * mask_ack routine for all of the FPGA interrupts has been changed from * fpga_mask_ack_irq() to fpga_ack_irq() so that the specific FPGA interrupt * being serviced is left unmasked. We can do this because the FPGA cascade - * interrupt is installed with the SA_INTERRUPT flag, which leaves all + * interrupt is installed with the IRQF_DISABLED flag, which leaves all * interrupts masked at the CPU while an FPGA interrupt handler executes. * * Limited testing indicates that this workaround appears to be effective diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index 5c637c04836..da13c3e8285 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c @@ -11,7 +11,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index be3a2a4ee2b..fab8b0b27cf 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -8,7 +8,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index a0431c00fa8..9e039845b50 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -36,7 +36,6 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/module.h> #include <linux/sched.h> diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c index 65065081591..8976fbb21f7 100644 --- a/arch/arm/mach-omap1/leds-h2p2-debug.c +++ b/arch/arm/mach-omap1/leds-h2p2-debug.c @@ -9,7 +9,6 @@ * The "surfer" expansion board and H2 sample board also have two-color * green+red LEDs (in parallel), used here for timer and idle indicators. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/kernel_stat.h> #include <linux/sched.h> diff --git a/arch/arm/mach-omap1/leds-innovator.c b/arch/arm/mach-omap1/leds-innovator.c index c8ffd1ddcde..a0cd001ac39 100644 --- a/arch/arm/mach-omap1/leds-innovator.c +++ b/arch/arm/mach-omap1/leds-innovator.c @@ -1,7 +1,6 @@ /* * linux/arch/arm/mach-omap1/leds-innovator.c */ -#include <linux/config.h> #include <linux/init.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-omap1/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c index 2c8bda847c1..3b29e59b0e6 100644 --- a/arch/arm/mach-omap1/leds-osk.c +++ b/arch/arm/mach-omap1/leds-osk.c @@ -3,7 +3,6 @@ * * LED driver for OSK, and optionally Mistral QVGA, boards */ -#include <linux/config.h> #include <linux/init.h> #include <linux/workqueue.h> diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 10fe0b3efca..fa74ef7af15 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -22,7 +22,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * */ -#include <linux/config.h> #include <linux/module.h> #include <linux/init.h> #include <asm/system.h> diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index ddf6b07dc9c..cd76185bab7 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -1,3 +1,4 @@ +//kernel/linux-omap-fsample/arch/arm/mach-omap1/pm.c#3 - integrate change 4545 (text) /* * linux/arch/arm/mach-omap1/pm.c * @@ -50,6 +51,7 @@ #include <asm/mach/irq.h> #include <asm/mach-types.h> +#include <asm/arch/cpu.h> #include <asm/arch/irqs.h> #include <asm/arch/clock.h> #include <asm/arch/sram.h> @@ -326,8 +328,9 @@ void omap_pm_suspend(void) /* stop DSP */ omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); - /* shut down dsp_ck */ - omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); + /* shut down dsp_ck */ + if (!cpu_is_omap730()) + omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); /* temporarily enabling api_ck to access DSP registers */ omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); @@ -687,7 +690,7 @@ static irqreturn_t omap_wakeup_interrupt(int irq, void * dev, static struct irqaction omap_wakeup_irq = { .name = "peripheral wakeup", - .flags = SA_INTERRUPT, + .flags = IRQF_DISABLED, .handler = omap_wakeup_interrupt }; diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 9b4cd698bec..976edfb882e 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -8,10 +8,10 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/irq.h> #include <linux/delay.h> #include <linux/serial.h> #include <linux/tty.h> @@ -253,7 +253,7 @@ static void __init omap_serial_set_port_wakeup(int gpio_nr) } omap_set_gpio_direction(gpio_nr, 1); ret = request_irq(OMAP_GPIO_IRQ(gpio_nr), &omap_serial_wake_interrupt, - SA_TRIGGER_RISING, "serial wakeup", NULL); + IRQF_TRIGGER_RISING, "serial wakeup", NULL); if (ret) { omap_free_gpio(gpio_nr); printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n", diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index e58295e2d3b..abef33d10f0 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S @@ -32,7 +32,6 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/arch/io.h> diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index a85fe6066bc..4d91b9f5108 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -33,7 +33,6 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/delay.h> @@ -94,7 +93,7 @@ static inline unsigned long long cycles_2_ns(unsigned long long cyc) * will break. On P2, the timer count rate is 6.5 MHz after programming PTV * with 0. This divides the 13MHz input by 2, and is undocumented. */ -#ifdef CONFIG_MACH_OMAP_PERSEUS2 +#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE) /* REVISIT: This ifdef construct should be replaced by a query to clock * framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz. */ @@ -178,7 +177,7 @@ static irqreturn_t omap_mpu_timer_interrupt(int irq, void *dev_id, static struct irqaction omap_mpu_timer_irq = { .name = "mpu timer", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = omap_mpu_timer_interrupt, }; @@ -192,7 +191,7 @@ static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id, static struct irqaction omap_mpu_timer1_irq = { .name = "mpu timer1 overflow", - .flags = SA_INTERRUPT, + .flags = IRQF_DISABLED, .handler = omap_mpu_timer1_interrupt, }; diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 537dd2e6d38..aab97ccf1e6 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -8,6 +8,7 @@ config ARCH_OMAP24XX config ARCH_OMAP2420 bool "OMAP2420 support" depends on ARCH_OMAP24XX + select OMAP_DM_TIMER comment "OMAP Board Type" depends on ARCH_OMAP2 diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 111eaa64258..266d88e77bd 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -3,12 +3,13 @@ # # Common support -obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o serial.o +obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o \ + serial.o gpmc.o obj-$(CONFIG_OMAP_MPU_TIMER) += timer-gp.o # Power Management -obj-$(CONFIG_PM) += pm.o sleep.o +obj-$(CONFIG_PM) += pm.o pm-domain.o sleep.o # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 6c6ba172cdf..7993b7bae2b 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -234,17 +234,17 @@ static void __init apollon_sw_init(void) set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQT_RISING); if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt, - SA_SHIRQ, "enter sw", + IRQF_SHARED, "enter sw", &apollon_sw_interrupt)) return; set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQT_RISING); if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt, - SA_SHIRQ, "up sw", + IRQF_SHARED, "up sw", &apollon_sw_interrupt)) return; set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQT_RISING); if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt, - SA_SHIRQ, "down sw", + IRQF_SHARED, "down sw", &apollon_sw_interrupt)) return; } diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 72eb4bf571a..d1b648a4efb 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -15,7 +15,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/device.h> @@ -660,26 +659,35 @@ static int omap2_clk_set_rate(struct clk *clk, unsigned long rate) /* Isolate control register */ div_sel = (SRC_RATE_SEL_MASK & clk->flags); - div_off = clk->src_offset; + div_off = clk->rate_offset; validrate = omap2_clksel_round_rate(clk, rate, &new_div); - if(validrate != rate) + if (validrate != rate) return(ret); field_val = omap2_get_clksel(&div_sel, &field_mask, clk); if (div_sel == 0) return ret; - if(clk->flags & CM_SYSCLKOUT_SEL1){ - switch(new_div){ - case 16: field_val = 4; break; - case 8: field_val = 3; break; - case 4: field_val = 2; break; - case 2: field_val = 1; break; - case 1: field_val = 0; break; + if (clk->flags & CM_SYSCLKOUT_SEL1) { + switch (new_div) { + case 16: + field_val = 4; + break; + case 8: + field_val = 3; + break; + case 4: + field_val = 2; + break; + case 2: + field_val = 1; + break; + case 1: + field_val = 0; + break; } - } - else + } else field_val = new_div; reg = (void __iomem *)div_sel; @@ -744,7 +752,7 @@ static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset, val = 0x2; break; case CM_WKUP_SEL1: - src_reg_addr = (u32)&CM_CLKSEL2_CORE; + src_reg_addr = (u32)&CM_CLKSEL_WKUP; mask = 0x3; if (src_clk == &func_32k_ck) val = 0x0; @@ -784,9 +792,9 @@ static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset, val = 0; if (src_clk == &sys_ck) val = 1; - if (src_clk == &func_54m_ck) - val = 2; if (src_clk == &func_96m_ck) + val = 2; + if (src_clk == &func_54m_ck) val = 3; break; } diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 6c78d471fab..2781dfbc516 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -1062,7 +1062,7 @@ static struct clk gpt2_ick = { .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* Bit4 */ - .enable_bit = 0, + .enable_bit = 4, .recalc = &omap2_followparent_recalc, }; diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index fb7f91da1aa..aa4322451e8 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -9,7 +9,6 @@ * (at your option) any later version. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -105,6 +104,51 @@ static inline void omap_init_sti(void) static inline void omap_init_sti(void) {} #endif +#if defined(CONFIG_SPI_OMAP24XX) + +#include <asm/arch/mcspi.h> + +#define OMAP2_MCSPI1_BASE 0x48098000 +#define OMAP2_MCSPI2_BASE 0x4809a000 + +/* FIXME: use resources instead */ + +static struct omap2_mcspi_platform_config omap2_mcspi1_config = { + .base = io_p2v(OMAP2_MCSPI1_BASE), + .num_cs = 4, +}; + +struct platform_device omap2_mcspi1 = { + .name = "omap2_mcspi", + .id = 1, + .dev = { + .platform_data = &omap2_mcspi1_config, + }, +}; + +static struct omap2_mcspi_platform_config omap2_mcspi2_config = { + .base = io_p2v(OMAP2_MCSPI2_BASE), + .num_cs = 2, +}; + +struct platform_device omap2_mcspi2 = { + .name = "omap2_mcspi", + .id = 2, + .dev = { + .platform_data = &omap2_mcspi2_config, + }, +}; + +static void omap_init_mcspi(void) +{ + platform_device_register(&omap2_mcspi1); + platform_device_register(&omap2_mcspi2); +} + +#else +static inline void omap_init_mcspi(void) {} +#endif + /*-------------------------------------------------------------------------*/ static int __init omap2_init_devices(void) @@ -113,6 +157,7 @@ static int __init omap2_init_devices(void) * in alphabetical order so they're easier to sort through. */ omap_init_i2c(); + omap_init_mcspi(); omap_init_sti(); return 0; diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c new file mode 100644 index 00000000000..c7a48f921fe --- /dev/null +++ b/arch/arm/mach-omap2/gpmc.c @@ -0,0 +1,209 @@ +/* + * GPMC support functions + * + * Copyright (C) 2005-2006 Nokia Corporation + * + * Author: Juha Yrjola + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/err.h> +#include <linux/clk.h> + +#include <asm/io.h> +#include <asm/arch/gpmc.h> + +#undef DEBUG + +#define GPMC_BASE 0x6800a000 +#define GPMC_REVISION 0x00 +#define GPMC_SYSCONFIG 0x10 +#define GPMC_SYSSTATUS 0x14 +#define GPMC_IRQSTATUS 0x18 +#define GPMC_IRQENABLE 0x1c +#define GPMC_TIMEOUT_CONTROL 0x40 +#define GPMC_ERR_ADDRESS 0x44 +#define GPMC_ERR_TYPE 0x48 +#define GPMC_CONFIG 0x50 +#define GPMC_STATUS 0x54 +#define GPMC_PREFETCH_CONFIG1 0x1e0 +#define GPMC_PREFETCH_CONFIG2 0x1e4 +#define GPMC_PREFETCH_CONTROL 0x1e8 +#define GPMC_PREFETCH_STATUS 0x1f0 +#define GPMC_ECC_CONFIG 0x1f4 +#define GPMC_ECC_CONTROL 0x1f8 +#define GPMC_ECC_SIZE_CONFIG 0x1fc + +#define GPMC_CS0 0x60 +#define GPMC_CS_SIZE 0x30 + +static void __iomem *gpmc_base = + (void __iomem *) IO_ADDRESS(GPMC_BASE); +static void __iomem *gpmc_cs_base = + (void __iomem *) IO_ADDRESS(GPMC_BASE) + GPMC_CS0; + +static struct clk *gpmc_l3_clk; + +static void gpmc_write_reg(int idx, u32 val) +{ + __raw_writel(val, gpmc_base + idx); +} + +static u32 gpmc_read_reg(int idx) +{ + return __raw_readl(gpmc_base + idx); +} + +void gpmc_cs_write_reg(int cs, int idx, u32 val) +{ + void __iomem *reg_addr; + + reg_addr = gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx; + __raw_writel(val, reg_addr); +} + +u32 gpmc_cs_read_reg(int cs, int idx) +{ + return __raw_readl(gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx); +} + +/* TODO: Add support for gpmc_fck to clock framework and use it */ +static unsigned long gpmc_get_fclk_period(void) +{ + /* In picoseconds */ + return 1000000000 / ((clk_get_rate(gpmc_l3_clk)) / 1000); +} + +unsigned int gpmc_ns_to_ticks(unsigned int time_ns) +{ + unsigned long tick_ps; + + /* Calculate in picosecs to yield more exact results */ + tick_ps = gpmc_get_fclk_period(); + + return (time_ns * 1000 + tick_ps - 1) / tick_ps; +} + +#ifdef DEBUG +static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, + int time, const char *name) +#else +static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, + int time) +#endif +{ + u32 l; + int ticks, mask, nr_bits; + + if (time == 0) + ticks = 0; + else + ticks = gpmc_ns_to_ticks(time); + nr_bits = end_bit - st_bit + 1; + if (ticks >= 1 << nr_bits) + return -1; + + mask = (1 << nr_bits) - 1; + l = gpmc_cs_read_reg(cs, reg); +#ifdef DEBUG + printk(KERN_INFO "GPMC CS%d: %-10s: %d ticks, %3lu ns (was %i ticks)\n", + cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000, + (l >> st_bit) & mask); +#endif + l &= ~(mask << st_bit); + l |= ticks << st_bit; + gpmc_cs_write_reg(cs, reg, l); + + return 0; +} + +#ifdef DEBUG +#define GPMC_SET_ONE(reg, st, end, field) \ + if (set_gpmc_timing_reg(cs, (reg), (st), (end), \ + t->field, #field) < 0) \ + return -1 +#else +#define GPMC_SET_ONE(reg, st, end, field) \ + if (set_gpmc_timing_reg(cs, (reg), (st), (end), t->field) < 0) \ + return -1 +#endif + +int gpmc_cs_calc_divider(int cs, unsigned int sync_clk) +{ + int div; + u32 l; + + l = sync_clk * 1000 + (gpmc_get_fclk_period() - 1); + div = l / gpmc_get_fclk_period(); + if (div > 4) + return -1; + if (div < 0) + div = 1; + + return div; +} + +int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) +{ + int div; + u32 l; + + div = gpmc_cs_calc_divider(cs, t->sync_clk); + if (div < 0) + return -1; + + GPMC_SET_ONE(GPMC_CS_CONFIG2, 0, 3, cs_on); + GPMC_SET_ONE(GPMC_CS_CONFIG2, 8, 12, cs_rd_off); + GPMC_SET_ONE(GPMC_CS_CONFIG2, 16, 20, cs_wr_off); + + GPMC_SET_ONE(GPMC_CS_CONFIG3, 0, 3, adv_on); + GPMC_SET_ONE(GPMC_CS_CONFIG3, 8, 12, adv_rd_off); + GPMC_SET_ONE(GPMC_CS_CONFIG3, 16, 20, adv_wr_off); + + GPMC_SET_ONE(GPMC_CS_CONFIG4, 0, 3, oe_on); + GPMC_SET_ONE(GPMC_CS_CONFIG4, 8, 12, oe_off); + GPMC_SET_ONE(GPMC_CS_CONFIG4, 16, 19, we_on); + GPMC_SET_ONE(GPMC_CS_CONFIG4, 24, 28, we_off); + + GPMC_SET_ONE(GPMC_CS_CONFIG5, 0, 4, rd_cycle); + GPMC_SET_ONE(GPMC_CS_CONFIG5, 8, 12, wr_cycle); + GPMC_SET_ONE(GPMC_CS_CONFIG5, 16, 20, access); + + GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access); + +#ifdef DEBUG + printk(KERN_INFO "GPMC CS%d CLK period is %lu (div %d)\n", + cs, gpmc_get_fclk_period(), div); +#endif + + l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + l &= ~0x03; + l |= (div - 1); + + return 0; +} + +unsigned long gpmc_cs_get_base_addr(int cs) +{ + return (gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7) & 0x1f) << 24; +} + +void __init gpmc_init(void) +{ + u32 l; + + gpmc_l3_clk = clk_get(NULL, "core_l3_ck"); + BUG_ON(IS_ERR(gpmc_l3_clk)); + + l = gpmc_read_reg(GPMC_REVISION); + printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); + /* Set smart idle mode and automatic L3 clock gating */ + l = gpmc_read_reg(GPMC_SYSCONFIG); + l &= 0x03 << 3; + l |= (0x02 << 3) | (1 << 0); + gpmc_write_reg(GPMC_SYSCONFIG, l); +} diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 76187300f2b..871ace4fccb 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -11,7 +11,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 7d5711611f2..a0728c33e5d 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -11,7 +11,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -27,6 +26,7 @@ extern void omap_sram_init(void); extern int omap2_clk_init(void); extern void omap2_check_revision(void); +extern void gpmc_init(void); /* * The machine specific code may provide the extra mapping besides the @@ -67,4 +67,5 @@ void __init omap2_init_common_hw(void) { omap2_mux_init(); omap2_clk_init(); + gpmc_init(); } diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index d7baff675cf..3eed6a737bf 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -12,7 +12,6 @@ */ #include <linux/kernel.h> #include <linux/init.h> -#include <linux/config.h> #include <linux/interrupt.h> #include <asm/hardware.h> #include <asm/mach/irq.h> diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c index 1d925d69fc3..85cbc2a2e66 100644 --- a/arch/arm/mach-omap2/memory.c +++ b/arch/arm/mach-omap2/memory.c @@ -14,7 +14,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/device.h> diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 1197dc38c20..60ef084faff 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -22,7 +22,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * */ -#include <linux/config.h> #include <linux/module.h> #include <linux/init.h> #include <asm/system.h> @@ -53,6 +52,12 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1) /* 24xx clocks */ MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) +/* 24xx GPMC wait pin monitoring */ +MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1) +MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1) +MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1) +MUX_CFG_24XX("P1_GPMC_WAIT3", 0x09d, 0, 1, 1, 1) + /* 24xx McBSP */ MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1) MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1) @@ -60,18 +65,38 @@ MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1) MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1) /* 24xx GPIO */ -MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) +MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) -MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) -MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) -MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) +MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) +MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) +MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) -MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) +MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) -MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) +MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) +/* 242x DBG GPIO */ +MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1) +MUX_CFG_24XX("W2_242X_GPIO50", 0xd4, 3, 0, 0, 1) +MUX_CFG_24XX("U4_242X_GPIO51", 0xd5, 3, 0, 0, 1) +MUX_CFG_24XX("V3_242X_GPIO52", 0xd6, 3, 0, 0, 1) +MUX_CFG_24XX("V2_242X_GPIO53", 0xd7, 3, 0, 0, 1) +MUX_CFG_24XX("V6_242X_GPIO53", 0xcf, 3, 0, 0, 1) +MUX_CFG_24XX("T4_242X_GPIO54", 0xd8, 3, 0, 0, 1) +MUX_CFG_24XX("Y4_242X_GPIO54", 0xd0, 3, 0, 0, 1) +MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1) +MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1) + +/* 24xx external DMA requests */ +MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1) +MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1) +MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1) +MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1) +MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1) +MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1) + /* TSC IRQ */ MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1) diff --git a/arch/arm/mach-omap2/pm-domain.c b/arch/arm/mach-omap2/pm-domain.c new file mode 100644 index 00000000000..5e20e740cde --- /dev/null +++ b/arch/arm/mach-omap2/pm-domain.c @@ -0,0 +1,300 @@ +/* + * linux/arch/arm/mach-omap2/pm-domain.c + * + * Power domain functions for OMAP2 + * + * Copyright (C) 2006 Nokia Corporation + * Tony Lindgren <tony@atomide.com> + * + * Some code based on earlier OMAP2 sample PM code + * Copyright (C) 2005 Texas Instruments, Inc. + * Richard Woodruff <r-woodruff2@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/config.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/clk.h> + +#include <asm/io.h> + +#include "prcm-regs.h" + +/* Power domain offsets */ +#define PM_MPU_OFFSET 0x100 +#define PM_CORE_OFFSET 0x200 +#define PM_GFX_OFFSET 0x300 +#define PM_WKUP_OFFSET 0x400 /* Autoidle only */ +#define PM_PLL_OFFSET 0x500 /* Autoidle only */ +#define PM_DSP_OFFSET 0x800 +#define PM_MDM_OFFSET 0xc00 + +/* Power domain wake-up dependency control register */ +#define PM_WKDEP_OFFSET 0xc8 +#define EN_MDM (1 << 5) +#define EN_WKUP (1 << 4) +#define EN_GFX (1 << 3) +#define EN_DSP (1 << 2) +#define EN_MPU (1 << 1) +#define EN_CORE (1 << 0) + +/* Core power domain state transition control register */ +#define PM_PWSTCTRL_OFFSET 0xe0 +#define FORCESTATE (1 << 18) /* Only for DSP & GFX */ +#define MEM4RETSTATE (1 << 6) +#define MEM3RETSTATE (1 << 5) +#define MEM2RETSTATE (1 << 4) +#define MEM1RETSTATE (1 << 3) +#define LOGICRETSTATE (1 << 2) /* Logic is retained */ +#define POWERSTATE_OFF 0x3 +#define POWERSTATE_RETENTION 0x1 +#define POWERSTATE_ON 0x0 + +/* Power domain state register */ +#define PM_PWSTST_OFFSET 0xe4 + +/* Hardware supervised state transition control register */ +#define CM_CLKSTCTRL_OFFSET 0x48 +#define AUTOSTAT_MPU (1 << 0) /* MPU */ +#define AUTOSTAT_DSS (1 << 2) /* Core */ +#define AUTOSTAT_L4 (1 << 1) /* Core */ +#define AUTOSTAT_L3 (1 << 0) /* Core */ +#define AUTOSTAT_GFX (1 << 0) /* GFX */ +#define AUTOSTAT_IVA (1 << 8) /* 2420 IVA in DSP domain */ +#define AUTOSTAT_DSP (1 << 0) /* DSP */ +#define AUTOSTAT_MDM (1 << 0) /* MDM */ + +/* Automatic control of interface clock idling */ +#define CM_AUTOIDLE1_OFFSET 0x30 +#define CM_AUTOIDLE2_OFFSET 0x34 /* Core only */ +#define CM_AUTOIDLE3_OFFSET 0x38 /* Core only */ +#define CM_AUTOIDLE4_OFFSET 0x3c /* Core only */ +#define AUTO_54M(x) (((x) & 0x3) << 6) +#define AUTO_96M(x) (((x) & 0x3) << 2) +#define AUTO_DPLL(x) (((x) & 0x3) << 0) +#define AUTO_STOPPED 0x3 +#define AUTO_BYPASS_FAST 0x2 /* DPLL only */ +#define AUTO_BYPASS_LOW_POWER 0x1 /* DPLL only */ +#define AUTO_DISABLED 0x0 + +/* Voltage control PRCM_VOLTCTRL bits */ +#define AUTO_EXTVOLT (1 << 15) +#define FORCE_EXTVOLT (1 << 14) +#define SETOFF_LEVEL(x) (((x) & 0x3) << 12) +#define MEMRETCTRL (1 << 8) +#define SETRET_LEVEL(x) (((x) & 0x3) << 6) +#define VOLT_LEVEL(x) (((x) & 0x3) << 0) + +#define OMAP24XX_PRCM_VBASE IO_ADDRESS(OMAP24XX_PRCM_BASE) +#define prcm_readl(r) __raw_readl(OMAP24XX_PRCM_VBASE + (r)) +#define prcm_writel(v, r) __raw_writel((v), OMAP24XX_PRCM_VBASE + (r)) + +static u32 pmdomain_get_wakeup_dependencies(int domain_offset) +{ + return prcm_readl(domain_offset + PM_WKDEP_OFFSET); +} + +static void pmdomain_set_wakeup_dependencies(u32 state, int domain_offset) +{ + prcm_writel(state, domain_offset + PM_WKDEP_OFFSET); +} + +static u32 pmdomain_get_powerstate(int domain_offset) +{ + return prcm_readl(domain_offset + PM_PWSTCTRL_OFFSET); +} + +static void pmdomain_set_powerstate(u32 state, int domain_offset) +{ + prcm_writel(state, domain_offset + PM_PWSTCTRL_OFFSET); +} + +static u32 pmdomain_get_clock_autocontrol(int domain_offset) +{ + return prcm_readl(domain_offset + CM_CLKSTCTRL_OFFSET); +} + +static void pmdomain_set_clock_autocontrol(u32 state, int domain_offset) +{ + prcm_writel(state, domain_offset + CM_CLKSTCTRL_OFFSET); +} + +static u32 pmdomain_get_clock_autoidle1(int domain_offset) +{ + return prcm_readl(domain_offset + CM_AUTOIDLE1_OFFSET); +} + +/* Core domain only */ +static u32 pmdomain_get_clock_autoidle2(int domain_offset) +{ + return prcm_readl(domain_offset + CM_AUTOIDLE2_OFFSET); +} + +/* Core domain only */ +static u32 pmdomain_get_clock_autoidle3(int domain_offset) +{ + return prcm_readl(domain_offset + CM_AUTOIDLE3_OFFSET); +} + +/* Core domain only */ +static u32 pmdomain_get_clock_autoidle4(int domain_offset) +{ + return prcm_readl(domain_offset + CM_AUTOIDLE4_OFFSET); +} + +static void pmdomain_set_clock_autoidle1(u32 state, int domain_offset) +{ + prcm_writel(state, CM_AUTOIDLE1_OFFSET + domain_offset); +} + +/* Core domain only */ +static void pmdomain_set_clock_autoidle2(u32 state, int domain_offset) +{ + prcm_writel(state, CM_AUTOIDLE2_OFFSET + domain_offset); +} + +/* Core domain only */ +static void pmdomain_set_clock_autoidle3(u32 state, int domain_offset) +{ + prcm_writel(state, CM_AUTOIDLE3_OFFSET + domain_offset); +} + +/* Core domain only */ +static void pmdomain_set_clock_autoidle4(u32 state, int domain_offset) +{ + prcm_writel(state, CM_AUTOIDLE4_OFFSET + domain_offset); +} + +/* + * Configures power management domains to idle clocks automatically. + */ +void pmdomain_set_autoidle(void) +{ + u32 val; + + /* Set PLL auto stop for 54M, 96M & DPLL */ + pmdomain_set_clock_autoidle1(AUTO_54M(AUTO_STOPPED) | + AUTO_96M(AUTO_STOPPED) | + AUTO_DPLL(AUTO_STOPPED), PM_PLL_OFFSET); + + /* External clock input control + * REVISIT: Should this be in clock framework? + */ + PRCM_CLKSRC_CTRL |= (0x3 << 3); + + /* Configure number of 32KHz clock cycles for sys_clk */ + PRCM_CLKSSETUP = 0x00ff; + + /* Configure automatic voltage transition */ + PRCM_VOLTSETUP = 0; + val = PRCM_VOLTCTRL; + val &= ~(SETOFF_LEVEL(0x3) | VOLT_LEVEL(0x3)); + val |= SETOFF_LEVEL(1) | VOLT_LEVEL(1) | AUTO_EXTVOLT; + PRCM_VOLTCTRL = val; + + /* Disable emulation tools functional clock */ + PRCM_CLKEMUL_CTRL = 0x0; + + /* Set core memory retention state */ + val = pmdomain_get_powerstate(PM_CORE_OFFSET); + if (cpu_is_omap2420()) { + val &= ~(0x7 << 3); + val |= (MEM3RETSTATE | MEM2RETSTATE | MEM1RETSTATE); + } else { + val &= ~(0xf << 3); + val |= (MEM4RETSTATE | MEM3RETSTATE | MEM2RETSTATE | + MEM1RETSTATE); + } + pmdomain_set_powerstate(val, PM_CORE_OFFSET); + + /* OCP interface smart idle. REVISIT: Enable autoidle bit0 ? */ + val = SMS_SYSCONFIG; + val &= ~(0x3 << 3); + val |= (0x2 << 3) | (1 << 0); + SMS_SYSCONFIG |= val; + + val = SDRC_SYSCONFIG; + val &= ~(0x3 << 3); + val |= (0x2 << 3); + SDRC_SYSCONFIG = val; + + /* Configure L3 interface for smart idle. + * REVISIT: Enable autoidle bit0 ? + */ + val = GPMC_SYSCONFIG; + val &= ~(0x3 << 3); + val |= (0x2 << 3) | (1 << 0); + GPMC_SYSCONFIG = val; + + pmdomain_set_powerstate(LOGICRETSTATE | POWERSTATE_RETENTION, + PM_MPU_OFFSET); + pmdomain_set_powerstate(POWERSTATE_RETENTION, PM_CORE_OFFSET); + if (!cpu_is_omap2420()) + pmdomain_set_powerstate(POWERSTATE_RETENTION, PM_MDM_OFFSET); + + /* Assume suspend function has saved the state for DSP and GFX */ + pmdomain_set_powerstate(FORCESTATE | POWERSTATE_OFF, PM_DSP_OFFSET); + pmdomain_set_powerstate(FORCESTATE | POWERSTATE_OFF, PM_GFX_OFFSET); + +#if 0 + /* REVISIT: Internal USB needs special handling */ + force_standby_usb(); + if (cpu_is_omap2430()) + force_hsmmc(); + sdram_self_refresh_on_idle_req(1); +#endif + + /* Enable clock auto control for all domains. + * Note that CORE domain includes also DSS, L4 & L3. + */ + pmdomain_set_clock_autocontrol(AUTOSTAT_MPU, PM_MPU_OFFSET); + pmdomain_set_clock_autocontrol(AUTOSTAT_GFX, PM_GFX_OFFSET); + pmdomain_set_clock_autocontrol(AUTOSTAT_DSS | AUTOSTAT_L4 | AUTOSTAT_L3, + PM_CORE_OFFSET); + if (cpu_is_omap2420()) + pmdomain_set_clock_autocontrol(AUTOSTAT_IVA | AUTOSTAT_DSP, + PM_DSP_OFFSET); + else { + pmdomain_set_clock_autocontrol(AUTOSTAT_DSP, PM_DSP_OFFSET); + pmdomain_set_clock_autocontrol(AUTOSTAT_MDM, PM_MDM_OFFSET); + } + + /* Enable clock autoidle for all domains */ + pmdomain_set_clock_autoidle1(0x2, PM_DSP_OFFSET); + if (cpu_is_omap2420()) { + pmdomain_set_clock_autoidle1(0xfffffff9, PM_CORE_OFFSET); + pmdomain_set_clock_autoidle2(0x7, PM_CORE_OFFSET); + pmdomain_set_clock_autoidle1(0x3f, PM_WKUP_OFFSET); + } else { + pmdomain_set_clock_autoidle1(0xeafffff1, PM_CORE_OFFSET); + pmdomain_set_clock_autoidle2(0xfff, PM_CORE_OFFSET); + pmdomain_set_clock_autoidle1(0x7f, PM_WKUP_OFFSET); + pmdomain_set_clock_autoidle1(0x3, PM_MDM_OFFSET); + } + pmdomain_set_clock_autoidle3(0x7, PM_CORE_OFFSET); + pmdomain_set_clock_autoidle4(0x1f, PM_CORE_OFFSET); +} + +/* + * Initializes power domains by removing wake-up dependencies and powering + * down DSP and GFX. Gets called from PM init. Note that DSP and IVA code + * must re-enable DSP and GFX when used. + */ +void __init pmdomain_init(void) +{ + /* Remove all domain wakeup dependencies */ + pmdomain_set_wakeup_dependencies(EN_WKUP | EN_CORE, PM_MPU_OFFSET); + pmdomain_set_wakeup_dependencies(0, PM_DSP_OFFSET); + pmdomain_set_wakeup_dependencies(0, PM_GFX_OFFSET); + pmdomain_set_wakeup_dependencies(EN_WKUP | EN_MPU, PM_CORE_OFFSET); + if (cpu_is_omap2430()) + pmdomain_set_wakeup_dependencies(0, PM_MDM_OFFSET); + + /* Power down DSP and GFX */ + pmdomain_set_powerstate(POWERSTATE_OFF | FORCESTATE, PM_DSP_OFFSET); + pmdomain_set_powerstate(POWERSTATE_OFF | FORCESTATE, PM_GFX_OFFSET); +} diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 562168fa2b1..d7eee99b7e3 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -23,6 +23,7 @@ #include <linux/interrupt.h> #include <linux/sysfs.h> #include <linux/module.h> +#include <linux/delay.h> #include <asm/io.h> #include <asm/irq.h> @@ -36,11 +37,18 @@ #include <asm/arch/sram.h> #include <asm/arch/pm.h> +#include "prcm-regs.h" + static struct clk *vclk; static void (*omap2_sram_idle)(void); static void (*omap2_sram_suspend)(int dllctrl, int cpu_rev); static void (*saved_idle)(void); +extern void __init pmdomain_init(void); +extern void pmdomain_set_autoidle(void); + +static unsigned int omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_SIZE]; + void omap2_pm_idle(void) { local_irq_disable(); @@ -87,23 +95,272 @@ static int omap2_pm_prepare(suspend_state_t state) return error; } +#define INT0_WAKE_MASK (OMAP_IRQ_BIT(INT_24XX_GPIO_BANK1) | \ + OMAP_IRQ_BIT(INT_24XX_GPIO_BANK2) | \ + OMAP_IRQ_BIT(INT_24XX_GPIO_BANK3)) + +#define INT1_WAKE_MASK (OMAP_IRQ_BIT(INT_24XX_GPIO_BANK4)) + +#define INT2_WAKE_MASK (OMAP_IRQ_BIT(INT_24XX_UART1_IRQ) | \ + OMAP_IRQ_BIT(INT_24XX_UART2_IRQ) | \ + OMAP_IRQ_BIT(INT_24XX_UART3_IRQ)) + +#define preg(reg) printk("%s\t(0x%p):\t0x%08x\n", #reg, ®, reg); + +static void omap2_pm_debug(char * desc) +{ + printk("%s:\n", desc); + + preg(CM_CLKSTCTRL_MPU); + preg(CM_CLKSTCTRL_CORE); + preg(CM_CLKSTCTRL_GFX); + preg(CM_CLKSTCTRL_DSP); + preg(CM_CLKSTCTRL_MDM); + + preg(PM_PWSTCTRL_MPU); + preg(PM_PWSTCTRL_CORE); + preg(PM_PWSTCTRL_GFX); + preg(PM_PWSTCTRL_DSP); + preg(PM_PWSTCTRL_MDM); + + preg(PM_PWSTST_MPU); + preg(PM_PWSTST_CORE); + preg(PM_PWSTST_GFX); + preg(PM_PWSTST_DSP); + preg(PM_PWSTST_MDM); + + preg(CM_AUTOIDLE1_CORE); + preg(CM_AUTOIDLE2_CORE); + preg(CM_AUTOIDLE3_CORE); + preg(CM_AUTOIDLE4_CORE); + preg(CM_AUTOIDLE_WKUP); + preg(CM_AUTOIDLE_PLL); + preg(CM_AUTOIDLE_DSP); + preg(CM_AUTOIDLE_MDM); + + preg(CM_ICLKEN1_CORE); + preg(CM_ICLKEN2_CORE); + preg(CM_ICLKEN3_CORE); + preg(CM_ICLKEN4_CORE); + preg(CM_ICLKEN_GFX); + preg(CM_ICLKEN_WKUP); + preg(CM_ICLKEN_DSP); + preg(CM_ICLKEN_MDM); + + preg(CM_IDLEST1_CORE); + preg(CM_IDLEST2_CORE); + preg(CM_IDLEST3_CORE); + preg(CM_IDLEST4_CORE); + preg(CM_IDLEST_GFX); + preg(CM_IDLEST_WKUP); + preg(CM_IDLEST_CKGEN); + preg(CM_IDLEST_DSP); + preg(CM_IDLEST_MDM); + + preg(RM_RSTST_MPU); + preg(RM_RSTST_GFX); + preg(RM_RSTST_WKUP); + preg(RM_RSTST_DSP); + preg(RM_RSTST_MDM); + + preg(PM_WKDEP_MPU); + preg(PM_WKDEP_CORE); + preg(PM_WKDEP_GFX); + preg(PM_WKDEP_DSP); + preg(PM_WKDEP_MDM); + + preg(CM_FCLKEN_WKUP); + preg(CM_ICLKEN_WKUP); + preg(CM_IDLEST_WKUP); + preg(CM_AUTOIDLE_WKUP); + preg(CM_CLKSEL_WKUP); + + preg(PM_WKEN_WKUP); + preg(PM_WKST_WKUP); +} + +static inline void omap2_pm_save_registers(void) +{ + /* Save interrupt registers */ + OMAP24XX_SAVE(INTC_MIR0); + OMAP24XX_SAVE(INTC_MIR1); + OMAP24XX_SAVE(INTC_MIR2); + + /* Save power control registers */ + OMAP24XX_SAVE(CM_CLKSTCTRL_MPU); + OMAP24XX_SAVE(CM_CLKSTCTRL_CORE); + OMAP24XX_SAVE(CM_CLKSTCTRL_GFX); + OMAP24XX_SAVE(CM_CLKSTCTRL_DSP); + OMAP24XX_SAVE(CM_CLKSTCTRL_MDM); + + /* Save power state registers */ + OMAP24XX_SAVE(PM_PWSTCTRL_MPU); + OMAP24XX_SAVE(PM_PWSTCTRL_CORE); + OMAP24XX_SAVE(PM_PWSTCTRL_GFX); + OMAP24XX_SAVE(PM_PWSTCTRL_DSP); + OMAP24XX_SAVE(PM_PWSTCTRL_MDM); + + /* Save autoidle registers */ + OMAP24XX_SAVE(CM_AUTOIDLE1_CORE); + OMAP24XX_SAVE(CM_AUTOIDLE2_CORE); + OMAP24XX_SAVE(CM_AUTOIDLE3_CORE); + OMAP24XX_SAVE(CM_AUTOIDLE4_CORE); + OMAP24XX_SAVE(CM_AUTOIDLE_WKUP); + OMAP24XX_SAVE(CM_AUTOIDLE_PLL); + OMAP24XX_SAVE(CM_AUTOIDLE_DSP); + OMAP24XX_SAVE(CM_AUTOIDLE_MDM); + + /* Save idle state registers */ + OMAP24XX_SAVE(CM_IDLEST1_CORE); + OMAP24XX_SAVE(CM_IDLEST2_CORE); + OMAP24XX_SAVE(CM_IDLEST3_CORE); + OMAP24XX_SAVE(CM_IDLEST4_CORE); + OMAP24XX_SAVE(CM_IDLEST_GFX); + OMAP24XX_SAVE(CM_IDLEST_WKUP); + OMAP24XX_SAVE(CM_IDLEST_CKGEN); + OMAP24XX_SAVE(CM_IDLEST_DSP); + OMAP24XX_SAVE(CM_IDLEST_MDM); + + /* Save clock registers */ + OMAP24XX_SAVE(CM_FCLKEN1_CORE); + OMAP24XX_SAVE(CM_FCLKEN2_CORE); + OMAP24XX_SAVE(CM_ICLKEN1_CORE); + OMAP24XX_SAVE(CM_ICLKEN2_CORE); + OMAP24XX_SAVE(CM_ICLKEN3_CORE); + OMAP24XX_SAVE(CM_ICLKEN4_CORE); +} + +static inline void omap2_pm_restore_registers(void) +{ + /* Restore clock state registers */ + OMAP24XX_RESTORE(CM_CLKSTCTRL_MPU); + OMAP24XX_RESTORE(CM_CLKSTCTRL_CORE); + OMAP24XX_RESTORE(CM_CLKSTCTRL_GFX); + OMAP24XX_RESTORE(CM_CLKSTCTRL_DSP); + OMAP24XX_RESTORE(CM_CLKSTCTRL_MDM); + + /* Restore power state registers */ + OMAP24XX_RESTORE(PM_PWSTCTRL_MPU); + OMAP24XX_RESTORE(PM_PWSTCTRL_CORE); + OMAP24XX_RESTORE(PM_PWSTCTRL_GFX); + OMAP24XX_RESTORE(PM_PWSTCTRL_DSP); + OMAP24XX_RESTORE(PM_PWSTCTRL_MDM); + + /* Restore idle state registers */ + OMAP24XX_RESTORE(CM_IDLEST1_CORE); + OMAP24XX_RESTORE(CM_IDLEST2_CORE); + OMAP24XX_RESTORE(CM_IDLEST3_CORE); + OMAP24XX_RESTORE(CM_IDLEST4_CORE); + OMAP24XX_RESTORE(CM_IDLEST_GFX); + OMAP24XX_RESTORE(CM_IDLEST_WKUP); + OMAP24XX_RESTORE(CM_IDLEST_CKGEN); + OMAP24XX_RESTORE(CM_IDLEST_DSP); + OMAP24XX_RESTORE(CM_IDLEST_MDM); + + /* Restore autoidle registers */ + OMAP24XX_RESTORE(CM_AUTOIDLE1_CORE); + OMAP24XX_RESTORE(CM_AUTOIDLE2_CORE); + OMAP24XX_RESTORE(CM_AUTOIDLE3_CORE); + OMAP24XX_RESTORE(CM_AUTOIDLE4_CORE); + OMAP24XX_RESTORE(CM_AUTOIDLE_WKUP); + OMAP24XX_RESTORE(CM_AUTOIDLE_PLL); + OMAP24XX_RESTORE(CM_AUTOIDLE_DSP); + OMAP24XX_RESTORE(CM_AUTOIDLE_MDM); + + /* Restore clock registers */ + OMAP24XX_RESTORE(CM_FCLKEN1_CORE); + OMAP24XX_RESTORE(CM_FCLKEN2_CORE); + OMAP24XX_RESTORE(CM_ICLKEN1_CORE); + OMAP24XX_RESTORE(CM_ICLKEN2_CORE); + OMAP24XX_RESTORE(CM_ICLKEN3_CORE); + OMAP24XX_RESTORE(CM_ICLKEN4_CORE); + + /* REVISIT: Clear interrupts here */ + + /* Restore interrupt registers */ + OMAP24XX_RESTORE(INTC_MIR0); + OMAP24XX_RESTORE(INTC_MIR1); + OMAP24XX_RESTORE(INTC_MIR2); +} + +static int omap2_pm_suspend(void) +{ + int processor_type = 0; + + /* REVISIT: 0x21 or 0x26? */ + if (cpu_is_omap2420()) + processor_type = 0x21; + + if (!processor_type) + return -ENOTSUPP; + + local_irq_disable(); + local_fiq_disable(); + + omap2_pm_save_registers(); + + /* Disable interrupts except for the wake events */ + INTC_MIR_SET0 = 0xffffffff & ~INT0_WAKE_MASK; + INTC_MIR_SET1 = 0xffffffff & ~INT1_WAKE_MASK; + INTC_MIR_SET2 = 0xffffffff & ~INT2_WAKE_MASK; + + pmdomain_set_autoidle(); + + /* Clear old wake-up events */ + PM_WKST1_CORE = 0; + PM_WKST2_CORE = 0; + PM_WKST_WKUP = 0; + + /* Enable wake-up events */ + PM_WKEN1_CORE = (1 << 22) | (1 << 21); /* UART1 & 2 */ + PM_WKEN2_CORE = (1 << 2); /* UART3 */ + PM_WKEN_WKUP = (1 << 2) | (1 << 0); /* GPIO & GPT1 */ + + /* Disable clocks except for CM_ICLKEN2_CORE. It gets disabled + * in the SRAM suspend code */ + CM_FCLKEN1_CORE = 0; + CM_FCLKEN2_CORE = 0; + CM_ICLKEN1_CORE = 0; + CM_ICLKEN3_CORE = 0; + CM_ICLKEN4_CORE = 0; + + omap2_pm_debug("Status before suspend"); + + /* Must wait for serial buffers to clear */ + mdelay(200); + + /* Jump to SRAM suspend code + * REVISIT: When is this SDRC_DLLB_CTRL? + */ + omap2_sram_suspend(SDRC_DLLA_CTRL, processor_type); + + /* Back from sleep */ + omap2_pm_restore_registers(); + + local_fiq_enable(); + local_irq_enable(); + + return 0; +} + static int omap2_pm_enter(suspend_state_t state) { + int ret = 0; + switch (state) { case PM_SUSPEND_STANDBY: case PM_SUSPEND_MEM: - /* FIXME: Add suspend */ + ret = omap2_pm_suspend(); break; - case PM_SUSPEND_DISK: - return -ENOTSUPP; - + ret = -ENOTSUPP; + break; default: - return -EINVAL; + ret = -EINVAL; } - return 0; + return ret; } static int omap2_pm_finish(suspend_state_t state) @@ -143,6 +400,8 @@ int __init omap2_pm_init(void) pm_set_ops(&omap_pm_ops); pm_idle = omap2_pm_idle; + pmdomain_init(); + return 0; } diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 8893479dc7e..c2bf57ef682 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -13,7 +13,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/init.h> #include <linux/clk.h> diff --git a/arch/arm/mach-omap2/sleep.S b/arch/arm/mach-omap2/sleep.S index 00299cbeb91..16247d55785 100644 --- a/arch/arm/mach-omap2/sleep.S +++ b/arch/arm/mach-omap2/sleep.S @@ -21,7 +21,6 @@ * MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/arch/io.h> diff --git a/arch/arm/mach-omap2/sram-fn.S b/arch/arm/mach-omap2/sram-fn.S index d261e4ff4d9..a5ef7f611da 100644 --- a/arch/arm/mach-omap2/sram-fn.S +++ b/arch/arm/mach-omap2/sram-fn.S @@ -22,7 +22,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/arch/io.h> diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 1d2f5ac2f69..fe5fd6d42de 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c @@ -6,6 +6,7 @@ * Copyright (C) 2005 Nokia Corporation * Author: Paul Mundt <paul.mundt@nokia.com> * Juha Yrjölä <juha.yrjola@nokia.com> + * OMAP Dual-mode timer framework support by Timo Teras * * Some parts based off of TI's 24xx code: * @@ -22,54 +23,18 @@ #include <linux/interrupt.h> #include <linux/err.h> #include <linux/clk.h> +#include <linux/delay.h> #include <asm/mach/time.h> -#include <asm/delay.h> -#include <asm/io.h> +#include <asm/arch/dmtimer.h> -#define OMAP2_GP_TIMER1_BASE 0x48028000 -#define OMAP2_GP_TIMER2_BASE 0x4802a000 -#define OMAP2_GP_TIMER3_BASE 0x48078000 -#define OMAP2_GP_TIMER4_BASE 0x4807a000 +static struct omap_dm_timer *gptimer; -#define GP_TIMER_TIDR 0x00 -#define GP_TIMER_TISR 0x18 -#define GP_TIMER_TIER 0x1c -#define GP_TIMER_TCLR 0x24 -#define GP_TIMER_TCRR 0x28 -#define GP_TIMER_TLDR 0x2c -#define GP_TIMER_TSICR 0x40 - -#define OS_TIMER_NR 1 /* GP timer 2 */ - -static unsigned long timer_base[] = { - IO_ADDRESS(OMAP2_GP_TIMER1_BASE), - IO_ADDRESS(OMAP2_GP_TIMER2_BASE), - IO_ADDRESS(OMAP2_GP_TIMER3_BASE), - IO_ADDRESS(OMAP2_GP_TIMER4_BASE), -}; - -static inline unsigned int timer_read_reg(int nr, unsigned int reg) -{ - return __raw_readl(timer_base[nr] + reg); -} - -static inline void timer_write_reg(int nr, unsigned int reg, unsigned int val) -{ - __raw_writel(val, timer_base[nr] + reg); -} - -/* Note that we always enable the clock prescale divider bit */ -static inline void omap2_gp_timer_start(int nr, unsigned long load_val) +static inline void omap2_gp_timer_start(unsigned long load_val) { - unsigned int tmp; - - tmp = 0xffffffff - load_val; - - timer_write_reg(nr, GP_TIMER_TLDR, tmp); - timer_write_reg(nr, GP_TIMER_TCRR, tmp); - timer_write_reg(nr, GP_TIMER_TIER, 1 << 1); - timer_write_reg(nr, GP_TIMER_TCLR, (1 << 5) | (1 << 1) | 1); + omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val); + omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); + omap_dm_timer_start(gptimer); } static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id, @@ -77,7 +42,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id, { write_seqlock(&xtime_lock); - timer_write_reg(OS_TIMER_NR, GP_TIMER_TISR, 1 << 1); + omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW); timer_tick(regs); write_sequnlock(&xtime_lock); @@ -87,41 +52,26 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id, static struct irqaction omap2_gp_timer_irq = { .name = "gp timer", - .flags = SA_INTERRUPT, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = omap2_gp_timer_interrupt, }; static void __init omap2_gp_timer_init(void) { - struct clk * sys_ck; - u32 tick_period = 120000; - u32 l; + u32 tick_period; - /* Reset clock and prescale value */ - timer_write_reg(OS_TIMER_NR, GP_TIMER_TCLR, 0); + omap_dm_timer_init(); + gptimer = omap_dm_timer_request_specific(1); + BUG_ON(gptimer == NULL); - sys_ck = clk_get(NULL, "sys_ck"); - if (IS_ERR(sys_ck)) - printk(KERN_ERR "Could not get sys_ck\n"); - else { - clk_enable(sys_ck); - tick_period = clk_get_rate(sys_ck) / 100; - clk_put(sys_ck); - } - - tick_period /= 2; /* Minimum prescale divider is 2 */ + omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK); + tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / 100; tick_period -= 1; - l = timer_read_reg(OS_TIMER_NR, GP_TIMER_TIDR); - printk(KERN_INFO "OMAP2 GP timer (HW version %d.%d)\n", - (l >> 4) & 0x0f, l & 0x0f); - - setup_irq(38, &omap2_gp_timer_irq); - - omap2_gp_timer_start(OS_TIMER_NR, tick_period); + setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); + omap2_gp_timer_start(tick_period); } struct sys_timer omap_timer = { .init = omap2_gp_timer_init, }; - diff --git a/arch/arm/mach-pnx4008/Makefile b/arch/arm/mach-pnx4008/Makefile new file mode 100644 index 00000000000..b457ca0a431 --- /dev/null +++ b/arch/arm/mach-pnx4008/Makefile @@ -0,0 +1,12 @@ +# +# Makefile for the linux kernel. +# + +obj-y := core.o irq.o time.o clock.o gpio.o serial.o dma.o +obj-m := +obj-n := +obj- := + +# Power Management +obj-$(CONFIG_PM) += pm.o sleep.o + diff --git a/arch/arm/mach-pnx4008/Makefile.boot b/arch/arm/mach-pnx4008/Makefile.boot new file mode 100644 index 00000000000..44c7117e20d --- /dev/null +++ b/arch/arm/mach-pnx4008/Makefile.boot @@ -0,0 +1,4 @@ + zreladdr-y := 0x80008000 +params_phys-y := 0x80000100 +initrd_phys-y := 0x80800000 + diff --git a/arch/arm/mach-pnx4008/clock.c b/arch/arm/mach-pnx4008/clock.c new file mode 100644 index 00000000000..f582ed2ec43 --- /dev/null +++ b/arch/arm/mach-pnx4008/clock.c @@ -0,0 +1,983 @@ +/* + * arch/arm/mach-pnx4008/clock.c + * + * Clock control driver for PNX4008 + * + * Authors: Vitaly Wool, Dmitry Chigirev <source@mvista.com> + * Generic clock management functions are partially based on: + * linux/arch/arm/mach-omap/clock.c + * + * 2005-2006 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/device.h> +#include <linux/err.h> +#include <linux/delay.h> + +#include <asm/semaphore.h> +#include <asm/hardware.h> +#include <asm/io.h> + +#include <asm/arch/clock.h> +#include "clock.h" + +/*forward declaration*/ +static struct clk per_ck; +static struct clk hclk_ck; +static struct clk ck_1MHz; +static struct clk ck_13MHz; +static struct clk ck_pll1; +static int local_set_rate(struct clk *clk, u32 rate); + +static inline void clock_lock(void) +{ + local_irq_disable(); +} + +static inline void clock_unlock(void) +{ + local_irq_enable(); +} + +static void propagate_rate(struct clk *clk) +{ + struct clk *tmp_clk; + + tmp_clk = clk; + while (tmp_clk->propagate_next) { + tmp_clk = tmp_clk->propagate_next; + local_set_rate(tmp_clk, tmp_clk->user_rate); + } +} + +static inline void clk_reg_disable(struct clk *clk) +{ + if (clk->enable_reg) + __raw_writel(__raw_readl(clk->enable_reg) & + ~(1 << clk->enable_shift), clk->enable_reg); +} + +static inline void clk_reg_enable(struct clk *clk) +{ + if (clk->enable_reg) + __raw_writel(__raw_readl(clk->enable_reg) | + (1 << clk->enable_shift), clk->enable_reg); +} + +static inline void clk_reg_disable1(struct clk *clk) +{ + if (clk->enable_reg1) + __raw_writel(__raw_readl(clk->enable_reg1) & + ~(1 << clk->enable_shift1), clk->enable_reg1); +} + +static inline void clk_reg_enable1(struct clk *clk) +{ + if (clk->enable_reg1) + __raw_writel(__raw_readl(clk->enable_reg1) | + (1 << clk->enable_shift1), clk->enable_reg1); +} + +static int clk_wait_for_pll_lock(struct clk *clk) +{ + int i; + i = 0; + while (i++ < 0xFFF && !(__raw_readl(clk->scale_reg) & 1)) ; /*wait for PLL to lock */ + + if (!(__raw_readl(clk->scale_reg) & 1)) { + printk(KERN_ERR + "%s ERROR: failed to lock, scale reg data: %x\n", + clk->name, __raw_readl(clk->scale_reg)); + return -1; + } + return 0; +} + +static int switch_to_dirty_13mhz(struct clk *clk) +{ + int i; + int ret; + u32 tmp_reg; + + ret = 0; + + if (!clk->rate) + clk_reg_enable1(clk); + + tmp_reg = __raw_readl(clk->parent_switch_reg); + /*if 13Mhz clock selected, select 13'MHz (dirty) source from OSC */ + if (!(tmp_reg & 1)) { + tmp_reg |= (1 << 1); /* Trigger switch to 13'MHz (dirty) clock */ + __raw_writel(tmp_reg, clk->parent_switch_reg); + i = 0; + while (i++ < 0xFFF && !(__raw_readl(clk->parent_switch_reg) & 1)) ; /*wait for 13'MHz selection status */ + + if (!(__raw_readl(clk->parent_switch_reg) & 1)) { + printk(KERN_ERR + "%s ERROR: failed to select 13'MHz, parent sw reg data: %x\n", + clk->name, __raw_readl(clk->parent_switch_reg)); + ret = -1; + } + } + + if (!clk->rate) + clk_reg_disable1(clk); + + return ret; +} + +static int switch_to_clean_13mhz(struct clk *clk) +{ + int i; + int ret; + u32 tmp_reg; + + ret = 0; + + if (!clk->rate) + clk_reg_enable1(clk); + + tmp_reg = __raw_readl(clk->parent_switch_reg); + /*if 13'Mhz clock selected, select 13MHz (clean) source from OSC */ + if (tmp_reg & 1) { + tmp_reg &= ~(1 << 1); /* Trigger switch to 13MHz (clean) clock */ + __raw_writel(tmp_reg, clk->parent_switch_reg); + i = 0; + while (i++ < 0xFFF && (__raw_readl(clk->parent_switch_reg) & 1)) ; /*wait for 13MHz selection status */ + + if (__raw_readl(clk->parent_switch_reg) & 1) { + printk(KERN_ERR + "%s ERROR: failed to select 13MHz, parent sw reg data: %x\n", + clk->name, __raw_readl(clk->parent_switch_reg)); + ret = -1; + } + } + + if (!clk->rate) + clk_reg_disable1(clk); + + return ret; +} + +static int set_13MHz_parent(struct clk *clk, struct clk *parent) +{ + int ret = -EINVAL; + + if (parent == &ck_13MHz) + ret = switch_to_clean_13mhz(clk); + else if (parent == &ck_pll1) + ret = switch_to_dirty_13mhz(clk); + + return ret; +} + +#define PLL160_MIN_FCCO 156000 +#define PLL160_MAX_FCCO 320000 + +/* + * Calculate pll160 settings. + * Possible input: up to 320MHz with step of clk->parent->rate. + * In PNX4008 parent rate for pll160s may be either 1 or 13MHz. + * Ignored paths: "feedback" (bit 13 set), "div-by-N". + * Setting ARM PLL4 rate to 0 will put CPU into direct run mode. + * Setting PLL5 and PLL3 rate to 0 will disable USB and DSP clock input. + * Please refer to PNX4008 IC manual for details. + */ + +static int pll160_set_rate(struct clk *clk, u32 rate) +{ + u32 tmp_reg, tmp_m, tmp_2p, i; + u32 parent_rate; + int ret = -EINVAL; + + parent_rate = clk->parent->rate; + + if (!parent_rate) + goto out; + + /* set direct run for ARM or disable output for others */ + clk_reg_disable(clk); + + /* disable source input as well (ignored for ARM) */ + clk_reg_disable1(clk); + + tmp_reg = __raw_readl(clk->scale_reg); + tmp_reg &= ~0x1ffff; /*clear all settings, power down */ + __raw_writel(tmp_reg, clk->scale_reg); + + rate -= rate % parent_rate; /*round down the input */ + + if (rate > PLL160_MAX_FCCO) + rate = PLL160_MAX_FCCO; + + if (!rate) { + clk->rate = 0; + ret = 0; + goto out; + } + + clk_reg_enable1(clk); + tmp_reg = __raw_readl(clk->scale_reg); + + if (rate == parent_rate) { + /*enter direct bypass mode */ + tmp_reg |= ((1 << 14) | (1 << 15)); + __raw_writel(tmp_reg, clk->scale_reg); + clk->rate = parent_rate; + clk_reg_enable(clk); + ret = 0; + goto out; + } + + i = 0; + for (tmp_2p = 1; tmp_2p < 16; tmp_2p <<= 1) { + if (rate * tmp_2p >= PLL160_MIN_FCCO) + break; + i++; + } + + if (tmp_2p > 1) + tmp_reg |= ((i - 1) << 11); + else + tmp_reg |= (1 << 14); /*direct mode, no divide */ + + tmp_m = rate * tmp_2p; + tmp_m /= parent_rate; + + tmp_reg |= (tmp_m - 1) << 1; /*calculate M */ + tmp_reg |= (1 << 16); /*power up PLL */ + __raw_writel(tmp_reg, clk->scale_reg); + + if (clk_wait_for_pll_lock(clk) < 0) { + clk_reg_disable(clk); + clk_reg_disable1(clk); + + tmp_reg = __raw_readl(clk->scale_reg); + tmp_reg &= ~0x1ffff; /*clear all settings, power down */ + __raw_writel(tmp_reg, clk->scale_reg); + clk->rate = 0; + ret = -EFAULT; + goto out; + } + + clk->rate = (tmp_m * parent_rate) / tmp_2p; + + if (clk->flags & RATE_PROPAGATES) + propagate_rate(clk); + + clk_reg_enable(clk); + ret = 0; + +out: + return ret; +} + +/*configure PER_CLK*/ +static int per_clk_set_rate(struct clk *clk, u32 rate) +{ + u32 tmp; + + tmp = __raw_readl(clk->scale_reg); + tmp &= ~(0x1f << 2); + tmp |= ((clk->parent->rate / clk->rate) - 1) << 2; + __raw_writel(tmp, clk->scale_reg); + clk->rate = rate; + return 0; +} + +/*configure HCLK*/ +static int hclk_set_rate(struct clk *clk, u32 rate) +{ + u32 tmp; + tmp = __raw_readl(clk->scale_reg); + tmp = tmp & ~0x3; + switch (rate) { + case 1: + break; + case 2: + tmp |= 1; + break; + case 4: + tmp |= 2; + break; + } + + __raw_writel(tmp, clk->scale_reg); + clk->rate = rate; + return 0; +} + +static u32 hclk_round_rate(struct clk *clk, u32 rate) +{ + switch (rate) { + case 1: + case 4: + return rate; + } + return 2; +} + +static u32 per_clk_round_rate(struct clk *clk, u32 rate) +{ + return CLK_RATE_13MHZ; +} + +static int on_off_set_rate(struct clk *clk, u32 rate) +{ + if (rate) { + clk_reg_enable(clk); + clk->rate = 1; + } else { + clk_reg_disable(clk); + clk->rate = 0; + } + return 0; +} + +static int on_off_inv_set_rate(struct clk *clk, u32 rate) +{ + if (rate) { + clk_reg_disable(clk); /*enable bit is inverted */ + clk->rate = 1; + } else { + clk_reg_enable(clk); + clk->rate = 0; + } + return 0; +} + +static u32 on_off_round_rate(struct clk *clk, u32 rate) +{ + return (rate ? 1 : 0); +} + +static u32 pll4_round_rate(struct clk *clk, u32 rate) +{ + if (rate > CLK_RATE_208MHZ) + rate = CLK_RATE_208MHZ; + if (rate == CLK_RATE_208MHZ && hclk_ck.user_rate == 1) + rate = CLK_RATE_208MHZ - CLK_RATE_13MHZ; + return (rate - (rate % (hclk_ck.user_rate * CLK_RATE_13MHZ))); +} + +static u32 pll3_round_rate(struct clk *clk, u32 rate) +{ + if (rate > CLK_RATE_208MHZ) + rate = CLK_RATE_208MHZ; + return (rate - rate % CLK_RATE_13MHZ); +} + +static u32 pll5_round_rate(struct clk *clk, u32 rate) +{ + return (rate ? CLK_RATE_48MHZ : 0); +} + +static u32 ck_13MHz_round_rate(struct clk *clk, u32 rate) +{ + return (rate ? CLK_RATE_13MHZ : 0); +} + +static int ck_13MHz_set_rate(struct clk *clk, u32 rate) +{ + if (rate) { + clk_reg_disable(clk); /*enable bit is inverted */ + udelay(500); + clk->rate = CLK_RATE_13MHZ; + ck_1MHz.rate = CLK_RATE_1MHZ; + } else { + clk_reg_enable(clk); + clk->rate = 0; + ck_1MHz.rate = 0; + } + return 0; +} + +static int pll1_set_rate(struct clk *clk, u32 rate) +{ +#if 0 /* doesn't work on some boards, probably a HW BUG */ + if (rate) { + clk_reg_disable(clk); /*enable bit is inverted */ + if (!clk_wait_for_pll_lock(clk)) { + clk->rate = CLK_RATE_13MHZ; + } else { + clk_reg_enable(clk); + clk->rate = 0; + } + + } else { + clk_reg_enable(clk); + clk->rate = 0; + } +#endif + return 0; +} + +/* Clock sources */ + +static struct clk osc_13MHz = { + .name = "osc_13MHz", + .flags = FIXED_RATE, + .rate = CLK_RATE_13MHZ, +}; + +static struct clk ck_13MHz = { + .name = "ck_13MHz", + .parent = &osc_13MHz, + .flags = NEEDS_INITIALIZATION, + .round_rate = &ck_13MHz_round_rate, + .set_rate = &ck_13MHz_set_rate, + .enable_reg = OSC13CTRL_REG, + .enable_shift = 0, + .rate = CLK_RATE_13MHZ, +}; + +static struct clk osc_32KHz = { + .name = "osc_32KHz", + .flags = FIXED_RATE, + .rate = CLK_RATE_32KHZ, +}; + +/*attached to PLL5*/ +static struct clk ck_1MHz = { + .name = "ck_1MHz", + .flags = FIXED_RATE | PARENT_SET_RATE, + .parent = &ck_13MHz, +}; + +/* PLL1 (397) - provides 13' MHz clock */ +static struct clk ck_pll1 = { + .name = "ck_pll1", + .parent = &osc_32KHz, + .flags = NEEDS_INITIALIZATION, + .round_rate = &ck_13MHz_round_rate, + .set_rate = &pll1_set_rate, + .enable_reg = PLLCTRL_REG, + .enable_shift = 1, + .scale_reg = PLLCTRL_REG, + .rate = CLK_RATE_13MHZ, +}; + +/* CPU/Bus PLL */ +static struct clk ck_pll4 = { + .name = "ck_pll4", + .parent = &ck_pll1, + .flags = RATE_PROPAGATES | NEEDS_INITIALIZATION, + .propagate_next = &per_ck, + .round_rate = &pll4_round_rate, + .set_rate = &pll160_set_rate, + .rate = CLK_RATE_208MHZ, + .scale_reg = HCLKPLLCTRL_REG, + .enable_reg = PWRCTRL_REG, + .enable_shift = 2, + .parent_switch_reg = SYSCLKCTRL_REG, + .set_parent = &set_13MHz_parent, +}; + +/* USB PLL */ +static struct clk ck_pll5 = { + .name = "ck_pll5", + .parent = &ck_1MHz, + .flags = NEEDS_INITIALIZATION, + .round_rate = &pll5_round_rate, + .set_rate = &pll160_set_rate, + .scale_reg = USBCTRL_REG, + .enable_reg = USBCTRL_REG, + .enable_shift = 18, + .enable_reg1 = USBCTRL_REG, + .enable_shift1 = 17, +}; + +/* XPERTTeak DSP PLL */ +static struct clk ck_pll3 = { + .name = "ck_pll3", + .parent = &ck_pll1, + .flags = NEEDS_INITIALIZATION, + .round_rate = &pll3_round_rate, + .set_rate = &pll160_set_rate, + .scale_reg = DSPPLLCTRL_REG, + .enable_reg = DSPCLKCTRL_REG, + .enable_shift = 3, + .enable_reg1 = DSPCLKCTRL_REG, + .enable_shift1 = 2, + .parent_switch_reg = DSPCLKCTRL_REG, + .set_parent = &set_13MHz_parent, +}; + +static struct clk hclk_ck = { + .name = "hclk_ck", + .parent = &ck_pll4, + .flags = PARENT_SET_RATE, + .set_rate = &hclk_set_rate, + .round_rate = &hclk_round_rate, + .scale_reg = HCLKDIVCTRL_REG, + .rate = 2, + .user_rate = 2, +}; + +static struct clk per_ck = { + .name = "per_ck", + .parent = &ck_pll4, + .flags = FIXED_RATE, + .propagate_next = &hclk_ck, + .set_rate = &per_clk_set_rate, + .round_rate = &per_clk_round_rate, + .scale_reg = HCLKDIVCTRL_REG, + .rate = CLK_RATE_13MHZ, + .user_rate = CLK_RATE_13MHZ, +}; + +static struct clk m2hclk_ck = { + .name = "m2hclk_ck", + .parent = &hclk_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_inv_set_rate, + .rate = 1, + .enable_shift = 6, + .enable_reg = PWRCTRL_REG, +}; + +static struct clk vfp9_ck = { + .name = "vfp9_ck", + .parent = &ck_pll4, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .rate = 1, + .enable_shift = 4, + .enable_reg = VFP9CLKCTRL_REG, +}; + +static struct clk keyscan_ck = { + .name = "keyscan_ck", + .parent = &osc_32KHz, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 0, + .enable_reg = KEYCLKCTRL_REG, +}; + +static struct clk touch_ck = { + .name = "touch_ck", + .parent = &osc_32KHz, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 0, + .enable_reg = TSCLKCTRL_REG, +}; + +static struct clk pwm1_ck = { + .name = "pwm1_ck", + .parent = &osc_32KHz, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 0, + .enable_reg = PWMCLKCTRL_REG, +}; + +static struct clk pwm2_ck = { + .name = "pwm2_ck", + .parent = &osc_32KHz, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 2, + .enable_reg = PWMCLKCTRL_REG, +}; + +static struct clk jpeg_ck = { + .name = "jpeg_ck", + .parent = &hclk_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 0, + .enable_reg = JPEGCLKCTRL_REG, +}; + +static struct clk ms_ck = { + .name = "ms_ck", + .parent = &ck_pll4, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 5, + .enable_reg = MSCTRL_REG, +}; + +static struct clk dum_ck = { + .name = "dum_ck", + .parent = &hclk_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 0, + .enable_reg = DUMCLKCTRL_REG, +}; + +static struct clk flash_ck = { + .name = "flash_ck", + .parent = &hclk_ck, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 1, /* Only MLC clock supported */ + .enable_reg = FLASHCLKCTRL_REG, +}; + +static struct clk i2c0_ck = { + .name = "i2c0_ck", + .parent = &per_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 0, + .enable_reg = I2CCLKCTRL_REG, +}; + +static struct clk i2c1_ck = { + .name = "i2c1_ck", + .parent = &per_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 1, + .enable_reg = I2CCLKCTRL_REG, +}; + +static struct clk i2c2_ck = { + .name = "i2c2_ck", + .parent = &per_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 2, + .enable_reg = USB_OTG_CLKCTRL_REG, +}; + +static struct clk spi0_ck = { + .name = "spi0_ck", + .parent = &hclk_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 0, + .enable_reg = SPICTRL_REG, +}; + +static struct clk spi1_ck = { + .name = "spi1_ck", + .parent = &hclk_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 4, + .enable_reg = SPICTRL_REG, +}; + +static struct clk dma_ck = { + .name = "dma_ck", + .parent = &hclk_ck, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 0, + .enable_reg = DMACLKCTRL_REG, +}; + +static struct clk uart3_ck = { + .name = "uart3_ck", + .parent = &per_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .rate = 1, + .enable_shift = 0, + .enable_reg = UARTCLKCTRL_REG, +}; + +static struct clk uart4_ck = { + .name = "uart4_ck", + .parent = &per_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 1, + .enable_reg = UARTCLKCTRL_REG, +}; + +static struct clk uart5_ck = { + .name = "uart5_ck", + .parent = &per_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .rate = 1, + .enable_shift = 2, + .enable_reg = UARTCLKCTRL_REG, +}; + +static struct clk uart6_ck = { + .name = "uart6_ck", + .parent = &per_ck, + .flags = NEEDS_INITIALIZATION, + .round_rate = &on_off_round_rate, + .set_rate = &on_off_set_rate, + .enable_shift = 3, + .enable_reg = UARTCLKCTRL_REG, +}; + +/* These clocks are visible outside this module + * and can be initialized + */ +static struct clk *onchip_clks[] = { + &ck_13MHz, + &ck_pll1, + &ck_pll4, + &ck_pll5, + &ck_pll3, + &vfp9_ck, + &m2hclk_ck, + &hclk_ck, + &dma_ck, + &flash_ck, + &dum_ck, + &keyscan_ck, + &pwm1_ck, + &pwm2_ck, + &jpeg_ck, + &ms_ck, + &touch_ck, + &i2c0_ck, + &i2c1_ck, + &i2c2_ck, + &spi0_ck, + &spi1_ck, + &uart3_ck, + &uart4_ck, + &uart5_ck, + &uart6_ck, +}; + +static int local_clk_enable(struct clk *clk) +{ + int ret = 0; + + if (!(clk->flags & FIXED_RATE) && !clk->rate && clk->set_rate + && clk->user_rate) + ret = clk->set_rate(clk, clk->user_rate); + return ret; +} + +static void local_clk_disable(struct clk *clk) +{ + if (!(clk->flags & FIXED_RATE) && clk->rate && clk->set_rate) + clk->set_rate(clk, 0); +} + +static void local_clk_unuse(struct clk *clk) +{ + if (clk->usecount > 0 && !(--clk->usecount)) { + local_clk_disable(clk); + if (clk->parent) + local_clk_unuse(clk->parent); + } +} + +static int local_clk_use(struct clk *clk) +{ + int ret = 0; + if (clk->usecount++ == 0) { + if (clk->parent) + ret = local_clk_use(clk->parent); + + if (ret != 0) { + clk->usecount--; + goto out; + } + + ret = local_clk_enable(clk); + + if (ret != 0 && clk->parent) { + local_clk_unuse(clk->parent); + clk->usecount--; + } + } +out: + return ret; +} + +static int local_set_rate(struct clk *clk, u32 rate) +{ + int ret = -EINVAL; + if (clk->set_rate) { + + if (clk->user_rate == clk->rate && clk->parent->rate) { + /* if clock enabled or rate not set */ + clk->user_rate = clk->round_rate(clk, rate); + ret = clk->set_rate(clk, clk->user_rate); + } else + clk->user_rate = clk->round_rate(clk, rate); + ret = 0; + } + return ret; +} + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + int ret = -EINVAL; + + if (clk->flags & FIXED_RATE) + goto out; + + clock_lock(); + if ((clk->flags & PARENT_SET_RATE) && clk->parent) { + + clk->user_rate = clk->round_rate(clk, rate); + /* parent clock needs to be refreshed + for the setting to take effect */ + } else { + ret = local_set_rate(clk, rate); + } + ret = 0; + clock_unlock(); + +out: + return ret; +} + +EXPORT_SYMBOL(clk_set_rate); + +struct clk *clk_get(struct device *dev, const char *id) +{ + struct clk *clk = ERR_PTR(-ENOENT); + struct clk **clkp; + + clock_lock(); + for (clkp = onchip_clks; clkp < onchip_clks + ARRAY_SIZE(onchip_clks); + clkp++) { + if (strcmp(id, (*clkp)->name) == 0 + && try_module_get((*clkp)->owner)) { + clk = (*clkp); + break; + } + } + clock_unlock(); + + return clk; +} +EXPORT_SYMBOL(clk_get); + +void clk_put(struct clk *clk) +{ + clock_lock(); + if (clk && !IS_ERR(clk)) + module_put(clk->owner); + clock_unlock(); +} +EXPORT_SYMBOL(clk_put); + +unsigned long clk_get_rate(struct clk *clk) +{ + unsigned long ret; + clock_lock(); + ret = clk->rate; + clock_unlock(); + return ret; +} +EXPORT_SYMBOL(clk_get_rate); + +int clk_enable(struct clk *clk) +{ + int ret = 0; + + clock_lock(); + ret = local_clk_use(clk); + clock_unlock(); + return ret; +} + +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ + clock_lock(); + local_clk_unuse(clk); + clock_unlock(); +} + +EXPORT_SYMBOL(clk_disable); + +long clk_round_rate(struct clk *clk, unsigned long rate) +{ + long ret; + clock_lock(); + if (clk->round_rate) + ret = clk->round_rate(clk, rate); + else + ret = clk->rate; + clock_unlock(); + return ret; +} + +EXPORT_SYMBOL(clk_round_rate); + +int clk_set_parent(struct clk *clk, struct clk *parent) +{ + int ret = -ENODEV; + if (!clk->set_parent) + goto out; + + clock_lock(); + ret = clk->set_parent(clk, parent); + if (!ret) + clk->parent = parent; + clock_unlock(); + +out: + return ret; +} + +EXPORT_SYMBOL(clk_set_parent); + +static int __init clk_init(void) +{ + struct clk **clkp; + + /* Disable autoclocking, as it doesn't seem to work */ + __raw_writel(0xff, AUTOCLK_CTRL); + + for (clkp = onchip_clks; clkp < onchip_clks + ARRAY_SIZE(onchip_clks); + clkp++) { + if (((*clkp)->flags & NEEDS_INITIALIZATION) + && ((*clkp)->set_rate)) { + (*clkp)->user_rate = (*clkp)->rate; + local_set_rate((*clkp), (*clkp)->user_rate); + if ((*clkp)->set_parent) + (*clkp)->set_parent((*clkp), (*clkp)->parent); + } + pr_debug("%s: clock %s, rate %ld\n", + __FUNCTION__, (*clkp)->name, (*clkp)->rate); + } + + local_clk_use(&ck_pll4); + + /* if ck_13MHz is not used, disable it. */ + if (ck_13MHz.usecount == 0) + local_clk_disable(&ck_13MHz); + + /* Disable autoclocking */ + __raw_writeb(0xff, AUTOCLK_CTRL); + + return 0; +} + +arch_initcall(clk_init); diff --git a/arch/arm/mach-pnx4008/clock.h b/arch/arm/mach-pnx4008/clock.h new file mode 100644 index 00000000000..cd58f372cfd --- /dev/null +++ b/arch/arm/mach-pnx4008/clock.h @@ -0,0 +1,43 @@ +/* + * arch/arm/mach-pnx4008/clock.h + * + * Clock control driver for PNX4008 - internal header file + * + * Author: Vitaly Wool <source@mvista.com> + * + * 2006 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __ARCH_ARM_PNX4008_CLOCK_H__ +#define __ARCH_ARM_PNX4008_CLOCK_H__ + +struct clk { + struct list_head node; + struct module *owner; + const char *name; + struct clk *parent; + struct clk *propagate_next; + u32 rate; + u32 user_rate; + s8 usecount; + u32 flags; + u32 scale_reg; + u8 enable_shift; + u32 enable_reg; + u8 enable_shift1; + u32 enable_reg1; + u32 parent_switch_reg; + u32(*round_rate) (struct clk *, u32); + int (*set_rate) (struct clk *, u32); + int (*set_parent) (struct clk * clk, struct clk * parent); +}; + +/* Flags */ +#define RATE_PROPAGATES (1<<0) +#define NEEDS_INITIALIZATION (1<<1) +#define PARENT_SET_RATE (1<<2) +#define FIXED_RATE (1<<3) + +#endif diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c new file mode 100644 index 00000000000..ba91daad64f --- /dev/null +++ b/arch/arm/mach-pnx4008/core.c @@ -0,0 +1,207 @@ +/* + * arch/arm/mach-pnx4008/core.c + * + * PNX4008 core startup code + * + * Authors: Vitaly Wool, Dmitry Chigirev, + * Grigory Tolstolytkin, Dmitry Pervushin <source@mvista.com> + * + * Based on reference code received from Philips: + * Copyright (C) 2003 Philips Semiconductors + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/mm.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/init.h> +#include <linux/ioport.h> +#include <linux/serial_8250.h> +#include <linux/device.h> +#include <linux/spi/spi.h> + +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/io.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/pgtable.h> +#include <asm/page.h> +#include <asm/system.h> + +#include <asm/mach/arch.h> +#include <asm/mach/irq.h> +#include <asm/mach/map.h> +#include <asm/mach/time.h> + +#include <asm/arch/irq.h> +#include <asm/arch/clock.h> +#include <asm/arch/dma.h> + +struct resource spipnx_0_resources[] = { + { + .start = PNX4008_SPI1_BASE, + .end = PNX4008_SPI1_BASE + SZ_4K, + .flags = IORESOURCE_MEM, + }, { + .start = PER_SPI1_REC_XMIT, + .flags = IORESOURCE_DMA, + }, { + .start = SPI1_INT, + .flags = IORESOURCE_IRQ, + }, { + .flags = 0, + }, +}; + +struct resource spipnx_1_resources[] = { + { + .start = PNX4008_SPI2_BASE, + .end = PNX4008_SPI2_BASE + SZ_4K, + .flags = IORESOURCE_MEM, + }, { + .start = PER_SPI2_REC_XMIT, + .flags = IORESOURCE_DMA, + }, { + .start = SPI2_INT, + .flags = IORESOURCE_IRQ, + }, { + .flags = 0, + } +}; + +static struct spi_board_info spi_board_info[] __initdata = { + { + .modalias = "m25p80", + .max_speed_hz = 1000000, + .bus_num = 1, + .chip_select = 0, + }, +}; + +static struct platform_device spipnx_1 = { + .name = "spipnx", + .id = 1, + .num_resources = ARRAY_SIZE(spipnx_0_resources), + .resource = spipnx_0_resources, + .dev = { + .coherent_dma_mask = 0xFFFFFFFF, + }, +}; + +static struct platform_device spipnx_2 = { + .name = "spipnx", + .id = 2, + .num_resources = ARRAY_SIZE(spipnx_1_resources), + .resource = spipnx_1_resources, + .dev = { + .coherent_dma_mask = 0xFFFFFFFF, + }, +}; + +static struct plat_serial8250_port platform_serial_ports[] = { + { + .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART5_BASE)), + .mapbase = (unsigned long)PNX4008_UART5_BASE, + .irq = IIR5_INT, + .uartclk = PNX4008_UART_CLK, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST, + }, + { + .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART3_BASE)), + .mapbase = (unsigned long)PNX4008_UART3_BASE, + .irq = IIR3_INT, + .uartclk = PNX4008_UART_CLK, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST, + }, + {} +}; + +static struct platform_device serial_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = &platform_serial_ports, + }, +}; + +static struct platform_device *devices[] __initdata = { + &spipnx_1, + &spipnx_2, + &serial_device, +}; + + +extern void pnx4008_uart_init(void); + +static void __init pnx4008_init(void) +{ + /*disable all START interrupt sources, + and clear all START interrupt flags */ + __raw_writel(0, START_INT_ER_REG(SE_PIN_BASE_INT)); + __raw_writel(0, START_INT_ER_REG(SE_INT_BASE_INT)); + __raw_writel(0xffffffff, START_INT_RSR_REG(SE_PIN_BASE_INT)); + __raw_writel(0xffffffff, START_INT_RSR_REG(SE_INT_BASE_INT)); + + platform_add_devices(devices, ARRAY_SIZE(devices)); + spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); + /* Switch on the UART clocks */ + pnx4008_uart_init(); +} + +static struct map_desc pnx4008_io_desc[] __initdata = { + { + .virtual = IO_ADDRESS(PNX4008_IRAM_BASE), + .pfn = __phys_to_pfn(PNX4008_IRAM_BASE), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = IO_ADDRESS(PNX4008_NDF_FLASH_BASE), + .pfn = __phys_to_pfn(PNX4008_NDF_FLASH_BASE), + .length = SZ_1M - SZ_128K, + .type = MT_DEVICE, + }, { + .virtual = IO_ADDRESS(PNX4008_JPEG_CONFIG_BASE), + .pfn = __phys_to_pfn(PNX4008_JPEG_CONFIG_BASE), + .length = SZ_128K * 3, + .type = MT_DEVICE, + }, { + .virtual = IO_ADDRESS(PNX4008_DMA_CONFIG_BASE), + .pfn = __phys_to_pfn(PNX4008_DMA_CONFIG_BASE), + .length = SZ_1M, + .type = MT_DEVICE, + }, { + .virtual = IO_ADDRESS(PNX4008_AHB2FAB_BASE), + .pfn = __phys_to_pfn(PNX4008_AHB2FAB_BASE), + .length = SZ_1M, + .type = MT_DEVICE, + }, +}; + +void __init pnx4008_map_io(void) +{ + iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc)); +} + +extern struct sys_timer pnx4008_timer; + +MACHINE_START(PNX4008, "Philips PNX4008") + /* Maintainer: MontaVista Software Inc. */ + .phys_io = 0x40090000, + .io_pg_offst = (0xf4090000 >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = pnx4008_map_io, + .init_irq = pnx4008_init_irq, + .init_machine = pnx4008_init, + .timer = &pnx4008_timer, +MACHINE_END diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c new file mode 100644 index 00000000000..981aa9dcded --- /dev/null +++ b/arch/arm/mach-pnx4008/dma.c @@ -0,0 +1,1109 @@ +/* + * linux/arch/arm/mach-pnx4008/dma.c + * + * PNX4008 DMA registration and IRQ dispatching + * + * Author: Vitaly Wool + * Copyright: MontaVista Software Inc. (c) 2005 + * + * Based on the code from Nicolas Pitre + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/dma-mapping.h> +#include <linux/clk.h> + +#include <asm/system.h> +#include <asm/irq.h> +#include <asm/hardware.h> +#include <asm/dma.h> +#include <asm/dma-mapping.h> +#include <asm/io.h> +#include <asm/mach/dma.h> +#include <asm/arch/clock.h> + +static struct dma_channel { + char *name; + void (*irq_handler) (int, int, void *, struct pt_regs *); + void *data; + struct pnx4008_dma_ll *ll; + u32 ll_dma; + void *target_addr; + int target_id; +} dma_channels[MAX_DMA_CHANNELS]; + +static struct ll_pool { + void *vaddr; + void *cur; + dma_addr_t dma_addr; + int count; +} ll_pool; + +static spinlock_t ll_lock = SPIN_LOCK_UNLOCKED; + +struct pnx4008_dma_ll *pnx4008_alloc_ll_entry(dma_addr_t * ll_dma) +{ + struct pnx4008_dma_ll *ll = NULL; + unsigned long flags; + + spin_lock_irqsave(&ll_lock, flags); + if (ll_pool.count > 4) { /* can give one more */ + ll = *(struct pnx4008_dma_ll **) ll_pool.cur; + *ll_dma = ll_pool.dma_addr + ((void *)ll - ll_pool.vaddr); + *(void **)ll_pool.cur = **(void ***)ll_pool.cur; + memset(ll, 0, sizeof(*ll)); + ll_pool.count--; + } + spin_unlock_irqrestore(&ll_lock, flags); + + return ll; +} + +EXPORT_SYMBOL_GPL(pnx4008_alloc_ll_entry); + +void pnx4008_free_ll_entry(struct pnx4008_dma_ll * ll, dma_addr_t ll_dma) +{ + unsigned long flags; + + if (ll) { + if ((unsigned long)((long)ll - (long)ll_pool.vaddr) > 0x4000) { + printk(KERN_ERR "Trying to free entry not allocated by DMA\n"); + BUG(); + } + + if (ll->flags & DMA_BUFFER_ALLOCATED) + ll->free(ll->alloc_data); + + spin_lock_irqsave(&ll_lock, flags); + *(long *)ll = *(long *)ll_pool.cur; + *(long *)ll_pool.cur = (long)ll; + ll_pool.count++; + spin_unlock_irqrestore(&ll_lock, flags); + } +} + +EXPORT_SYMBOL_GPL(pnx4008_free_ll_entry); + +void pnx4008_free_ll(u32 ll_dma, struct pnx4008_dma_ll * ll) +{ + struct pnx4008_dma_ll *ptr; + u32 dma; + + while (ll) { + dma = ll->next_dma; + ptr = ll->next; + pnx4008_free_ll_entry(ll, ll_dma); + + ll_dma = dma; + ll = ptr; + } +} + +EXPORT_SYMBOL_GPL(pnx4008_free_ll); + +static int dma_channels_requested = 0; + +static inline void dma_increment_usage(void) +{ + if (!dma_channels_requested++) { + struct clk *clk = clk_get(0, "dma_ck"); + if (!IS_ERR(clk)) { + clk_set_rate(clk, 1); + clk_put(clk); + } + pnx4008_config_dma(-1, -1, 1); + } +} +static inline void dma_decrement_usage(void) +{ + if (!--dma_channels_requested) { + struct clk *clk = clk_get(0, "dma_ck"); + if (!IS_ERR(clk)) { + clk_set_rate(clk, 0); + clk_put(clk); + } + pnx4008_config_dma(-1, -1, 0); + + } +} + +static spinlock_t dma_lock = SPIN_LOCK_UNLOCKED; + +static inline void pnx4008_dma_lock(void) +{ + spin_lock_irq(&dma_lock); +} + +static inline void pnx4008_dma_unlock(void) +{ + spin_unlock_irq(&dma_lock); +} + +#define VALID_CHANNEL(c) (((c) >= 0) && ((c) < MAX_DMA_CHANNELS)) + +int pnx4008_request_channel(char *name, int ch, + void (*irq_handler) (int, int, void *, + struct pt_regs *), void *data) +{ + int i, found = 0; + + /* basic sanity checks */ + if (!name || (ch != -1 && !VALID_CHANNEL(ch))) + return -EINVAL; + + pnx4008_dma_lock(); + + /* try grabbing a DMA channel with the requested priority */ + for (i = MAX_DMA_CHANNELS - 1; i >= 0; i--) { + if (!dma_channels[i].name && (ch == -1 || ch == i)) { + found = 1; + break; + } + } + + if (found) { + dma_increment_usage(); + dma_channels[i].name = name; + dma_channels[i].irq_handler = irq_handler; + dma_channels[i].data = data; + dma_channels[i].ll = NULL; + dma_channels[i].ll_dma = 0; + } else { + printk(KERN_WARNING "No more available DMA channels for %s\n", + name); + i = -ENODEV; + } + + pnx4008_dma_unlock(); + return i; +} + +EXPORT_SYMBOL_GPL(pnx4008_request_channel); + +void pnx4008_free_channel(int ch) +{ + if (!dma_channels[ch].name) { + printk(KERN_CRIT + "%s: trying to free channel %d which is already freed\n", + __FUNCTION__, ch); + return; + } + + pnx4008_dma_lock(); + pnx4008_free_ll(dma_channels[ch].ll_dma, dma_channels[ch].ll); + dma_channels[ch].ll = NULL; + dma_decrement_usage(); + + dma_channels[ch].name = NULL; + pnx4008_dma_unlock(); +} + +EXPORT_SYMBOL_GPL(pnx4008_free_channel); + +int pnx4008_config_dma(int ahb_m1_be, int ahb_m2_be, int enable) +{ + unsigned long dma_cfg = __raw_readl(DMAC_CONFIG); + + switch (ahb_m1_be) { + case 0: + dma_cfg &= ~(1 << 1); + break; + case 1: + dma_cfg |= (1 << 1); + break; + default: + break; + } + + switch (ahb_m2_be) { + case 0: + dma_cfg &= ~(1 << 2); + break; + case 1: + dma_cfg |= (1 << 2); + break; + default: + break; + } + + switch (enable) { + case 0: + dma_cfg &= ~(1 << 0); + break; + case 1: + dma_cfg |= (1 << 0); + break; + default: + break; + } + + pnx4008_dma_lock(); + __raw_writel(dma_cfg, DMAC_CONFIG); + pnx4008_dma_unlock(); + + return 0; +} + +EXPORT_SYMBOL_GPL(pnx4008_config_dma); + +int pnx4008_dma_pack_control(const struct pnx4008_dma_ch_ctrl * ch_ctrl, + unsigned long *ctrl) +{ + int i = 0, dbsize, sbsize, err = 0; + + if (!ctrl || !ch_ctrl) { + err = -EINVAL; + goto out; + } + + *ctrl = 0; + + switch (ch_ctrl->tc_mask) { + case 0: + break; + case 1: + *ctrl |= (1 << 31); + break; + + default: + err = -EINVAL; + goto out; + } + + switch (ch_ctrl->cacheable) { + case 0: + break; + case 1: + *ctrl |= (1 << 30); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_ctrl->bufferable) { + case 0: + break; + case 1: + *ctrl |= (1 << 29); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_ctrl->priv_mode) { + case 0: + break; + case 1: + *ctrl |= (1 << 28); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_ctrl->di) { + case 0: + break; + case 1: + *ctrl |= (1 << 27); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_ctrl->si) { + case 0: + break; + case 1: + *ctrl |= (1 << 26); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_ctrl->dest_ahb1) { + case 0: + break; + case 1: + *ctrl |= (1 << 25); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_ctrl->src_ahb1) { + case 0: + break; + case 1: + *ctrl |= (1 << 24); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_ctrl->dwidth) { + case WIDTH_BYTE: + *ctrl &= ~(7 << 21); + break; + case WIDTH_HWORD: + *ctrl &= ~(7 << 21); + *ctrl |= (1 << 21); + break; + case WIDTH_WORD: + *ctrl &= ~(7 << 21); + *ctrl |= (2 << 21); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_ctrl->swidth) { + case WIDTH_BYTE: + *ctrl &= ~(7 << 18); + break; + case WIDTH_HWORD: + *ctrl &= ~(7 << 18); + *ctrl |= (1 << 18); + break; + case WIDTH_WORD: + *ctrl &= ~(7 << 18); + *ctrl |= (2 << 18); + break; + + default: + err = -EINVAL; + goto out; + } + dbsize = ch_ctrl->dbsize; + while (!(dbsize & 1)) { + i++; + dbsize >>= 1; + } + if (ch_ctrl->dbsize != 1 || i > 8 || i == 1) { + err = -EINVAL; + goto out; + } else if (i > 1) + i--; + *ctrl &= ~(7 << 15); + *ctrl |= (i << 15); + + sbsize = ch_ctrl->sbsize; + while (!(sbsize & 1)) { + i++; + sbsize >>= 1; + } + if (ch_ctrl->sbsize != 1 || i > 8 || i == 1) { + err = -EINVAL; + goto out; + } else if (i > 1) + i--; + *ctrl &= ~(7 << 12); + *ctrl |= (i << 12); + + if (ch_ctrl->tr_size > 0x7ff) { + err = -E2BIG; + goto out; + } + *ctrl &= ~0x7ff; + *ctrl |= ch_ctrl->tr_size & 0x7ff; + +out: + return err; +} + +EXPORT_SYMBOL_GPL(pnx4008_dma_pack_control); + +int pnx4008_dma_parse_control(unsigned long ctrl, + struct pnx4008_dma_ch_ctrl * ch_ctrl) +{ + int err = 0; + + if (!ch_ctrl) { + err = -EINVAL; + goto out; + } + + ch_ctrl->tr_size = ctrl & 0x7ff; + ctrl >>= 12; + + ch_ctrl->sbsize = 1 << (ctrl & 7); + if (ch_ctrl->sbsize > 1) + ch_ctrl->sbsize <<= 1; + ctrl >>= 3; + + ch_ctrl->dbsize = 1 << (ctrl & 7); + if (ch_ctrl->dbsize > 1) + ch_ctrl->dbsize <<= 1; + ctrl >>= 3; + + switch (ctrl & 7) { + case 0: + ch_ctrl->swidth = WIDTH_BYTE; + break; + case 1: + ch_ctrl->swidth = WIDTH_HWORD; + break; + case 2: + ch_ctrl->swidth = WIDTH_WORD; + break; + default: + err = -EINVAL; + goto out; + } + ctrl >>= 3; + + switch (ctrl & 7) { + case 0: + ch_ctrl->dwidth = WIDTH_BYTE; + break; + case 1: + ch_ctrl->dwidth = WIDTH_HWORD; + break; + case 2: + ch_ctrl->dwidth = WIDTH_WORD; + break; + default: + err = -EINVAL; + goto out; + } + ctrl >>= 3; + + ch_ctrl->src_ahb1 = ctrl & 1; + ctrl >>= 1; + + ch_ctrl->dest_ahb1 = ctrl & 1; + ctrl >>= 1; + + ch_ctrl->si = ctrl & 1; + ctrl >>= 1; + + ch_ctrl->di = ctrl & 1; + ctrl >>= 1; + + ch_ctrl->priv_mode = ctrl & 1; + ctrl >>= 1; + + ch_ctrl->bufferable = ctrl & 1; + ctrl >>= 1; + + ch_ctrl->cacheable = ctrl & 1; + ctrl >>= 1; + + ch_ctrl->tc_mask = ctrl & 1; + +out: + return err; +} + +EXPORT_SYMBOL_GPL(pnx4008_dma_parse_control); + +int pnx4008_dma_pack_config(const struct pnx4008_dma_ch_config * ch_cfg, + unsigned long *cfg) +{ + int err = 0; + + if (!cfg || !ch_cfg) { + err = -EINVAL; + goto out; + } + + *cfg = 0; + + switch (ch_cfg->halt) { + case 0: + break; + case 1: + *cfg |= (1 << 18); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_cfg->active) { + case 0: + break; + case 1: + *cfg |= (1 << 17); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_cfg->lock) { + case 0: + break; + case 1: + *cfg |= (1 << 16); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_cfg->itc) { + case 0: + break; + case 1: + *cfg |= (1 << 15); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_cfg->ie) { + case 0: + break; + case 1: + *cfg |= (1 << 14); + break; + + default: + err = -EINVAL; + goto out; + } + switch (ch_cfg->flow_cntrl) { + case FC_MEM2MEM_DMA: + *cfg &= ~(7 << 11); + break; + case FC_MEM2PER_DMA: + *cfg &= ~(7 << 11); + *cfg |= (1 << 11); + break; + case FC_PER2MEM_DMA: + *cfg &= ~(7 << 11); + *cfg |= (2 << 11); + break; + case FC_PER2PER_DMA: + *cfg &= ~(7 << 11); + *cfg |= (3 << 11); + break; + case FC_PER2PER_DPER: + *cfg &= ~(7 << 11); + *cfg |= (4 << 11); + break; + case FC_MEM2PER_PER: + *cfg &= ~(7 << 11); + *cfg |= (5 << 11); + break; + case FC_PER2MEM_PER: + *cfg &= ~(7 << 11); + *cfg |= (6 << 11); + break; + case FC_PER2PER_SPER: + *cfg |= (7 << 11); + break; + + default: + err = -EINVAL; + goto out; + } + *cfg &= ~(0x1f << 6); + *cfg |= ((ch_cfg->dest_per & 0x1f) << 6); + + *cfg &= ~(0x1f << 1); + *cfg |= ((ch_cfg->src_per & 0x1f) << 1); + +out: + return err; +} + +EXPORT_SYMBOL_GPL(pnx4008_dma_pack_config); + +int pnx4008_dma_parse_config(unsigned long cfg, + struct pnx4008_dma_ch_config * ch_cfg) +{ + int err = 0; + + if (!ch_cfg) { + err = -EINVAL; + goto out; + } + + cfg >>= 1; + + ch_cfg->src_per = cfg & 0x1f; + cfg >>= 5; + + ch_cfg->dest_per = cfg & 0x1f; + cfg >>= 5; + + switch (cfg & 7) { + case 0: + ch_cfg->flow_cntrl = FC_MEM2MEM_DMA; + break; + case 1: + ch_cfg->flow_cntrl = FC_MEM2PER_DMA; + break; + case 2: + ch_cfg->flow_cntrl = FC_PER2MEM_DMA; + break; + case 3: + ch_cfg->flow_cntrl = FC_PER2PER_DMA; + break; + case 4: + ch_cfg->flow_cntrl = FC_PER2PER_DPER; + break; + case 5: + ch_cfg->flow_cntrl = FC_MEM2PER_PER; + break; + case 6: + ch_cfg->flow_cntrl = FC_PER2MEM_PER; + break; + case 7: + ch_cfg->flow_cntrl = FC_PER2PER_SPER; + } + cfg >>= 3; + + ch_cfg->ie = cfg & 1; + cfg >>= 1; + + ch_cfg->itc = cfg & 1; + cfg >>= 1; + + ch_cfg->lock = cfg & 1; + cfg >>= 1; + + ch_cfg->active = cfg & 1; + cfg >>= 1; + + ch_cfg->halt = cfg & 1; + +out: + return err; +} + +EXPORT_SYMBOL_GPL(pnx4008_dma_parse_config); + +void pnx4008_dma_split_head_entry(struct pnx4008_dma_config * config, + struct pnx4008_dma_ch_ctrl * ctrl) +{ + int new_len = ctrl->tr_size, num_entries = 0; + int old_len = new_len; + int src_width, dest_width, count = 1; + + switch (ctrl->swidth) { + case WIDTH_BYTE: + src_width = 1; + break; + case WIDTH_HWORD: + src_width = 2; + break; + case WIDTH_WORD: + src_width = 4; + break; + default: + return; + } + + switch (ctrl->dwidth) { + case WIDTH_BYTE: + dest_width = 1; + break; + case WIDTH_HWORD: + dest_width = 2; + break; + case WIDTH_WORD: + dest_width = 4; + break; + default: + return; + } + + while (new_len > 0x7FF) { + num_entries++; + new_len = (ctrl->tr_size + num_entries) / (num_entries + 1); + } + if (num_entries != 0) { + struct pnx4008_dma_ll *ll = NULL; + config->ch_ctrl &= ~0x7ff; + config->ch_ctrl |= new_len; + if (!config->is_ll) { + config->is_ll = 1; + while (num_entries) { + if (!ll) { + config->ll = + pnx4008_alloc_ll_entry(&config-> + ll_dma); + ll = config->ll; + } else { + ll->next = + pnx4008_alloc_ll_entry(&ll-> + next_dma); + ll = ll->next; + } + + if (ctrl->si) + ll->src_addr = + config->src_addr + + src_width * new_len * count; + else + ll->src_addr = config->src_addr; + if (ctrl->di) + ll->dest_addr = + config->dest_addr + + dest_width * new_len * count; + else + ll->dest_addr = config->dest_addr; + ll->ch_ctrl = config->ch_ctrl & 0x7fffffff; + ll->next_dma = 0; + ll->next = NULL; + num_entries--; + count++; + } + } else { + struct pnx4008_dma_ll *ll_old = config->ll; + unsigned long ll_dma_old = config->ll_dma; + while (num_entries) { + if (!ll) { + config->ll = + pnx4008_alloc_ll_entry(&config-> + ll_dma); + ll = config->ll; + } else { + ll->next = + pnx4008_alloc_ll_entry(&ll-> + next_dma); + ll = ll->next; + } + + if (ctrl->si) + ll->src_addr = + config->src_addr + + src_width * new_len * count; + else + ll->src_addr = config->src_addr; + if (ctrl->di) + ll->dest_addr = + config->dest_addr + + dest_width * new_len * count; + else + ll->dest_addr = config->dest_addr; + ll->ch_ctrl = config->ch_ctrl & 0x7fffffff; + ll->next_dma = 0; + ll->next = NULL; + num_entries--; + count++; + } + ll->next_dma = ll_dma_old; + ll->next = ll_old; + } + /* adjust last length/tc */ + ll->ch_ctrl = config->ch_ctrl & (~0x7ff); + ll->ch_ctrl |= old_len - new_len * (count - 1); + config->ch_ctrl &= 0x7fffffff; + } +} + +EXPORT_SYMBOL_GPL(pnx4008_dma_split_head_entry); + +void pnx4008_dma_split_ll_entry(struct pnx4008_dma_ll * cur_ll, + struct pnx4008_dma_ch_ctrl * ctrl) +{ + int new_len = ctrl->tr_size, num_entries = 0; + int old_len = new_len; + int src_width, dest_width, count = 1; + + switch (ctrl->swidth) { + case WIDTH_BYTE: + src_width = 1; + break; + case WIDTH_HWORD: + src_width = 2; + break; + case WIDTH_WORD: + src_width = 4; + break; + default: + return; + } + + switch (ctrl->dwidth) { + case WIDTH_BYTE: + dest_width = 1; + break; + case WIDTH_HWORD: + dest_width = 2; + break; + case WIDTH_WORD: + dest_width = 4; + break; + default: + return; + } + + while (new_len > 0x7FF) { + num_entries++; + new_len = (ctrl->tr_size + num_entries) / (num_entries + 1); + } + if (num_entries != 0) { + struct pnx4008_dma_ll *ll = NULL; + cur_ll->ch_ctrl &= ~0x7ff; + cur_ll->ch_ctrl |= new_len; + if (!cur_ll->next) { + while (num_entries) { + if (!ll) { + cur_ll->next = + pnx4008_alloc_ll_entry(&cur_ll-> + next_dma); + ll = cur_ll->next; + } else { + ll->next = + pnx4008_alloc_ll_entry(&ll-> + next_dma); + ll = ll->next; + } + + if (ctrl->si) + ll->src_addr = + cur_ll->src_addr + + src_width * new_len * count; + else + ll->src_addr = cur_ll->src_addr; + if (ctrl->di) + ll->dest_addr = + cur_ll->dest_addr + + dest_width * new_len * count; + else + ll->dest_addr = cur_ll->dest_addr; + ll->ch_ctrl = cur_ll->ch_ctrl & 0x7fffffff; + ll->next_dma = 0; + ll->next = NULL; + num_entries--; + count++; + } + } else { + struct pnx4008_dma_ll *ll_old = cur_ll->next; + unsigned long ll_dma_old = cur_ll->next_dma; + while (num_entries) { + if (!ll) { + cur_ll->next = + pnx4008_alloc_ll_entry(&cur_ll-> + next_dma); + ll = cur_ll->next; + } else { + ll->next = + pnx4008_alloc_ll_entry(&ll-> + next_dma); + ll = ll->next; + } + + if (ctrl->si) + ll->src_addr = + cur_ll->src_addr + + src_width * new_len * count; + else + ll->src_addr = cur_ll->src_addr; + if (ctrl->di) + ll->dest_addr = + cur_ll->dest_addr + + dest_width * new_len * count; + else + ll->dest_addr = cur_ll->dest_addr; + ll->ch_ctrl = cur_ll->ch_ctrl & 0x7fffffff; + ll->next_dma = 0; + ll->next = NULL; + num_entries--; + count++; + } + + ll->next_dma = ll_dma_old; + ll->next = ll_old; + } + /* adjust last length/tc */ + ll->ch_ctrl = cur_ll->ch_ctrl & (~0x7ff); + ll->ch_ctrl |= old_len - new_len * (count - 1); + cur_ll->ch_ctrl &= 0x7fffffff; + } +} + +EXPORT_SYMBOL_GPL(pnx4008_dma_split_ll_entry); + +int pnx4008_config_channel(int ch, struct pnx4008_dma_config * config) +{ + if (!VALID_CHANNEL(ch) || !dma_channels[ch].name) + return -EINVAL; + + pnx4008_dma_lock(); + __raw_writel(config->src_addr, DMAC_Cx_SRC_ADDR(ch)); + __raw_writel(config->dest_addr, DMAC_Cx_DEST_ADDR(ch)); + + if (config->is_ll) + __raw_writel(config->ll_dma, DMAC_Cx_LLI(ch)); + else + __raw_writel(0, DMAC_Cx_LLI(ch)); + + __raw_writel(config->ch_ctrl, DMAC_Cx_CONTROL(ch)); + __raw_writel(config->ch_cfg, DMAC_Cx_CONFIG(ch)); + pnx4008_dma_unlock(); + + return 0; + +} + +EXPORT_SYMBOL_GPL(pnx4008_config_channel); + +int pnx4008_channel_get_config(int ch, struct pnx4008_dma_config * config) +{ + if (!VALID_CHANNEL(ch) || !dma_channels[ch].name || !config) + return -EINVAL; + + pnx4008_dma_lock(); + config->ch_cfg = __raw_readl(DMAC_Cx_CONFIG(ch)); + config->ch_ctrl = __raw_readl(DMAC_Cx_CONTROL(ch)); + + config->ll_dma = __raw_readl(DMAC_Cx_LLI(ch)); + config->is_ll = config->ll_dma ? 1 : 0; + + config->src_addr = __raw_readl(DMAC_Cx_SRC_ADDR(ch)); + config->dest_addr = __raw_readl(DMAC_Cx_DEST_ADDR(ch)); + pnx4008_dma_unlock(); + + return 0; +} + +EXPORT_SYMBOL_GPL(pnx4008_channel_get_config); + +int pnx4008_dma_ch_enable(int ch) +{ + unsigned long ch_cfg; + + if (!VALID_CHANNEL(ch) || !dma_channels[ch].name) + return -EINVAL; + + pnx4008_dma_lock(); + ch_cfg = __raw_readl(DMAC_Cx_CONFIG(ch)); + ch_cfg |= 1; + __raw_writel(ch_cfg, DMAC_Cx_CONFIG(ch)); + pnx4008_dma_unlock(); + + return 0; +} + +EXPORT_SYMBOL_GPL(pnx4008_dma_ch_enable); + +int pnx4008_dma_ch_disable(int ch) +{ + unsigned long ch_cfg; + + if (!VALID_CHANNEL(ch) || !dma_channels[ch].name) + return -EINVAL; + + pnx4008_dma_lock(); + ch_cfg = __raw_readl(DMAC_Cx_CONFIG(ch)); + ch_cfg &= ~1; + __raw_writel(ch_cfg, DMAC_Cx_CONFIG(ch)); + pnx4008_dma_unlock(); + + return 0; +} + +EXPORT_SYMBOL_GPL(pnx4008_dma_ch_disable); + +int pnx4008_dma_ch_enabled(int ch) +{ + unsigned long ch_cfg; + + if (!VALID_CHANNEL(ch) || !dma_channels[ch].name) + return -EINVAL; + + pnx4008_dma_lock(); + ch_cfg = __raw_readl(DMAC_Cx_CONFIG(ch)); + pnx4008_dma_unlock(); + + return ch_cfg & 1; +} + +EXPORT_SYMBOL_GPL(pnx4008_dma_ch_enabled); + +static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs) +{ + int i; + unsigned long dint = __raw_readl(DMAC_INT_STAT); + unsigned long tcint = __raw_readl(DMAC_INT_TC_STAT); + unsigned long eint = __raw_readl(DMAC_INT_ERR_STAT); + unsigned long i_bit; + + for (i = MAX_DMA_CHANNELS - 1; i >= 0; i--) { + i_bit = 1 << i; + if (dint & i_bit) { + struct dma_channel *channel = &dma_channels[i]; + + if (channel->name && channel->irq_handler) { + int cause = 0; + + if (eint & i_bit) + cause |= DMA_ERR_INT; + if (tcint & i_bit) + cause |= DMA_TC_INT; + channel->irq_handler(i, cause, channel->data, + regs); + } else { + /* + * IRQ for an unregistered DMA channel + */ + printk(KERN_WARNING + "spurious IRQ for DMA channel %d\n", i); + } + if (tcint & i_bit) + __raw_writel(i_bit, DMAC_INT_TC_CLEAR); + if (eint & i_bit) + __raw_writel(i_bit, DMAC_INT_ERR_CLEAR); + } + } + return IRQ_HANDLED; +} + +static int __init pnx4008_dma_init(void) +{ + int ret, i; + + ret = request_irq(DMA_INT, dma_irq_handler, 0, "DMA", NULL); + if (ret) { + printk(KERN_CRIT "Wow! Can't register IRQ for DMA\n"); + goto out; + } + + ll_pool.count = 0x4000 / sizeof(struct pnx4008_dma_ll); + ll_pool.cur = ll_pool.vaddr = + dma_alloc_coherent(NULL, ll_pool.count * sizeof(struct pnx4008_dma_ll), + &ll_pool.dma_addr, GFP_KERNEL); + + if (!ll_pool.vaddr) { + ret = -ENOMEM; + free_irq(DMA_INT, NULL); + goto out; + } + + for (i = 0; i < ll_pool.count - 1; i++) { + void **addr = ll_pool.vaddr + i * sizeof(struct pnx4008_dma_ll); + *addr = (void *)addr + sizeof(struct pnx4008_dma_ll); + } + *(long *)(ll_pool.vaddr + + (ll_pool.count - 1) * sizeof(struct pnx4008_dma_ll)) = + (long)ll_pool.vaddr; + + __raw_writel(1, DMAC_CONFIG); + +out: + return ret; +} +arch_initcall(pnx4008_dma_init); diff --git a/arch/arm/mach-pnx4008/gpio.c b/arch/arm/mach-pnx4008/gpio.c new file mode 100644 index 00000000000..e1ce050d8fe --- /dev/null +++ b/arch/arm/mach-pnx4008/gpio.c @@ -0,0 +1,330 @@ +/* + * arch/arm/mach-pnx4008/gpio.c + * + * PNX4008 GPIO driver + * + * Author: Dmitry Chigirev <source@mvista.com> + * + * Based on reference code by Iwo Mergler and Z.Tabaaloute from Philips: + * Copyright (c) 2005 Koninklijke Philips Electronics N.V. + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#include <linux/config.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <asm/semaphore.h> +#include <asm/io.h> +#include <asm/arch/platform.h> +#include <asm/arch/gpio.h> + +/* register definitions */ +#define PIO_VA_BASE IO_ADDRESS(PNX4008_PIO_BASE) + +#define PIO_INP_STATE (0x00U) +#define PIO_OUTP_SET (0x04U) +#define PIO_OUTP_CLR (0x08U) +#define PIO_OUTP_STATE (0x0CU) +#define PIO_DRV_SET (0x10U) +#define PIO_DRV_CLR (0x14U) +#define PIO_DRV_STATE (0x18U) +#define PIO_SDINP_STATE (0x1CU) +#define PIO_SDOUTP_SET (0x20U) +#define PIO_SDOUTP_CLR (0x24U) +#define PIO_MUX_SET (0x28U) +#define PIO_MUX_CLR (0x2CU) +#define PIO_MUX_STATE (0x30U) + +static inline void gpio_lock(void) +{ + local_irq_disable(); +} + +static inline void gpio_unlock(void) +{ + local_irq_enable(); +} + +/* Inline functions */ +static inline int gpio_read_bit(u32 reg, int gpio) +{ + u32 bit, val; + int ret = -EFAULT; + + if (gpio < 0) + goto out; + + bit = GPIO_BIT(gpio); + if (bit) { + val = __raw_readl(PIO_VA_BASE + reg); + ret = (val & bit) ? 1 : 0; + } +out: + return ret; +} + +static inline int gpio_set_bit(u32 reg, int gpio) +{ + u32 bit, val; + int ret = -EFAULT; + + if (gpio < 0) + goto out; + + bit = GPIO_BIT(gpio); + if (bit) { + val = __raw_readl(PIO_VA_BASE + reg); + val |= bit; + __raw_writel(val, PIO_VA_BASE + reg); + ret = 0; + } +out: + return ret; +} + +/* Very simple access control, bitmap for allocated/free */ +static unsigned long access_map[4]; +#define INP_INDEX 0 +#define OUTP_INDEX 1 +#define GPIO_INDEX 2 +#define MUX_INDEX 3 + +/*GPIO to Input Mapping */ +static short gpio_to_inp_map[32] = { + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, 10, 11, 12, 13, 14, 24, -1 +}; + +/*GPIO to Mux Mapping */ +static short gpio_to_mux_map[32] = { + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 0, 1, 4, 5, -1 +}; + +/*Output to Mux Mapping */ +static short outp_to_mux_map[32] = { + -1, -1, -1, 6, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 2, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1 +}; + +int pnx4008_gpio_register_pin(unsigned short pin) +{ + unsigned long bit = GPIO_BIT(pin); + int ret = -EBUSY; /* Already in use */ + + gpio_lock(); + + if (GPIO_ISBID(pin)) { + if (access_map[GPIO_INDEX] & bit) + goto out; + access_map[GPIO_INDEX] |= bit; + + } else if (GPIO_ISRAM(pin)) { + if (access_map[GPIO_INDEX] & bit) + goto out; + access_map[GPIO_INDEX] |= bit; + + } else if (GPIO_ISMUX(pin)) { + if (access_map[MUX_INDEX] & bit) + goto out; + access_map[MUX_INDEX] |= bit; + + } else if (GPIO_ISOUT(pin)) { + if (access_map[OUTP_INDEX] & bit) + goto out; + access_map[OUTP_INDEX] |= bit; + + } else if (GPIO_ISIN(pin)) { + if (access_map[INP_INDEX] & bit) + goto out; + access_map[INP_INDEX] |= bit; + } else + goto out; + ret = 0; + +out: + gpio_unlock(); + return ret; +} + +EXPORT_SYMBOL(pnx4008_gpio_register_pin); + +int pnx4008_gpio_unregister_pin(unsigned short pin) +{ + unsigned long bit = GPIO_BIT(pin); + int ret = -EFAULT; /* Not registered */ + + gpio_lock(); + + if (GPIO_ISBID(pin)) { + if (~access_map[GPIO_INDEX] & bit) + goto out; + access_map[GPIO_INDEX] &= ~bit; + } else if (GPIO_ISRAM(pin)) { + if (~access_map[GPIO_INDEX] & bit) + goto out; + access_map[GPIO_INDEX] &= ~bit; + } else if (GPIO_ISMUX(pin)) { + if (~access_map[MUX_INDEX] & bit) + goto out; + access_map[MUX_INDEX] &= ~bit; + } else if (GPIO_ISOUT(pin)) { + if (~access_map[OUTP_INDEX] & bit) + goto out; + access_map[OUTP_INDEX] &= ~bit; + } else if (GPIO_ISIN(pin)) { + if (~access_map[INP_INDEX] & bit) + goto out; + access_map[INP_INDEX] &= ~bit; + } else + goto out; + ret = 0; + +out: + gpio_unlock(); + return ret; +} + +EXPORT_SYMBOL(pnx4008_gpio_unregister_pin); + +unsigned long pnx4008_gpio_read_pin(unsigned short pin) +{ + unsigned long ret = -EFAULT; + int gpio = GPIO_BIT_MASK(pin); + gpio_lock(); + if (GPIO_ISOUT(pin)) { + ret = gpio_read_bit(PIO_OUTP_STATE, gpio); + } else if (GPIO_ISRAM(pin)) { + if (gpio_read_bit(PIO_DRV_STATE, gpio) == 0) { + ret = gpio_read_bit(PIO_SDINP_STATE, gpio); + } + } else if (GPIO_ISBID(pin)) { + ret = gpio_read_bit(PIO_DRV_STATE, gpio); + if (ret > 0) + ret = gpio_read_bit(PIO_OUTP_STATE, gpio); + else if (ret == 0) + ret = + gpio_read_bit(PIO_INP_STATE, gpio_to_inp_map[gpio]); + } else if (GPIO_ISIN(pin)) { + ret = gpio_read_bit(PIO_INP_STATE, gpio); + } + gpio_unlock(); + return ret; +} + +EXPORT_SYMBOL(pnx4008_gpio_read_pin); + +/* Write Value to output */ +int pnx4008_gpio_write_pin(unsigned short pin, int output) +{ + int gpio = GPIO_BIT_MASK(pin); + int ret = -EFAULT; + + gpio_lock(); + if (GPIO_ISOUT(pin)) { + printk( "writing '%x' to '%x'\n", + gpio, output ? PIO_OUTP_SET : PIO_OUTP_CLR ); + ret = gpio_set_bit(output ? PIO_OUTP_SET : PIO_OUTP_CLR, gpio); + } else if (GPIO_ISRAM(pin)) { + if (gpio_read_bit(PIO_DRV_STATE, gpio) > 0) + ret = gpio_set_bit(output ? PIO_SDOUTP_SET : + PIO_SDOUTP_CLR, gpio); + } else if (GPIO_ISBID(pin)) { + if (gpio_read_bit(PIO_DRV_STATE, gpio) > 0) + ret = gpio_set_bit(output ? PIO_OUTP_SET : + PIO_OUTP_CLR, gpio); + } + gpio_unlock(); + return ret; +} + +EXPORT_SYMBOL(pnx4008_gpio_write_pin); + +/* Value = 1 : Set GPIO pin as output */ +/* Value = 0 : Set GPIO pin as input */ +int pnx4008_gpio_set_pin_direction(unsigned short pin, int output) +{ + int gpio = GPIO_BIT_MASK(pin); + int ret = -EFAULT; + + gpio_lock(); + if (GPIO_ISBID(pin) || GPIO_ISRAM(pin)) { + ret = gpio_set_bit(output ? PIO_DRV_SET : PIO_DRV_CLR, gpio); + } + gpio_unlock(); + return ret; +} + +EXPORT_SYMBOL(pnx4008_gpio_set_pin_direction); + +/* Read GPIO pin direction: 0= pin used as input, 1= pin used as output*/ +int pnx4008_gpio_read_pin_direction(unsigned short pin) +{ + int gpio = GPIO_BIT_MASK(pin); + int ret = -EFAULT; + + gpio_lock(); + if (GPIO_ISBID(pin) || GPIO_ISRAM(pin)) { + ret = gpio_read_bit(PIO_DRV_STATE, gpio); + } + gpio_unlock(); + return ret; +} + +EXPORT_SYMBOL(pnx4008_gpio_read_pin_direction); + +/* Value = 1 : Set pin to muxed function */ +/* Value = 0 : Set pin as GPIO */ +int pnx4008_gpio_set_pin_mux(unsigned short pin, int output) +{ + int gpio = GPIO_BIT_MASK(pin); + int ret = -EFAULT; + + gpio_lock(); + if (GPIO_ISBID(pin)) { + ret = + gpio_set_bit(output ? PIO_MUX_SET : PIO_MUX_CLR, + gpio_to_mux_map[gpio]); + } else if (GPIO_ISOUT(pin)) { + ret = + gpio_set_bit(output ? PIO_MUX_SET : PIO_MUX_CLR, + outp_to_mux_map[gpio]); + } else if (GPIO_ISMUX(pin)) { + ret = gpio_set_bit(output ? PIO_MUX_SET : PIO_MUX_CLR, gpio); + } + gpio_unlock(); + return ret; +} + +EXPORT_SYMBOL(pnx4008_gpio_set_pin_mux); + +/* Read pin mux function: 0= pin used as GPIO, 1= pin used for muxed function*/ +int pnx4008_gpio_read_pin_mux(unsigned short pin) +{ + int gpio = GPIO_BIT_MASK(pin); + int ret = -EFAULT; + + gpio_lock(); + if (GPIO_ISBID(pin)) { + ret = gpio_read_bit(PIO_MUX_STATE, gpio_to_mux_map[gpio]); + } else if (GPIO_ISOUT(pin)) { + ret = gpio_read_bit(PIO_MUX_STATE, outp_to_mux_map[gpio]); + } else if (GPIO_ISMUX(pin)) { + ret = gpio_read_bit(PIO_MUX_STATE, gpio); + } + gpio_unlock(); + return ret; +} + +EXPORT_SYMBOL(pnx4008_gpio_read_pin_mux); diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c new file mode 100644 index 00000000000..9b0a8e084e9 --- /dev/null +++ b/arch/arm/mach-pnx4008/irq.c @@ -0,0 +1,121 @@ +/* + * arch/arm/mach-pnx4008/irq.c + * + * PNX4008 IRQ controller driver + * + * Author: Dmitry Chigirev <source@mvista.com> + * + * Based on reference code received from Philips: + * Copyright (C) 2003 Philips Semiconductors + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/mm.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/init.h> +#include <linux/ioport.h> +#include <linux/device.h> +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/io.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/pgtable.h> +#include <asm/page.h> +#include <asm/system.h> +#include <asm/mach/arch.h> +#include <asm/mach/irq.h> +#include <asm/mach/map.h> +#include <asm/arch/irq.h> + +static u8 pnx4008_irq_type[NR_IRQS] = PNX4008_IRQ_TYPES; + +static void pnx4008_mask_irq(unsigned int irq) +{ + __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */ +} + +static void pnx4008_unmask_irq(unsigned int irq) +{ + __raw_writel(__raw_readl(INTC_ER(irq)) | INTC_BIT(irq), INTC_ER(irq)); /* unmask interrupt */ +} + +static void pnx4008_mask_ack_irq(unsigned int irq) +{ + __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */ + __raw_writel(INTC_BIT(irq), INTC_SR(irq)); /* clear interrupt status */ +} + +static int pnx4008_set_irq_type(unsigned int irq, unsigned int type) +{ + switch (type) { + case IRQT_RISING: + __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */ + __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /*rising edge */ + set_irq_handler(irq, do_edge_IRQ); + break; + case IRQT_FALLING: + __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */ + __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*falling edge */ + set_irq_handler(irq, do_edge_IRQ); + break; + case IRQT_LOW: + __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */ + __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*low level */ + set_irq_handler(irq, do_level_IRQ); + break; + case IRQT_HIGH: + __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */ + __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /* high level */ + set_irq_handler(irq, do_level_IRQ); + break; + + /* IRQT_BOTHEDGE is not supported */ + default: + printk(KERN_ERR "PNX4008 IRQ: Unsupported irq type %d\n", type); + return -1; + } + return 0; +} + +static struct irqchip pnx4008_irq_chip = { + .ack = pnx4008_mask_ack_irq, + .mask = pnx4008_mask_irq, + .unmask = pnx4008_unmask_irq, + .set_type = pnx4008_set_irq_type, +}; + +void __init pnx4008_init_irq(void) +{ + unsigned int i; + + /* configure and enable IRQ 0,1,30,31 (cascade interrupts) mask all others */ + pnx4008_set_irq_type(SUB1_IRQ_N, pnx4008_irq_type[SUB1_IRQ_N]); + pnx4008_set_irq_type(SUB2_IRQ_N, pnx4008_irq_type[SUB2_IRQ_N]); + pnx4008_set_irq_type(SUB1_FIQ_N, pnx4008_irq_type[SUB1_FIQ_N]); + pnx4008_set_irq_type(SUB2_FIQ_N, pnx4008_irq_type[SUB2_FIQ_N]); + + __raw_writel((1 << SUB2_FIQ_N) | (1 << SUB1_FIQ_N) | + (1 << SUB2_IRQ_N) | (1 << SUB1_IRQ_N), + INTC_ER(MAIN_BASE_INT)); + __raw_writel(0, INTC_ER(SIC1_BASE_INT)); + __raw_writel(0, INTC_ER(SIC2_BASE_INT)); + + /* configure all other IRQ's */ + for (i = 0; i < NR_IRQS; i++) { + if (i == SUB2_FIQ_N || i == SUB1_FIQ_N || + i == SUB2_IRQ_N || i == SUB1_IRQ_N) + continue; + set_irq_flags(i, IRQF_VALID); + set_irq_chip(i, &pnx4008_irq_chip); + pnx4008_set_irq_type(i, pnx4008_irq_type[i]); + } +} + diff --git a/arch/arm/mach-pnx4008/pm.c b/arch/arm/mach-pnx4008/pm.c new file mode 100644 index 00000000000..3649cd3dfc9 --- /dev/null +++ b/arch/arm/mach-pnx4008/pm.c @@ -0,0 +1,184 @@ +/* + * arch/arm/mach-pnx4008/pm.c + * + * Power Management driver for PNX4008 + * + * Authors: Vitaly Wool, Dmitry Chigirev <source@mvista.com> + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#include <linux/pm.h> +#include <linux/rtc.h> +#include <linux/sched.h> +#include <linux/proc_fs.h> +#include <linux/pm.h> +#include <linux/delay.h> +#include <linux/clk.h> + +#include <asm/io.h> +#include <asm/mach-types.h> +#include <asm/cacheflush.h> +#include <asm/arch/pm.h> +#include <asm/arch/clock.h> + +#define SRAM_VA IO_ADDRESS(PNX4008_IRAM_BASE) + +static void *saved_sram; + +static struct clk *pll4_clk; + +static inline void pnx4008_standby(void) +{ + void (*pnx4008_cpu_standby_ptr) (void); + + local_irq_disable(); + local_fiq_disable(); + + clk_disable(pll4_clk); + + /*saving portion of SRAM to be used by suspend function. */ + memcpy(saved_sram, (void *)SRAM_VA, pnx4008_cpu_standby_sz); + + /*make sure SRAM copy gets physically written into SDRAM. + SDRAM will be placed into self-refresh during power down */ + flush_cache_all(); + + /*copy suspend function into SRAM */ + memcpy((void *)SRAM_VA, pnx4008_cpu_standby, pnx4008_cpu_standby_sz); + + /*do suspend */ + pnx4008_cpu_standby_ptr = (void *)SRAM_VA; + pnx4008_cpu_standby_ptr(); + + /*restoring portion of SRAM that was used by suspend function */ + memcpy((void *)SRAM_VA, saved_sram, pnx4008_cpu_standby_sz); + + clk_enable(pll4_clk); + + local_fiq_enable(); + local_irq_enable(); +} + +static inline void pnx4008_suspend(void) +{ + void (*pnx4008_cpu_suspend_ptr) (void); + + local_irq_disable(); + local_fiq_disable(); + + clk_disable(pll4_clk); + + __raw_writel(0xffffffff, START_INT_RSR_REG(SE_PIN_BASE_INT)); + __raw_writel(0xffffffff, START_INT_RSR_REG(SE_INT_BASE_INT)); + + /*saving portion of SRAM to be used by suspend function. */ + memcpy(saved_sram, (void *)SRAM_VA, pnx4008_cpu_suspend_sz); + + /*make sure SRAM copy gets physically written into SDRAM. + SDRAM will be placed into self-refresh during power down */ + flush_cache_all(); + + /*copy suspend function into SRAM */ + memcpy((void *)SRAM_VA, pnx4008_cpu_suspend, pnx4008_cpu_suspend_sz); + + /*do suspend */ + pnx4008_cpu_suspend_ptr = (void *)SRAM_VA; + pnx4008_cpu_suspend_ptr(); + + /*restoring portion of SRAM that was used by suspend function */ + memcpy((void *)SRAM_VA, saved_sram, pnx4008_cpu_suspend_sz); + + clk_enable(pll4_clk); + + local_fiq_enable(); + local_irq_enable(); +} + +static int pnx4008_pm_enter(suspend_state_t state) +{ + switch (state) { + case PM_SUSPEND_STANDBY: + pnx4008_standby(); + break; + case PM_SUSPEND_MEM: + pnx4008_suspend(); + break; + case PM_SUSPEND_DISK: + return -ENOTSUPP; + default: + return -EINVAL; + } + return 0; +} + +/* + * Called after processes are frozen, but before we shut down devices. + */ +static int pnx4008_pm_prepare(suspend_state_t state) +{ + switch (state) { + case PM_SUSPEND_STANDBY: + case PM_SUSPEND_MEM: + break; + + case PM_SUSPEND_DISK: + return -ENOTSUPP; + break; + + default: + return -EINVAL; + break; + } + return 0; +} + +/* + * Called after devices are re-setup, but before processes are thawed. + */ +static int pnx4008_pm_finish(suspend_state_t state) +{ + return 0; +} + +/* + * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk. + */ +static struct pm_ops pnx4008_pm_ops = { + .prepare = pnx4008_pm_prepare, + .enter = pnx4008_pm_enter, + .finish = pnx4008_pm_finish, +}; + +static int __init pnx4008_pm_init(void) +{ + u32 sram_size_to_allocate; + + pll4_clk = clk_get(0, "ck_pll4"); + if (IS_ERR(pll4_clk)) { + printk(KERN_ERR + "PM Suspend cannot acquire ARM(PLL4) clock control\n"); + return PTR_ERR(pll4_clk); + } + + if (pnx4008_cpu_standby_sz > pnx4008_cpu_suspend_sz) + sram_size_to_allocate = pnx4008_cpu_standby_sz; + else + sram_size_to_allocate = pnx4008_cpu_suspend_sz; + + saved_sram = kmalloc(sram_size_to_allocate, GFP_ATOMIC); + if (!saved_sram) { + printk(KERN_ERR + "PM Suspend: cannot allocate memory to save portion of SRAM\n"); + clk_put(pll4_clk); + return -ENOMEM; + } + + pm_set_ops(&pnx4008_pm_ops); + return 0; +} + +late_initcall(pnx4008_pm_init); diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c new file mode 100644 index 00000000000..95a1b3f964a --- /dev/null +++ b/arch/arm/mach-pnx4008/serial.c @@ -0,0 +1,69 @@ +/* + * linux/arch/arm/mach-pnx4008/serial.c + * + * PNX4008 UART initialization + * + * Copyright: MontaVista Software Inc. (c) 2005 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/types.h> + +#include <asm/io.h> + +#include <asm/arch/platform.h> +#include <asm/hardware.h> + +#include <linux/serial_core.h> +#include <linux/serial_reg.h> +#include <asm/arch/gpio.h> + +#include <asm/arch/clock.h> + +#define UART_3 0 +#define UART_4 1 +#define UART_5 2 +#define UART_6 3 +#define UART_UNKNOWN (-1) + +#define UART3_BASE_VA IO_ADDRESS(PNX4008_UART3_BASE) +#define UART4_BASE_VA IO_ADDRESS(PNX4008_UART4_BASE) +#define UART5_BASE_VA IO_ADDRESS(PNX4008_UART5_BASE) +#define UART6_BASE_VA IO_ADDRESS(PNX4008_UART6_BASE) + +#define UART_FCR_OFFSET 8 +#define UART_FIFO_SIZE 64 + +void pnx4008_uart_init(void) +{ + u32 tmp; + int i = UART_FIFO_SIZE; + + __raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET); + __raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET); + + /* Send a NULL to fix the UART HW bug */ + __raw_writel(0x00, UART5_BASE_VA); + __raw_writel(0x00, UART3_BASE_VA); + + while (i--) { + tmp = __raw_readl(UART5_BASE_VA); + tmp = __raw_readl(UART3_BASE_VA); + } + __raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET); + __raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET); + + /* setup wakeup interrupt */ + start_int_set_rising_edge(SE_U3_RX_INT); + start_int_ack(SE_U3_RX_INT); + start_int_umask(SE_U3_RX_INT); + + start_int_set_rising_edge(SE_U5_RX_INT); + start_int_ack(SE_U5_RX_INT); + start_int_umask(SE_U5_RX_INT); +} + diff --git a/arch/arm/mach-pnx4008/sleep.S b/arch/arm/mach-pnx4008/sleep.S new file mode 100644 index 00000000000..93c802bac26 --- /dev/null +++ b/arch/arm/mach-pnx4008/sleep.S @@ -0,0 +1,196 @@ +/* + * linux/arch/arm/mach-pnx4008/sleep.S + * + * PNX4008 support for STOP mode and SDRAM self-refresh + * + * Authors: Dmitry Chigirev, Vitaly Wool <source@mvista.com> + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#include <linux/config.h> +#include <linux/linkage.h> +#include <asm/assembler.h> +#include <asm/hardware.h> + +#define PWRMAN_VA_BASE IO_ADDRESS(PNX4008_PWRMAN_BASE) +#define PWR_CTRL_REG_OFFS 0x44 + +#define SDRAM_CFG_VA_BASE IO_ADDRESS(PNX4008_SDRAM_CFG_BASE) +#define MPMC_STATUS_REG_OFFS 0x4 + + .text + +ENTRY(pnx4008_cpu_suspend) + @this function should be entered in Direct run mode. + + @ save registers on stack + stmfd sp!, {r0 - r6, lr} + + @ setup Power Manager base address in r4 + @ and put it's value in r5 + mov r4, #(PWRMAN_VA_BASE & 0xff000000) + orr r4, r4, #(PWRMAN_VA_BASE & 0x00ff0000) + orr r4, r4, #(PWRMAN_VA_BASE & 0x0000ff00) + orr r4, r4, #(PWRMAN_VA_BASE & 0x000000ff) + ldr r5, [r4, #PWR_CTRL_REG_OFFS] + + @ setup SDRAM controller base address in r2 + @ and put it's value in r3 + mov r2, #(SDRAM_CFG_VA_BASE & 0xff000000) + orr r2, r2, #(SDRAM_CFG_VA_BASE & 0x00ff0000) + orr r2, r2, #(SDRAM_CFG_VA_BASE & 0x0000ff00) + orr r2, r2, #(SDRAM_CFG_VA_BASE & 0x000000ff) + ldr r3, [r2, #MPMC_STATUS_REG_OFFS] @extra read - HW bug workaround + + @ clear SDRAM self-refresh bit latch + and r5, r5, #(~(1 << 8)) + @ clear SDRAM self-refresh bit + and r5, r5, #(~(1 << 9)) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ do save current bit settings in r1 + mov r1, r5 + + @ set SDRAM self-refresh bit + orr r5, r5, #(1 << 9) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ set SDRAM self-refresh bit latch + orr r5, r5, #(1 << 8) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ clear SDRAM self-refresh bit latch + and r5, r5, #(~(1 << 8)) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ clear SDRAM self-refresh bit + and r5, r5, #(~(1 << 9)) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ wait for SDRAM to get into self-refresh mode +2: ldr r3, [r2, #MPMC_STATUS_REG_OFFS] + tst r3, #(1 << 2) + beq 2b + + @ to prepare SDRAM to get out of self-refresh mode after wakeup + orr r5, r5, #(1 << 7) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ do enter stop mode + orr r5, r5, #(1 << 0) + str r5, [r4, #PWR_CTRL_REG_OFFS] + nop + nop + nop + nop + nop + nop + nop + nop + nop + + @ sleeping now... + + @ coming out of STOP mode into Direct Run mode + @ clear STOP mode and SDRAM self-refresh bits + str r1, [r4, #PWR_CTRL_REG_OFFS] + + @ wait for SDRAM to get out self-refresh mode +3: ldr r3, [r2, #MPMC_STATUS_REG_OFFS] + tst r3, #5 + bne 3b + + @ restore regs and return + ldmfd sp!, {r0 - r6, pc} + +ENTRY(pnx4008_cpu_suspend_sz) + .word . - pnx4008_cpu_suspend + +ENTRY(pnx4008_cpu_standby) + @ save registers on stack + stmfd sp!, {r0 - r6, lr} + + @ setup Power Manager base address in r4 + @ and put it's value in r5 + mov r4, #(PWRMAN_VA_BASE & 0xff000000) + orr r4, r4, #(PWRMAN_VA_BASE & 0x00ff0000) + orr r4, r4, #(PWRMAN_VA_BASE & 0x0000ff00) + orr r4, r4, #(PWRMAN_VA_BASE & 0x000000ff) + ldr r5, [r4, #PWR_CTRL_REG_OFFS] + + @ setup SDRAM controller base address in r2 + @ and put it's value in r3 + mov r2, #(SDRAM_CFG_VA_BASE & 0xff000000) + orr r2, r2, #(SDRAM_CFG_VA_BASE & 0x00ff0000) + orr r2, r2, #(SDRAM_CFG_VA_BASE & 0x0000ff00) + orr r2, r2, #(SDRAM_CFG_VA_BASE & 0x000000ff) + ldr r3, [r2, #MPMC_STATUS_REG_OFFS] @extra read - HW bug workaround + + @ clear SDRAM self-refresh bit latch + and r5, r5, #(~(1 << 8)) + @ clear SDRAM self-refresh bit + and r5, r5, #(~(1 << 9)) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ do save current bit settings in r1 + mov r1, r5 + + @ set SDRAM self-refresh bit + orr r5, r5, #(1 << 9) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ set SDRAM self-refresh bit latch + orr r5, r5, #(1 << 8) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ clear SDRAM self-refresh bit latch + and r5, r5, #(~(1 << 8)) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ clear SDRAM self-refresh bit + and r5, r5, #(~(1 << 9)) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ wait for SDRAM to get into self-refresh mode +2: ldr r3, [r2, #MPMC_STATUS_REG_OFFS] + tst r3, #(1 << 2) + beq 2b + + @ set 'get out of self-refresh mode after wakeup' bit + orr r5, r5, #(1 << 7) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + mcr p15, 0, r0, c7, c0, 4 @ kinda sleeping now... + + @ set SDRAM self-refresh bit latch + orr r5, r5, #(1 << 8) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ clear SDRAM self-refresh bit latch + and r5, r5, #(~(1 << 8)) + str r5, [r4, #PWR_CTRL_REG_OFFS] + + @ wait for SDRAM to get out self-refresh mode +3: ldr r3, [r2, #MPMC_STATUS_REG_OFFS] + tst r3, #5 + bne 3b + + @ restore regs and return + ldmfd sp!, {r0 - r6, pc} + +ENTRY(pnx4008_cpu_standby_sz) + .word . - pnx4008_cpu_standby + +ENTRY(pnx4008_cache_clean_invalidate) + stmfd sp!, {r0 - r6, lr} +#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH + mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache +#else +1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate + bne 1b +#endif + ldmfd sp!, {r0 - r6, pc} diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c new file mode 100644 index 00000000000..888bf6cfba8 --- /dev/null +++ b/arch/arm/mach-pnx4008/time.c @@ -0,0 +1,141 @@ +/* + * arch/arm/mach-pnx4008/time.c + * + * PNX4008 Timers + * + * Authors: Vitaly Wool, Dmitry Chigirev, Grigory Tolstolytkin <source@mvista.com> + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#include <linux/config.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/sched.h> +#include <linux/spinlock.h> +#include <linux/module.h> +#include <linux/kallsyms.h> + +#include <asm/system.h> +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/leds.h> +#include <asm/irq.h> +#include <asm/mach/irq.h> +#include <asm/mach/time.h> + +#include <linux/time.h> +#include <linux/timex.h> +#include <asm/errno.h> + +/*! Note: all timers are UPCOUNTING */ + +/*! + * Returns number of us since last clock interrupt. Note that interrupts + * will have been disabled by do_gettimeoffset() + */ +static unsigned long pnx4008_gettimeoffset(void) +{ + u32 ticks_to_match = + __raw_readl(HSTIM_MATCH0) - __raw_readl(HSTIM_COUNTER); + u32 elapsed = LATCH - ticks_to_match; + return (elapsed * (tick_nsec / 1000)) / LATCH; +} + +/*! + * IRQ handler for the timer + */ +static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id, + struct pt_regs *regs) +{ + if (__raw_readl(HSTIM_INT) & MATCH0_INT) { + + write_seqlock(&xtime_lock); + + do { + timer_tick(regs); + + /* + * this algorithm takes care of possible delay + * for this interrupt handling longer than a normal + * timer period + */ + __raw_writel(__raw_readl(HSTIM_MATCH0) + LATCH, + HSTIM_MATCH0); + __raw_writel(MATCH0_INT, HSTIM_INT); /* clear interrupt */ + + /* + * The goal is to keep incrementing HSTIM_MATCH0 + * register until HSTIM_MATCH0 indicates time after + * what HSTIM_COUNTER indicates. + */ + } while ((signed) + (__raw_readl(HSTIM_MATCH0) - + __raw_readl(HSTIM_COUNTER)) < 0); + + write_sequnlock(&xtime_lock); + } + + return IRQ_HANDLED; +} + +static struct irqaction pnx4008_timer_irq = { + .name = "PNX4008 Tick Timer", + .flags = IRQF_DISABLED | IRQF_TIMER, + .handler = pnx4008_timer_interrupt +}; + +/*! + * Set up timer and timer interrupt. + */ +static __init void pnx4008_setup_timer(void) +{ + __raw_writel(RESET_COUNT, MSTIM_CTRL); + while (__raw_readl(MSTIM_COUNTER)) ; /* wait for reset to complete. 100% guarantee event */ + __raw_writel(0, MSTIM_CTRL); /* stop the timer */ + __raw_writel(0, MSTIM_MCTRL); + + __raw_writel(RESET_COUNT, HSTIM_CTRL); + while (__raw_readl(HSTIM_COUNTER)) ; /* wait for reset to complete. 100% guarantee event */ + __raw_writel(0, HSTIM_CTRL); + __raw_writel(0, HSTIM_MCTRL); + __raw_writel(0, HSTIM_CCR); + __raw_writel(12, HSTIM_PMATCH); /* scale down to 1 MHZ */ + __raw_writel(LATCH, HSTIM_MATCH0); + __raw_writel(MR0_INT, HSTIM_MCTRL); + + setup_irq(HSTIMER_INT, &pnx4008_timer_irq); + + __raw_writel(COUNT_ENAB | DEBUG_EN, HSTIM_CTRL); /*start timer, stop when JTAG active */ +} + +/* Timer Clock Control in PM register */ +#define TIMCLK_CTRL_REG IO_ADDRESS((PNX4008_PWRMAN_BASE + 0xBC)) +#define WATCHDOG_CLK_EN 1 +#define TIMER_CLK_EN 2 /* HS and MS timers? */ + +static u32 timclk_ctrl_reg_save; + +void pnx4008_timer_suspend(void) +{ + timclk_ctrl_reg_save = __raw_readl(TIMCLK_CTRL_REG); + __raw_writel(0, TIMCLK_CTRL_REG); /* disable timers */ +} + +void pnx4008_timer_resume(void) +{ + __raw_writel(timclk_ctrl_reg_save, TIMCLK_CTRL_REG); /* enable timers */ +} + +struct sys_timer pnx4008_timer = { + .init = pnx4008_setup_timer, + .offset = pnx4008_gettimeoffset, + .suspend = pnx4008_timer_suspend, + .resume = pnx4008_timer_resume, +}; + diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 0104fd142e7..03d07cae26c 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -35,6 +35,10 @@ config PXA_SHARPSL SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) handheld computer. +config MACH_TRIZEPS4 + bool "Keith und Koep Trizeps4 DIMM-Module" + select PXA27x + endchoice if PXA_SHARPSL @@ -55,12 +59,28 @@ endchoice endif +if MACH_TRIZEPS4 + +choice + prompt "Select base board for Trizeps 4 module" + +config MACH_TRIZEPS4_CONXS + bool "ConXS Eval Board" + +config MACH_TRIZEPS4_ANY + bool "another Board" + +endchoice + +endif + endmenu config MACH_POODLE bool "Enable Sharp SL-5600 (Poodle) Support" depends PXA_SHARPSL_25x select SHARP_LOCOMO + select PXA_SSP config MACH_CORGI bool "Enable Sharp SL-C700 (Corgi) Support" diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 4e8a983e2b8..9093eb1c94e 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -12,10 +12,11 @@ obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o obj-$(CONFIG_ARCH_PXA_IDP) += idp.o +obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o -obj-$(CONFIG_MACH_POODLE) += poodle.o +obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o obj-$(CONFIG_MACH_TOSA) += tosa.o # Support for blinky lights @@ -23,6 +24,7 @@ led-y := leds.o led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o +led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o obj-$(CONFIG_LEDS) += $(led-y) diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index d6d72603636..cce26576999 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -19,6 +19,7 @@ #include <linux/fs.h> #include <linux/interrupt.h> #include <linux/mmc/host.h> +#include <linux/pm.h> #include <asm/setup.h> #include <asm/memory.h> @@ -26,6 +27,7 @@ #include <asm/hardware.h> #include <asm/irq.h> #include <asm/io.h> +#include <asm/system.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -223,7 +225,7 @@ static int corgi_mci_init(struct device *dev, irqreturn_t (*corgi_detect_int)(in corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250); err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, - SA_INTERRUPT | SA_TRIGGER_RISING | SA_TRIGGER_FALLING, + IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "MMC card detect", data); if (err) { printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); @@ -310,8 +312,31 @@ static struct platform_device *devices[] __initdata = { &corgiled_device, }; +static void corgi_poweroff(void) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + + if (!machine_is_corgi()) + /* Green LED off tells the bootloader to halt */ + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); + arm_machine_restart('h'); +} + +static void corgi_restart(char mode) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + + if (!machine_is_corgi()) + /* Green LED on tells the bootloader to reboot */ + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); + arm_machine_restart('h'); +} + static void __init corgi_init(void) { + pm_power_off = corgi_poweroff; + arm_pm_restart = corgi_restart; + /* setup sleep mode values */ PWER = 0x00000002; PFER = 0x00000000; diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index 7a1ab73e9e1..4c3de4008a4 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c @@ -27,6 +27,13 @@ #include <asm/arch/pxa-regs.h> #include "sharpsl.h" +#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ +#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ +#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */ +#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */ +#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */ +#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */ + static void corgi_charger_init(void) { pxa_gpio_mode(CORGI_GPIO_ADC_TEMP_ON | GPIO_OUT); @@ -195,9 +202,16 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = { .read_devdata = corgipm_read_devdata, .charger_wakeup = corgi_charger_wakeup, .should_wakeup = corgi_should_wakeup, - .bat_levels = 40, - .bat_levels_noac = spitz_battery_levels_noac, - .bat_levels_acin = spitz_battery_levels_acin, + .backlight_limit = corgibl_limit_intensity, + .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, + .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, + .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH, + .charge_acin_low = SHARPSL_CHARGE_ON_ACIN_LOW, + .fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT, + .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT, + .bat_levels = 40, + .bat_levels_noac = spitz_battery_levels_noac, + .bat_levels_acin = spitz_battery_levels_acin, .status_high_acin = 188, .status_low_acin = 178, .status_high_noac = 185, @@ -214,6 +228,9 @@ static int __devinit corgipm_init(void) if (!corgipm_device) return -ENOMEM; + if (!machine_is_corgi()) + corgi_pm_machinfo.batfull_irq = 1; + corgipm_device->dev.platform_data = &corgi_pm_machinfo; ret = platform_device_add(corgipm_device); diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c index 8a25a1c8019..f9421318cb7 100644 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ b/arch/arm/mach-pxa/corgi_ssp.c @@ -50,12 +50,14 @@ unsigned long corgi_ssp_ads7846_putget(ulong data) unsigned long ret,flag; spin_lock_irqsave(&corgi_ssp_lock, flag); - GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + if (ssp_machinfo->cs_ads7846 >= 0) + GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); ssp_write_word(&corgi_ssp_dev,data); ret = ssp_read_word(&corgi_ssp_dev); - GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + if (ssp_machinfo->cs_ads7846 >= 0) + GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); spin_unlock_irqrestore(&corgi_ssp_lock, flag); return ret; @@ -68,12 +70,14 @@ unsigned long corgi_ssp_ads7846_putget(ulong data) void corgi_ssp_ads7846_lock(void) { spin_lock(&corgi_ssp_lock); - GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + if (ssp_machinfo->cs_ads7846 >= 0) + GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); } void corgi_ssp_ads7846_unlock(void) { - GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + if (ssp_machinfo->cs_ads7846 >= 0) + GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); spin_unlock(&corgi_ssp_lock); } @@ -110,11 +114,13 @@ unsigned long corgi_ssp_dac_put(ulong data) ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon)); ssp_enable(&corgi_ssp_dev); - GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); + if (ssp_machinfo->cs_lcdcon >= 0) + GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); ssp_write_word(&corgi_ssp_dev,data); /* Read null data back from device to prevent SSP overflow */ ssp_read_word(&corgi_ssp_dev); - GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); + if (ssp_machinfo->cs_lcdcon >= 0) + GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); ssp_disable(&corgi_ssp_dev); ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); @@ -147,7 +153,8 @@ int corgi_ssp_max1111_get(ulong data) int voltage,voltage1,voltage2; spin_lock_irqsave(&corgi_ssp_lock, flag); - GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); + if (ssp_machinfo->cs_max1111 >= 0) + GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); ssp_disable(&corgi_ssp_dev); ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111)); ssp_enable(&corgi_ssp_dev); @@ -169,7 +176,8 @@ int corgi_ssp_max1111_get(ulong data) ssp_disable(&corgi_ssp_dev); ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); ssp_enable(&corgi_ssp_dev); - GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); + if (ssp_machinfo->cs_max1111 >= 0) + GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); spin_unlock_irqrestore(&corgi_ssp_lock, flag); if (voltage1 & 0xc0 || voltage2 & 0x3f) @@ -196,9 +204,12 @@ static int __init corgi_ssp_probe(struct platform_device *dev) int ret; /* Chip Select - Disable All */ - pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH); - pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH); - pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH); + if (ssp_machinfo->cs_lcdcon >= 0) + pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH); + if (ssp_machinfo->cs_max1111 >= 0) + pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH); + if (ssp_machinfo->cs_ads7846 >= 0) + pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH); ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0); @@ -229,9 +240,12 @@ static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state) static int corgi_ssp_resume(struct platform_device *dev) { - GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */ - GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/ - GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/ + if (ssp_machinfo->cs_lcdcon >= 0) + GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */ + if (ssp_machinfo->cs_max1111 >= 0) + GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/ + if (ssp_machinfo->cs_ads7846 >= 0) + GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/ ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state); ssp_enable(&corgi_ssp_dev); diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index 347b9dea24c..6914d22bc20 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c @@ -18,6 +18,7 @@ #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/platform_device.h> #include <linux/fb.h> diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 539b596005f..d9635ff4b10 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -88,8 +88,8 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) if (type == IRQT_PROBE) { /* Don't mess with enabled GPIOs using preconfigured edges or - GPIOs set to alternate function during probe */ - if ((GPIO_IRQ_rising_edge[idx] | GPIO_IRQ_falling_edge[idx]) & + GPIOs set to alternate function or to output during probe */ + if ((GPIO_IRQ_rising_edge[idx] | GPIO_IRQ_falling_edge[idx] | GPDR(gpio)) & GPIO_bit(gpio)) return 0; if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2))) diff --git a/arch/arm/mach-pxa/leds-idp.c b/arch/arm/mach-pxa/leds-idp.c index 5eba6ea0b0f..38aa9270540 100644 --- a/arch/arm/mach-pxa/leds-idp.c +++ b/arch/arm/mach-pxa/leds-idp.c @@ -12,7 +12,6 @@ */ -#include <linux/config.h> #include <linux/init.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-pxa/leds-lubbock.c b/arch/arm/mach-pxa/leds-lubbock.c index 05cf56059a0..afbc6698e27 100644 --- a/arch/arm/mach-pxa/leds-lubbock.c +++ b/arch/arm/mach-pxa/leds-lubbock.c @@ -11,7 +11,6 @@ * namespace collision. Mostly adapted the Mainstone version. */ -#include <linux/config.h> #include <linux/init.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-pxa/leds-mainstone.c b/arch/arm/mach-pxa/leds-mainstone.c index c06d3d7a8dd..065293eb0d8 100644 --- a/arch/arm/mach-pxa/leds-mainstone.c +++ b/arch/arm/mach-pxa/leds-mainstone.c @@ -10,7 +10,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/init.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-pxa/leds-trizeps4.c b/arch/arm/mach-pxa/leds-trizeps4.c new file mode 100644 index 00000000000..14cfc85e44b --- /dev/null +++ b/arch/arm/mach-pxa/leds-trizeps4.c @@ -0,0 +1,134 @@ +/* + * linux/arch/arm/mach-pxa/leds-trizeps4.c + * + * Author: Jürgen Schindele + * Created: 20 02, 2006 + * Copyright: Jürgen Schindele + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/config.h> +#include <linux/init.h> + +#include <asm/hardware.h> +#include <asm/system.h> +#include <asm/types.h> +#include <asm/leds.h> + +#include <asm/arch/pxa-regs.h> +#include <asm/arch/trizeps4.h> + +#include "leds.h" + +#define LED_STATE_ENABLED 1 +#define LED_STATE_CLAIMED 2 + +#define SYS_BUSY 0x01 +#define HEARTBEAT 0x02 +#define BLINK 0x04 + +static unsigned int led_state; +static unsigned int hw_led_state; + +void trizeps4_leds_event(led_event_t evt) +{ + unsigned long flags; + + local_irq_save(flags); + + switch (evt) { + case led_start: + hw_led_state = 0; + pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */ + pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */ + led_state = LED_STATE_ENABLED; + break; + + case led_stop: + led_state &= ~LED_STATE_ENABLED; + break; + + case led_claim: + led_state |= LED_STATE_CLAIMED; + hw_led_state = 0; + break; + + case led_release: + led_state &= ~LED_STATE_CLAIMED; + hw_led_state = 0; + break; + +#ifdef CONFIG_LEDS_TIMER + case led_timer: + hw_led_state ^= HEARTBEAT; + break; +#endif + +#ifdef CONFIG_LEDS_CPU + case led_idle_start: + hw_led_state &= ~SYS_BUSY; + break; + + case led_idle_end: + hw_led_state |= SYS_BUSY; + break; +#endif + + case led_halted: + break; + + case led_green_on: + hw_led_state |= BLINK; + break; + + case led_green_off: + hw_led_state &= ~BLINK; + break; + + case led_amber_on: + break; + + case led_amber_off: + break; + + case led_red_on: + break; + + case led_red_off: + break; + + default: + break; + } + + if (led_state & LED_STATE_ENABLED) { + switch (hw_led_state) { + case 0: + GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); + GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); + break; + case 1: + GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); + GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); + break; + case 2: + GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); + GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); + break; + case 3: + GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); + GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); + break; + } + } + else { + /* turn all off */ + GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); + GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); + } + + local_irq_restore(flags); +} diff --git a/arch/arm/mach-pxa/leds.c b/arch/arm/mach-pxa/leds.c index bbe4d5f6afa..e13eb841e48 100644 --- a/arch/arm/mach-pxa/leds.c +++ b/arch/arm/mach-pxa/leds.c @@ -24,6 +24,8 @@ pxa_leds_init(void) leds_event = mainstone_leds_event; if (machine_is_pxa_idp()) leds_event = idp_leds_event; + if (machine_is_trizeps4()) + leds_event = trizeps4_leds_event; leds_event(led_start); return 0; diff --git a/arch/arm/mach-pxa/leds.h b/arch/arm/mach-pxa/leds.h index d98f6e93c12..4f829b8c39d 100644 --- a/arch/arm/mach-pxa/leds.h +++ b/arch/arm/mach-pxa/leds.h @@ -10,3 +10,4 @@ extern void idp_leds_event(led_event_t evt); extern void lubbock_leds_event(led_event_t evt); extern void mainstone_leds_event(led_event_t evt); +extern void trizeps4_leds_event(led_event_t evt); diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index ec0f43a102c..1a5f5c21481 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -248,58 +248,137 @@ static void lpd270_backlight_power(int on) /* 5.7" TFT QVGA (LoLo display number 1) */ static struct pxafb_mach_info sharp_lq057q3dc02 __initdata = { - .pixclock = 100000, - .xres = 240, - .yres = 320, + .pixclock = 150000, + .xres = 320, + .yres = 240, .bpp = 16, - .hsync_len = 64, - .left_margin = 0x27, - .right_margin = 0x09, - .vsync_len = 0x04, + .hsync_len = 0x14, + .left_margin = 0x28, + .right_margin = 0x0a, + .vsync_len = 0x02, .upper_margin = 0x08, .lower_margin = 0x14, - .sync = 0, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .lccr0 = 0x07800080, - .lccr3 = 0x04400007, + .lccr3 = 0x00400000, + .pxafb_backlight_power = lpd270_backlight_power, +}; + +/* 12.1" TFT SVGA (LoLo display number 2) */ +static struct pxafb_mach_info sharp_lq121s1dg31 __initdata = { + .pixclock = 50000, + .xres = 800, + .yres = 600, + .bpp = 16, + .hsync_len = 0x05, + .left_margin = 0x52, + .right_margin = 0x05, + .vsync_len = 0x04, + .upper_margin = 0x14, + .lower_margin = 0x0a, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .lccr0 = 0x07800080, + .lccr3 = 0x00400000, + .pxafb_backlight_power = lpd270_backlight_power, +}; + +/* 3.6" TFT QVGA (LoLo display number 3) */ +static struct pxafb_mach_info sharp_lq036q1da01 __initdata = { + .pixclock = 150000, + .xres = 320, + .yres = 240, + .bpp = 16, + .hsync_len = 0x0e, + .left_margin = 0x04, + .right_margin = 0x0a, + .vsync_len = 0x03, + .upper_margin = 0x03, + .lower_margin = 0x03, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .lccr0 = 0x07800080, + .lccr3 = 0x00400000, .pxafb_backlight_power = lpd270_backlight_power, }; /* 6.4" TFT VGA (LoLo display number 5) */ static struct pxafb_mach_info sharp_lq64d343 __initdata = { - .pixclock = 20000, + .pixclock = 25000, .xres = 640, .yres = 480, .bpp = 16, - .hsync_len = 49, + .hsync_len = 0x31, .left_margin = 0x89, .right_margin = 0x19, - .vsync_len = 18, + .vsync_len = 0x12, .upper_margin = 0x22, - .lower_margin = 0, + .lower_margin = 0x00, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .lccr0 = 0x07800080, - .lccr3 = 0x04400001, + .lccr3 = 0x00400000, + .pxafb_backlight_power = lpd270_backlight_power, +}; + +/* 10.4" TFT VGA (LoLo display number 7) */ +static struct pxafb_mach_info sharp_lq10d368 __initdata = { + .pixclock = 25000, + .xres = 640, + .yres = 480, + .bpp = 16, + .hsync_len = 0x31, + .left_margin = 0x89, + .right_margin = 0x19, + .vsync_len = 0x12, + .upper_margin = 0x22, + .lower_margin = 0x00, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .lccr0 = 0x07800080, + .lccr3 = 0x00400000, .pxafb_backlight_power = lpd270_backlight_power, }; /* 3.5" TFT QVGA (LoLo display number 8) */ static struct pxafb_mach_info sharp_lq035q7db02_20 __initdata = { - .pixclock = 100000, + .pixclock = 150000, .xres = 240, .yres = 320, .bpp = 16, - .hsync_len = 0x34, - .left_margin = 0x09, - .right_margin = 0x09, - .vsync_len = 0x08, + .hsync_len = 0x0e, + .left_margin = 0x0a, + .right_margin = 0x0a, + .vsync_len = 0x03, .upper_margin = 0x05, .lower_margin = 0x14, - .sync = 0, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .lccr0 = 0x07800080, - .lccr3 = 0x04400007, + .lccr3 = 0x00400000, .pxafb_backlight_power = lpd270_backlight_power, }; +static struct pxafb_mach_info *lpd270_lcd_to_use; + +static int __init lpd270_set_lcd(char *str) +{ + if (!strnicmp(str, "lq057q3dc02", 11)) { + lpd270_lcd_to_use = &sharp_lq057q3dc02; + } else if (!strnicmp(str, "lq121s1dg31", 11)) { + lpd270_lcd_to_use = &sharp_lq121s1dg31; + } else if (!strnicmp(str, "lq036q1da01", 11)) { + lpd270_lcd_to_use = &sharp_lq036q1da01; + } else if (!strnicmp(str, "lq64d343", 8)) { + lpd270_lcd_to_use = &sharp_lq64d343; + } else if (!strnicmp(str, "lq10d368", 8)) { + lpd270_lcd_to_use = &sharp_lq10d368; + } else if (!strnicmp(str, "lq035q7db02-20", 14)) { + lpd270_lcd_to_use = &sharp_lq035q7db02_20; + } else { + printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str); + } + + return 1; +} + +__setup("lcd=", lpd270_set_lcd); + static struct platform_device *platform_devices[] __initdata = { &smc91x_device, &lpd270_audio_device, @@ -345,9 +424,8 @@ static void __init lpd270_init(void) platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); - // set_pxa_fb_info(&sharp_lq057q3dc02); - set_pxa_fb_info(&sharp_lq64d343); - // set_pxa_fb_info(&sharp_lq035q7db02_20); + if (lpd270_lcd_to_use != NULL) + set_pxa_fb_info(lpd270_lcd_to_use); pxa_set_ohci_info(&lpd270_ohci_platform_data); } diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 3e26d7ce5bb..6a9a669d60d 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -22,6 +22,10 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> +#include <asm/arch/pxa2xx_spi.h> + #include <asm/setup.h> #include <asm/memory.h> #include <asm/mach-types.h> @@ -196,6 +200,78 @@ static struct resource smc91x_resources[] = { }, }; +/* ADS7846 is connected through SSP ... and if your board has J5 populated, + * you can select it to replace the ucb1400 by switching the touchscreen cable + * (to J5) and poking board registers (as done below). Else it's only useful + * for the temperature sensors. + */ +static struct resource pxa_ssp_resources[] = { + [0] = { + .start = __PREG(SSCR0_P(1)), + .end = __PREG(SSCR0_P(1)) + 0x14, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_SSP, + .end = IRQ_SSP, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct pxa2xx_spi_master pxa_ssp_master_info = { + .ssp_type = PXA25x_SSP, + .clock_enable = CKEN3_SSP, + .num_chipselect = 0, +}; + +static struct platform_device pxa_ssp = { + .name = "pxa2xx-spi", + .id = 1, + .resource = pxa_ssp_resources, + .num_resources = ARRAY_SIZE(pxa_ssp_resources), + .dev = { + .platform_data = &pxa_ssp_master_info, + }, +}; + +static int lubbock_ads7846_pendown_state(void) +{ + /* TS_BUSY is bit 8 in LUB_MISC_RD, but pendown is irq-only */ + return 0; +} + +static struct ads7846_platform_data ads_info = { + .model = 7846, + .vref_delay_usecs = 100, /* internal, no cap */ + .get_pendown_state = lubbock_ads7846_pendown_state, + // .x_plate_ohms = 500, /* GUESS! */ + // .y_plate_ohms = 500, /* GUESS! */ +}; + +static void ads7846_cs(u32 command) +{ + static const unsigned TS_nCS = 1 << 11; + lubbock_set_misc_wr(TS_nCS, (command == PXA2XX_CS_ASSERT) ? 0 : TS_nCS); +} + +static struct pxa2xx_spi_chip ads_hw = { + .tx_threshold = 1, + .rx_threshold = 2, + .cs_control = ads7846_cs, +}; + +static struct spi_board_info spi_board_info[] __initdata = { { + .modalias = "ads7846", + .platform_data = &ads_info, + .controller_data = &ads_hw, + .irq = LUBBOCK_BB_IRQ, + .max_speed_hz = 120000 /* max sample rate at 3V */ + * 26 /* command + data + overhead */, + .bus_num = 1, + .chip_select = 0, +}, +}; + static struct platform_device smc91x_device = { .name = "smc91x", .id = -1, @@ -272,6 +348,7 @@ static struct platform_device *devices[] __initdata = { &smc91x_device, &lubbock_flash_device[0], &lubbock_flash_device[1], + &pxa_ssp, }; static struct pxafb_mach_info sharp_lm8v31 __initdata = { @@ -342,7 +419,7 @@ static int lubbock_mci_init(struct device *dev, init_timer(&mmc_timer); mmc_timer.data = (unsigned long) data; return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int, - SA_SAMPLE_RANDOM, "lubbock-sd-detect", data); + IRQF_SAMPLE_RANDOM, "lubbock-sd-detect", data); } static int lubbock_mci_get_ro(struct device *dev) @@ -400,6 +477,8 @@ static void __init lubbock_init(void) lubbock_flash_data[flashboot^1].name = "application-flash"; lubbock_flash_data[flashboot].name = "boot-rom"; (void) platform_add_devices(devices, ARRAY_SIZE(devices)); + + spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); } static struct map_desc lubbock_io_desc[] __initdata = { @@ -416,6 +495,11 @@ static void __init lubbock_map_io(void) pxa_map_io(); iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc)); + /* SSP data pins */ + pxa_gpio_mode(GPIO23_SCLK_MD); + pxa_gpio_mode(GPIO25_STXD_MD); + pxa_gpio_mode(GPIO26_SRXD_MD); + /* This enables the BTUART */ pxa_gpio_mode(GPIO42_BTRXD_MD); pxa_gpio_mode(GPIO43_BTTXD_MD); diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index b307f11951d..21ddf3de2f6 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -331,7 +331,7 @@ static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_in */ MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; - err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, SA_INTERRUPT, + err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED, "MMC card detect", data); if (err) { printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index 852ea72d8c8..2112c414f0e 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c @@ -10,7 +10,6 @@ * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/module.h> #include <linux/suspend.h> diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index a042473deed..6dbff6d9480 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -18,11 +18,14 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/fb.h> +#include <linux/pm.h> +#include <linux/delay.h> #include <asm/hardware.h> #include <asm/mach-types.h> #include <asm/irq.h> #include <asm/setup.h> +#include <asm/system.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -34,12 +37,15 @@ #include <asm/arch/irda.h> #include <asm/arch/poodle.h> #include <asm/arch/pxafb.h> +#include <asm/arch/sharpsl.h> +#include <asm/arch/ssp.h> #include <asm/hardware/scoop.h> #include <asm/hardware/locomo.h> #include <asm/mach/sharpsl_param.h> #include "generic.h" +#include "sharpsl.h" static struct resource poodle_scoop_resources[] = { [0] = { @@ -117,13 +123,71 @@ static struct resource locomo_resources[] = { }, }; -static struct platform_device locomo_device = { +struct platform_device poodle_locomo_device = { .name = "locomo", .id = 0, .num_resources = ARRAY_SIZE(locomo_resources), .resource = locomo_resources, }; +EXPORT_SYMBOL(poodle_locomo_device); + +/* + * Poodle SSP Device + */ + +struct platform_device poodle_ssp_device = { + .name = "corgi-ssp", + .id = -1, +}; + +struct corgissp_machinfo poodle_ssp_machinfo = { + .port = 1, + .cs_lcdcon = -1, + .cs_ads7846 = -1, + .cs_max1111 = -1, + .clk_lcdcon = 2, + .clk_ads7846 = 36, + .clk_max1111 = 2, +}; + + +/* + * Poodle Touch Screen Device + */ +static struct resource poodlets_resources[] = { + [0] = { + .start = POODLE_IRQ_GPIO_TP_INT, + .end = POODLE_IRQ_GPIO_TP_INT, + .flags = IORESOURCE_IRQ, + }, +}; + +static unsigned long poodle_get_hsync_len(void) +{ + return 0; +} + +static void poodle_null_hsync(void) +{ +} + +static struct corgits_machinfo poodle_ts_machinfo = { + .get_hsync_len = poodle_get_hsync_len, + .put_hsync = poodle_null_hsync, + .wait_hsync = poodle_null_hsync, +}; + +static struct platform_device poodle_ts_device = { + .name = "corgi-ts", + .dev = { + .platform_data = &poodle_ts_machinfo, + }, + .id = -1, + .num_resources = ARRAY_SIZE(poodlets_resources), + .resource = poodlets_resources, +}; + /* * MMC/SD Device @@ -141,12 +205,14 @@ static int poodle_mci_init(struct device *dev, irqreturn_t (*poodle_detect_int)( pxa_gpio_mode(GPIO6_MMCCLK_MD); pxa_gpio_mode(GPIO8_MMCCS0_MD); pxa_gpio_mode(POODLE_GPIO_nSD_DETECT | GPIO_IN); + pxa_gpio_mode(POODLE_GPIO_nSD_WP | GPIO_IN); pxa_gpio_mode(POODLE_GPIO_SD_PWR | GPIO_OUT); + pxa_gpio_mode(POODLE_GPIO_SD_PWR1 | GPIO_OUT); poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250); err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int, - SA_INTERRUPT | SA_TRIGGER_RISING | SA_TRIGGER_FALLING, + IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "MMC card detect", data); if (err) { printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); @@ -160,12 +226,22 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd) { struct pxamci_platform_data* p_d = dev->platform_data; - if (( 1 << vdd) & p_d->ocr_mask) - GPSR1 = GPIO_bit(POODLE_GPIO_SD_PWR); - else - GPCR1 = GPIO_bit(POODLE_GPIO_SD_PWR); + if (( 1 << vdd) & p_d->ocr_mask) { + GPSR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); + mdelay(2); + GPSR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); + } else { + GPCR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); + GPCR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); + } +} + +static int poodle_mci_get_ro(struct device *dev) +{ + return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP); } + static void poodle_mci_exit(struct device *dev, void *data) { free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data); @@ -174,6 +250,7 @@ static void poodle_mci_exit(struct device *dev, void *data) static struct pxamci_platform_data poodle_mci_platform_data = { .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, .init = poodle_mci_init, + .get_ro = poodle_mci_get_ro, .setpower = poodle_mci_setpower, .exit = poodle_mci_exit, }; @@ -243,14 +320,31 @@ static struct pxafb_mach_info poodle_fb_info __initdata = { }; static struct platform_device *devices[] __initdata = { - &locomo_device, + &poodle_locomo_device, &poodle_scoop_device, + &poodle_ssp_device, + &poodle_ts_device, }; +static void poodle_poweroff(void) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + arm_machine_restart('h'); +} + +static void poodle_restart(char mode) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + arm_machine_restart('h'); +} + static void __init poodle_init(void) { int ret = 0; + pm_power_off = poodle_poweroff; + arm_pm_restart = poodle_restart; + /* setup sleep mode values */ PWER = 0x00000002; PFER = 0x00000000; @@ -288,6 +382,7 @@ static void __init poodle_init(void) GPSR1 = 0x00000000; GPSR2 = 0x00000000; + set_pxa_fb_parent(&poodle_locomo_device.dev); set_pxa_fb_info(&poodle_fb_info); pxa_gpio_mode(POODLE_GPIO_USB_PULLUP | GPIO_OUT); pxa_gpio_mode(POODLE_GPIO_IR_ON | GPIO_OUT); @@ -301,6 +396,7 @@ static void __init poodle_init(void) if (ret) { printk(KERN_WARNING "poodle: Unable to register LoCoMo device\n"); } + corgi_ssp_set_machinfo(&poodle_ssp_machinfo); } static void __init fixup_poodle(struct machine_desc *desc, diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 573a5758e78..c1f21739bf7 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -16,7 +16,6 @@ * initialization stuff for PXA machines which can be overridden later if * need be. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 3baa70819f2..74eeada1e2f 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -11,7 +11,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index 6d402b262d8..db6e8f56a75 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c @@ -18,11 +18,11 @@ #include <linux/init.h> #include <linux/kernel.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/platform_device.h> #include <asm/hardware.h> #include <asm/mach-types.h> -#include <asm/irq.h> #include <asm/apm.h> #include <asm/arch/pm.h> #include <asm/arch/pxa-regs.h> @@ -128,6 +128,9 @@ struct battery_thresh spitz_battery_levels_noac[] = { */ int sharpsl_pm_pxa_read_max1111(int channel) { + if (machine_is_tosa()) // Ugly, better move this function into another module + return 0; + return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1 | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR); } @@ -139,27 +142,27 @@ void sharpsl_pm_pxa_init(void) pxa_gpio_mode(sharpsl_pm.machinfo->gpio_batlock | GPIO_IN); /* Register interrupt handlers */ - if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, SA_INTERRUPT, "AC Input Detect", sharpsl_ac_isr)) { + if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED, "AC Input Detect", sharpsl_ac_isr)) { dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin)); } else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin),IRQT_BOTHEDGE); - if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, SA_INTERRUPT, "Battery Cover", sharpsl_fatal_isr)) { + if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED, "Battery Cover", sharpsl_fatal_isr)) { dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock)); } else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock),IRQT_FALLING); if (sharpsl_pm.machinfo->gpio_fatal) { - if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, SA_INTERRUPT, "Fatal Battery", sharpsl_fatal_isr)) { + if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED, "Fatal Battery", sharpsl_fatal_isr)) { dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal)); } else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQT_FALLING); } - if (!machine_is_corgi()) + if (sharpsl_pm.machinfo->batfull_irq) { /* Register interrupt handler. */ - if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, SA_INTERRUPT, "CO", sharpsl_chrg_full_isr)) { + if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED, "CO", sharpsl_chrg_full_isr)) { dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull)); } else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull),IRQT_RISING); @@ -174,6 +177,6 @@ void sharpsl_pm_pxa_remove(void) if (sharpsl_pm.machinfo->gpio_fatal) free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr); - if (!machine_is_corgi()) + if (sharpsl_pm.machinfo->batfull_irq) free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); } diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index c9862688ff3..15874b360e5 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S @@ -11,7 +11,6 @@ * modify it under the terms of the GNU General Public License. */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/hardware.h> @@ -189,7 +188,7 @@ ENTRY(pxa_cpu_suspend) .data .align 5 ENTRY(pxa_cpu_resume) - mov r0, #PSR_I_BIT | PSR_F_BIT | MODE_SVC @ set SVC, irqs off + mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off msr cpsr_c, r0 ldr r0, sleep_save_sp @ stack phys addr diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 44bcb8097c7..1c32a9310dc 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -20,6 +20,7 @@ #include <linux/fs.h> #include <linux/interrupt.h> #include <linux/mmc/host.h> +#include <linux/pm.h> #include <asm/setup.h> #include <asm/memory.h> @@ -27,6 +28,7 @@ #include <asm/hardware.h> #include <asm/irq.h> #include <asm/io.h> +#include <asm/system.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -306,7 +308,7 @@ static int spitz_mci_init(struct device *dev, irqreturn_t (*spitz_detect_int)(in spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250); err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, - SA_INTERRUPT | SA_TRIGGER_RISING | SA_TRIGGER_FALLING, + IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "MMC card detect", data); if (err) { printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); @@ -432,8 +434,31 @@ static struct platform_device *devices[] __initdata = { &spitzled_device, }; +static void spitz_poweroff(void) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + + pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT); + GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET); + + mdelay(1000); + arm_machine_restart('h'); +} + +static void spitz_restart(char mode) +{ + /* Bootloader magic for a reboot */ + if((MSC0 & 0xffff0000) == 0x7ff00000) + MSC0 = (MSC0 & 0xffff) | 0x7ee00000; + + spitz_poweroff(); +} + static void __init common_init(void) { + pm_power_off = spitz_poweroff; + arm_pm_restart = spitz_restart; + PMCR = 0x00; /* setup sleep mode values */ diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 5e5bdc89848..40be833079c 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c @@ -27,6 +27,13 @@ #include <asm/arch/pxa-regs.h> #include "sharpsl.h" +#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ +#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ +#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */ +#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */ +#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */ +#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */ + static int spitz_last_ac_status; static void spitz_charger_init(void) @@ -190,6 +197,7 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { .gpio_batlock = SPITZ_GPIO_BAT_COVER, .gpio_acin = SPITZ_GPIO_AC_IN, .gpio_batfull = SPITZ_GPIO_CHRG_FULL, + .batfull_irq = 1, .gpio_fatal = SPITZ_GPIO_FATAL_BAT, .discharge = spitz_discharge, .discharge1 = spitz_discharge1, @@ -200,6 +208,13 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { .read_devdata = spitzpm_read_devdata, .charger_wakeup = spitz_charger_wakeup, .should_wakeup = spitz_should_wakeup, + .backlight_limit = corgibl_limit_intensity, + .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, + .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, + .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH, + .charge_acin_low = SHARPSL_CHARGE_ON_ACIN_LOW, + .fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT, + .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT, .bat_levels = 40, .bat_levels_noac = spitz_battery_levels_noac, .bat_levels_acin = spitz_battery_levels_acin, diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S index 6f6dbbd0802..d774430d02c 100644 --- a/arch/arm/mach-pxa/standby.S +++ b/arch/arm/mach-pxa/standby.S @@ -9,7 +9,6 @@ * or implied. */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index b9b2057349e..5dbd191c57c 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c @@ -10,7 +10,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/delay.h> @@ -118,7 +117,7 @@ pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction pxa_timer_irq = { .name = "PXA Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = pxa_timer_interrupt, }; diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 76c0e7f0a21..249353616ab 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -19,12 +19,15 @@ #include <linux/fs.h> #include <linux/interrupt.h> #include <linux/mmc/host.h> +#include <linux/pm.h> +#include <linux/delay.h> #include <asm/setup.h> #include <asm/memory.h> #include <asm/mach-types.h> #include <asm/hardware.h> #include <asm/irq.h> +#include <asm/system.h> #include <asm/arch/irda.h> #include <asm/arch/mmc.h> #include <asm/arch/udc.h> @@ -182,7 +185,7 @@ static int tosa_mci_init(struct device *dev, irqreturn_t (*tosa_detect_int)(int, tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250); - err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, SA_INTERRUPT, + err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, IRQF_DISABLED, "MMC/SD card detect", data); if (err) { printk(KERN_ERR "tosa_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); @@ -266,8 +269,31 @@ static struct platform_device *devices[] __initdata = { &tosaled_device, }; +static void tosa_poweroff(void) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + + pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT); + GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET); + + mdelay(1000); + arm_machine_restart('h'); +} + +static void tosa_restart(char mode) +{ + /* Bootloader magic for a reboot */ + if((MSC0 & 0xffff0000) == 0x7ff00000) + MSC0 = (MSC0 & 0xffff) | 0x7ee00000; + + tosa_poweroff(); +} + static void __init tosa_init(void) { + pm_power_off = tosa_poweroff; + arm_pm_restart = tosa_restart; + pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_IN); pxa_gpio_mode(TOSA_GPIO_TC6393_INT | GPIO_IN); pxa_gpio_mode(TOSA_GPIO_USB_IN | GPIO_IN); diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c new file mode 100644 index 00000000000..7c3007df1bd --- /dev/null +++ b/arch/arm/mach-pxa/trizeps4.c @@ -0,0 +1,473 @@ +/* + * linux/arch/arm/mach-pxa/trizeps4.c + * + * Support for the Keith und Koep Trizeps4 Module Platform. + * + * Author: Jürgen Schindele + * Created: 20 02, 2006 + * Copyright: Jürgen Schindele + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> +#include <linux/sysdev.h> +#include <linux/interrupt.h> +#include <linux/sched.h> +#include <linux/bitops.h> +#include <linux/fb.h> +#include <linux/ioport.h> +#include <linux/delay.h> +#include <linux/serial_8250.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> + +#include <asm/types.h> +#include <asm/setup.h> +#include <asm/memory.h> +#include <asm/mach-types.h> +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/sizes.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> +#include <asm/mach/flash.h> + +#include <asm/arch/pxa-regs.h> +#include <asm/arch/trizeps4.h> +#include <asm/arch/audio.h> +#include <asm/arch/pxafb.h> +#include <asm/arch/mmc.h> +#include <asm/arch/irda.h> +#include <asm/arch/ohci.h> + +#include "generic.h" + +/******************************************************************************************** + * ONBOARD FLASH + ********************************************************************************************/ +static struct mtd_partition trizeps4_partitions[] = { + { + .name = "Bootloader", + .size = 0x00040000, + .offset = 0, + .mask_flags = MTD_WRITEABLE /* force read-only */ + },{ + .name = "Kernel", + .size = 0x00400000, + .offset = 0x00040000 + },{ + .name = "Filesystem", + .size = MTDPART_SIZ_FULL, + .offset = 0x00440000 + } +}; + +static struct flash_platform_data trizeps4_flash_data[] = { + { + .map_name = "cfi_probe", + .parts = trizeps4_partitions, + .nr_parts = ARRAY_SIZE(trizeps4_partitions) + } +}; + +static struct resource flash_resource = { + .start = PXA_CS0_PHYS, + .end = PXA_CS0_PHYS + SZ_64M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device flash_device = { + .name = "pxa2xx-flash", + .id = 0, + .dev = { + .platform_data = &trizeps4_flash_data, + }, + .resource = &flash_resource, + .num_resources = 1, +}; + +/******************************************************************************************** + * DAVICOM DM9000 Ethernet + ********************************************************************************************/ +static struct resource dm9000_resources[] = { + [0] = { + .start = TRIZEPS4_ETH_PHYS+0x300, + .end = TRIZEPS4_ETH_PHYS+0x400-1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = TRIZEPS4_ETH_PHYS+0x8300, + .end = TRIZEPS4_ETH_PHYS+0x8400-1, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = TRIZEPS4_ETH_IRQ, + .end = TRIZEPS4_ETH_IRQ, + .flags = (IORESOURCE_IRQ | IRQT_RISING), + }, +}; + +static struct platform_device dm9000_device = { + .name = "dm9000", + .id = -1, + .num_resources = ARRAY_SIZE(dm9000_resources), + .resource = dm9000_resources, +}; + +/******************************************************************************************** + * PXA270 serial ports + ********************************************************************************************/ +static struct plat_serial8250_port tri_serial_ports[] = { +#ifdef CONFIG_SERIAL_PXA + /* this uses the own PXA driver */ + { + 0, + }, +#else + /* this uses the generic 8520 driver */ + [0] = { + .membase = (void *)&FFUART, + .irq = IRQ_FFUART, + .flags = UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM32, + .regshift = 2, + .uartclk = (921600*16), + }, + [1] = { + .membase = (void *)&BTUART, + .irq = IRQ_BTUART, + .flags = UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM32, + .regshift = 2, + .uartclk = (921600*16), + }, + { + 0, + }, +#endif +}; + +static struct platform_device uart_devices = { + .name = "serial8250", + .id = 0, + .dev = { + .platform_data = tri_serial_ports, + }, + .num_resources = 0, + .resource = NULL, +}; + +/******************************************************************************************** + * PXA270 ac97 sound codec + ********************************************************************************************/ +static struct platform_device ac97_audio_device = { + .name = "pxa2xx-ac97", + .id = -1, +}; + +static struct platform_device * trizeps4_devices[] __initdata = { + &flash_device, + &uart_devices, + &dm9000_device, + &ac97_audio_device, +}; + +#ifdef CONFIG_MACH_TRIZEPS4_CONXS +static short trizeps_conxs_bcr; + +/* PCCARD power switching supports only 3,3V */ +void board_pcmcia_power(int power) +{ + if (power) { + /* switch power on, put in reset and enable buffers */ + trizeps_conxs_bcr |= power; + trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; + trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN); + ConXS_BCR = trizeps_conxs_bcr; + /* wait a little */ + udelay(2000); + /* take reset away */ + trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET); + ConXS_BCR = trizeps_conxs_bcr; + udelay(2000); + } else { + /* put in reset */ + trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; + ConXS_BCR = trizeps_conxs_bcr; + udelay(1000); + /* switch power off */ + trizeps_conxs_bcr &= ~(0xf); + ConXS_BCR = trizeps_conxs_bcr; + + } + pr_debug("%s: o%s 0x%x\n", __FUNCTION__, power ? "n": "ff", trizeps_conxs_bcr); +} + +/* backlight power switching for LCD panel */ +static void board_backlight_power(int on) +{ + if (on) { + trizeps_conxs_bcr |= ConXS_BCR_L_DISP; + } else { + trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP; + } + pr_debug("%s: o%s 0x%x\n", __FUNCTION__, on ? "n" : "ff", trizeps_conxs_bcr); + ConXS_BCR = trizeps_conxs_bcr; +} + +/* Powersupply for MMC/SD cardslot */ +static void board_mci_power(struct device *dev, unsigned int vdd) +{ + struct pxamci_platform_data* p_d = dev->platform_data; + + if (( 1 << vdd) & p_d->ocr_mask) { + pr_debug("%s: on\n", __FUNCTION__); + /* FIXME fill in values here */ + } else { + pr_debug("%s: off\n", __FUNCTION__); + /* FIXME fill in values here */ + } +} + +static short trizeps_conxs_ircr; + +/* Switch modes and Power for IRDA receiver */ +static void board_irda_mode(struct device *dev, int mode) +{ + unsigned long flags; + + local_irq_save(flags); + if (mode & IR_SIRMODE) { + /* Slow mode */ + trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; + } else if (mode & IR_FIRMODE) { + /* Fast mode */ + trizeps_conxs_ircr |= ConXS_IRCR_MODE; + } + if (mode & IR_OFF) { + trizeps_conxs_ircr |= ConXS_IRCR_SD; + } else { + trizeps_conxs_ircr &= ~ConXS_IRCR_SD; + } + /* FIXME write values to register */ + local_irq_restore(flags); +} + +#else +/* for other baseboards define dummies */ +void board_pcmcia_power(int power) {;} +#define board_backlight_power NULL +#define board_mci_power NULL +#define board_irda_mode NULL + +#endif /* CONFIG_MACH_TRIZEPS4_CONXS */ +EXPORT_SYMBOL(board_pcmcia_power); + +static int trizeps4_mci_init(struct device *dev, irqreturn_t (*mci_detect_int)(int, void *, struct pt_regs *), void *data) +{ + int err; + /* setup GPIO for PXA27x MMC controller */ + pxa_gpio_mode(GPIO32_MMCCLK_MD); + pxa_gpio_mode(GPIO112_MMCCMD_MD); + pxa_gpio_mode(GPIO92_MMCDAT0_MD); + pxa_gpio_mode(GPIO109_MMCDAT1_MD); + pxa_gpio_mode(GPIO110_MMCDAT2_MD); + pxa_gpio_mode(GPIO111_MMCDAT3_MD); + + pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN); + + err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, + IRQF_DISABLED | IRQF_TRIGGER_RISING, + "MMC card detect", data); + if (err) { + printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); + return -1; + } + return 0; +} + +static void trizeps4_mci_exit(struct device *dev, void *data) +{ + free_irq(TRIZEPS4_MMC_IRQ, data); +} + +static struct pxamci_platform_data trizeps4_mci_platform_data = { + .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, + .init = trizeps4_mci_init, + .exit = trizeps4_mci_exit, + .setpower = board_mci_power, +}; + +static struct pxaficp_platform_data trizeps4_ficp_platform_data = { + .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, + .transceiver_mode = board_irda_mode, +}; + +static int trizeps4_ohci_init(struct device *dev) +{ + /* setup Port1 GPIO pin. */ + pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */ + pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */ + + /* Set the Power Control Polarity Low and Power Sense + Polarity Low to active low. */ + UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & + ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); + + return 0; +} + +static void trizeps4_ohci_exit(struct device *dev) +{ + ; +} + +static struct pxaohci_platform_data trizeps4_ohci_platform_data = { + .port_mode = PMM_PERPORT_MODE, + .init = trizeps4_ohci_init, + .exit = trizeps4_ohci_exit, +}; + +static struct map_desc trizeps4_io_desc[] __initdata = { + { /* ConXS CFSR */ + .virtual = TRIZEPS4_CFSR_VIRT, + .pfn = __phys_to_pfn(TRIZEPS4_CFSR_PHYS), + .length = 0x00001000, + .type = MT_DEVICE + }, + { /* ConXS BCR */ + .virtual = TRIZEPS4_BOCR_VIRT, + .pfn = __phys_to_pfn(TRIZEPS4_BOCR_PHYS), + .length = 0x00001000, + .type = MT_DEVICE + }, + { /* ConXS IRCR */ + .virtual = TRIZEPS4_IRCR_VIRT, + .pfn = __phys_to_pfn(TRIZEPS4_IRCR_PHYS), + .length = 0x00001000, + .type = MT_DEVICE + }, + { /* ConXS DCR */ + .virtual = TRIZEPS4_DICR_VIRT, + .pfn = __phys_to_pfn(TRIZEPS4_DICR_PHYS), + .length = 0x00001000, + .type = MT_DEVICE + }, + { /* ConXS UPSR */ + .virtual = TRIZEPS4_UPSR_VIRT, + .pfn = __phys_to_pfn(TRIZEPS4_UPSR_PHYS), + .length = 0x00001000, + .type = MT_DEVICE + } +}; + +static struct pxafb_mach_info sharp_lcd __initdata = { + .pixclock = 78000, + .xres = 640, + .yres = 480, + .bpp = 8, + .hsync_len = 4, + .left_margin = 4, + .right_margin = 4, + .vsync_len = 2, + .upper_margin = 0, + .lower_margin = 0, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .cmap_greyscale = 0, + .cmap_inverse = 0, + .cmap_static = 0, + .lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual, + .lccr3 = 0x0340ff02, + .pxafb_backlight_power = board_backlight_power, +}; + +static void __init trizeps4_fixup(struct machine_desc *desc, struct tag *tags, char **cmdline, struct meminfo *mi) +{ +} + +static void __init trizeps4_init(void) +{ + platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices)); + + set_pxa_fb_info(&sharp_lcd); + + pxa_set_mci_info(&trizeps4_mci_platform_data); + pxa_set_ficp_info(&trizeps4_ficp_platform_data); + pxa_set_ohci_info(&trizeps4_ohci_platform_data); +} + +static void __init trizeps4_map_io(void) +{ + pxa_map_io(); + iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc)); + + /* for DiskOnChip */ + pxa_gpio_mode(GPIO15_nCS_1_MD); + + /* for off-module PIC on ConXS board */ + pxa_gpio_mode(GPIO_PIC | GPIO_IN); + + /* UCB1400 irq */ + pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN); + + /* for DM9000 LAN */ + pxa_gpio_mode(GPIO78_nCS_2_MD); + pxa_gpio_mode(GPIO_DM9000 | GPIO_IN); + + /* for PCMCIA device */ + pxa_gpio_mode(GPIO_PCD | GPIO_IN); + pxa_gpio_mode(GPIO_PRDY | GPIO_IN); + + /* for I2C adapter */ + pxa_gpio_mode(GPIO117_I2CSCL_MD); + pxa_gpio_mode(GPIO118_I2CSDA_MD); + + /* MMC_DET s.o. */ + pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN); + + /* whats that for ??? */ + pxa_gpio_mode(GPIO79_nCS_3_MD); + + pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */ + pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */ + +#ifdef CONFIG_MACH_TRIZEPS4_CONXS +#ifdef CONFIG_IDE_PXA_CF + /* if boot direct from compact flash dont disable power */ + trizeps_conxs_bcr = 0x0009; +#else + /* this is the reset value */ + trizeps_conxs_bcr = 0x00A0; +#endif + ConXS_BCR = trizeps_conxs_bcr; +#endif + + PWER = 0x00000002; + PFER = 0x00000000; + PRER = 0x00000002; + PGSR0 = 0x0158C000; + PGSR1 = 0x00FF0080; + PGSR2 = 0x0001C004; + /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ + PCFR |= PCFR_OPDE; +} + +MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") + /* MAINTAINER("Jürgen Schindele") */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = TRIZEPS4_SDRAM_BASE + 0x100, + .fixup = trizeps4_fixup, + .init_machine = trizeps4_init, + .map_io = trizeps4_map_io, + .init_irq = pxa_init_irq, + .timer = &pxa_timer, +MACHINE_END + diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index d13270c5d7c..da028697382 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@ -18,7 +18,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> @@ -537,7 +536,7 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id, struct pt_reg static struct irqaction realview_timer_irq = { .name = "RealView Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = realview_timer_interrupt, }; diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 693fb1e396e..84a959530fb 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c @@ -19,7 +19,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/sysdev.h> diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c index bd86ffba881..ac511d41d4d 100644 --- a/arch/arm/mach-rpc/dma.c +++ b/arch/arm/mach-rpc/dma.c @@ -128,7 +128,7 @@ static irqreturn_t iomd_dma_handle(int irq, void *dev_id, struct pt_regs *regs) static int iomd_request_dma(dmach_t channel, dma_t *dma) { return request_irq(dma->dma_irq, iomd_dma_handle, - SA_INTERRUPT, dma->device_id, dma); + IRQF_DISABLED, dma->device_id, dma); } static void iomd_free_dma(dmach_t channel, dma_t *dma) diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index 970f98dadff..b4171dd43df 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig @@ -70,6 +70,24 @@ config ARCH_S3C2440 help Say Y here if you are using the SMDK2440. +config SMDK2440_CPU2440 + bool "SMDK2440 with S3C2440 CPU module" + depends on ARCH_S3C2440 + default y if ARCH_S3C2440 + select CPU_S3C2440 + +config SMDK2440_CPU2442 + bool "SMDM2440 with S3C2442 CPU module" + depends on ARCH_S3C2440 + select CPU_S3C2442 + +config MACH_SMDK2413 + bool "SMDK2413" + select CPU_S3C2412 + select MACH_SMDK + help + Say Y here if you are using an SMDK2413 + config MACH_VR1000 bool "Thorcom VR1000" select CPU_S3C2410 @@ -102,19 +120,55 @@ config MACH_NEXCODER_2440 endmenu +config S3C2410_CLOCK + bool + help + Clock code for the S3C2410, and similar processors + config CPU_S3C2410 bool depends on ARCH_S3C2410 + select S3C2410_CLOCK help Support for S3C2410 and S3C2410A family from the S3C24XX line of Samsung Mobile CPUs. +# internal node to signify if we are only dealing with an S3C2412 + +config CPU_S3C2412_ONLY + bool + depends on ARCH_S3C2410 && !CPU_S3C2400 && !CPU_S3C2410 && \ + !CPU_S3C2440 && !CPU_S3C2442 && CPU_S3C2412 + default y if CPU_S3C2412 + +config CPU_S3C2412 + bool + depends on ARCH_S3C2410 + help + Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line + +config CPU_S3C244X + bool + depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442) + help + Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems. + config CPU_S3C2440 bool depends on ARCH_S3C2410 + select S3C2410_CLOCK + select CPU_S3C244X help Support for S3C2440 Samsung Mobile CPU based systems. +config CPU_S3C2442 + bool + depends on ARCH_S3C2420 + select S3C2410_CLOCK + select CPU_S3C244X + help + Support for S3C2442 Samsung Mobile CPU based systems. + comment "S3C2410 Boot" config S3C2410_BOOT_WATCHDOG diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 3e5712db6b5..0c7938645df 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile @@ -24,6 +24,20 @@ obj-$(CONFIG_S3C2410_DMA) += dma.o obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o +# S3C2412 support +obj-$(CONFIG_CPU_S3C2412) += s3c2412.o +obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o + +# +# S3C244X support + +obj-$(CONFIG_CPU_S3C244X) += s3c244x.o +obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o + +# Clock control + +obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o + # S3C2440 support obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o @@ -31,6 +45,11 @@ obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o +# S3C2442 support + +obj-$(CONFIG_CPU_S3C2442) += s3c2442.o +obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o + # bast extras obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o @@ -43,6 +62,7 @@ obj-$(CONFIG_ARCH_BAST) += mach-bast.o usb-simtec.o obj-$(CONFIG_ARCH_H1940) += mach-h1940.o obj-$(CONFIG_MACH_N30) += mach-n30.o obj-$(CONFIG_ARCH_SMDK2410) += mach-smdk2410.o +obj-$(CONFIG_MACH_SMDK2413) += mach-smdk2413.o obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o obj-$(CONFIG_MACH_VR1000) += mach-vr1000.o usb-simtec.o obj-$(CONFIG_MACH_RX3715) += mach-rx3715.o diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c index fbbeb055300..def4441d244 100644 --- a/arch/arm/mach-s3c2410/bast-irq.c +++ b/arch/arm/mach-s3c2410/bast-irq.c @@ -136,8 +136,8 @@ bast_irq_pc104_demux(unsigned int irq, for (i = 0; stat != 0; i++, stat >>= 1) { if (stat & 1) { irqno = bast_pc104_irqs[i]; - - desc_handle_irq(irqno, irq_desc + irqno, regs); + desc = irq_desc + irqno; + desc_handle_irq(irqno, desc, regs); } } } @@ -156,7 +156,7 @@ static __init int bast_irq_init(void) set_irq_chained_handler(IRQ_ISA, bast_irq_pc104_demux); - /* reigster our IRQs */ + /* register our IRQs */ for (i = 0; i < 4; i++) { unsigned int irqno = bast_pc104_irqs[i]; diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index 6de713ad319..e13fb677889 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c @@ -3,7 +3,7 @@ * Copyright (c) 2004-2005 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * - * S3C2410 Clock control support + * S3C24XX Core clock control support * * Based on, and code from linux/arch/arm/mach-versatile/clock.c ** @@ -56,25 +56,6 @@ static LIST_HEAD(clocks); DEFINE_MUTEX(clocks_mutex); -/* old functions */ - -void inline s3c24xx_clk_enable(unsigned int clocks, unsigned int enable) -{ - unsigned long clkcon; - - clkcon = __raw_readl(S3C2410_CLKCON); - - if (enable) - clkcon |= clocks; - else - clkcon &= ~clocks; - - /* ensure none of the special function bits set */ - clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER); - - __raw_writel(clkcon, S3C2410_CLKCON); -} - /* enable and disable calls for use with the clk struct */ static int clk_null_enable(struct clk *clk, int enable) @@ -82,12 +63,6 @@ static int clk_null_enable(struct clk *clk, int enable) return 0; } -int s3c24xx_clkcon_enable(struct clk *clk, int enable) -{ - s3c24xx_clk_enable(clk->ctrlbit, enable); - return 0; -} - /* Clock API calls */ struct clk *clk_get(struct device *dev, const char *id) @@ -173,8 +148,11 @@ unsigned long clk_get_rate(struct clk *clk) if (clk->rate != 0) return clk->rate; - while (clk->parent != NULL && clk->rate == 0) - clk = clk->parent; + if (clk->get_rate != NULL) + return (clk->get_rate)(clk); + + if (clk->parent != NULL) + return clk_get_rate(clk->parent); return clk->rate; } @@ -233,31 +211,9 @@ EXPORT_SYMBOL(clk_set_rate); EXPORT_SYMBOL(clk_get_parent); EXPORT_SYMBOL(clk_set_parent); -/* base clock enable */ - -static int s3c24xx_upll_enable(struct clk *clk, int enable) -{ - unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); - unsigned long orig = clkslow; - - if (enable) - clkslow &= ~S3C2410_CLKSLOW_UCLK_OFF; - else - clkslow |= S3C2410_CLKSLOW_UCLK_OFF; - - __raw_writel(clkslow, S3C2410_CLKSLOW); - - /* if we started the UPLL, then allow to settle */ - - if (enable && (orig & S3C2410_CLKSLOW_UCLK_OFF)) - udelay(200); - - return 0; -} - /* base clocks */ -static struct clk clk_xtal = { +struct clk clk_xtal = { .name = "xtal", .id = -1, .rate = 0, @@ -265,23 +221,27 @@ static struct clk clk_xtal = { .ctrlbit = 0, }; -static struct clk clk_upll = { +struct clk clk_mpll = { + .name = "mpll", + .id = -1, +}; + +struct clk clk_upll = { .name = "upll", .id = -1, .parent = NULL, - .enable = s3c24xx_upll_enable, .ctrlbit = 0, }; -static struct clk clk_f = { +struct clk clk_f = { .name = "fclk", .id = -1, .rate = 0, - .parent = NULL, + .parent = &clk_mpll, .ctrlbit = 0, }; -static struct clk clk_h = { +struct clk clk_h = { .name = "hclk", .id = -1, .rate = 0, @@ -289,7 +249,7 @@ static struct clk clk_h = { .ctrlbit = 0, }; -static struct clk clk_p = { +struct clk clk_p = { .name = "pclk", .id = -1, .rate = 0, @@ -308,14 +268,14 @@ struct clk clk_usb_bus = { static int s3c24xx_dclk_enable(struct clk *clk, int enable) { - unsigned long dclkcon = __raw_readl(S3C2410_DCLKCON); + unsigned long dclkcon = __raw_readl(S3C24XX_DCLKCON); if (enable) dclkcon |= clk->ctrlbit; else dclkcon &= ~clk->ctrlbit; - __raw_writel(dclkcon, S3C2410_DCLKCON); + __raw_writel(dclkcon, S3C24XX_DCLKCON); return 0; } @@ -334,7 +294,7 @@ static int s3c24xx_dclk_setparent(struct clk *clk, struct clk *parent) clk->parent = parent; - dclkcon = __raw_readl(S3C2410_DCLKCON); + dclkcon = __raw_readl(S3C24XX_DCLKCON); if (clk->ctrlbit == S3C2410_DCLKCON_DCLK0EN) { if (uclk) @@ -348,7 +308,7 @@ static int s3c24xx_dclk_setparent(struct clk *clk, struct clk *parent) dclkcon &= ~S3C2410_DCLKCON_DCLK1_UCLK; } - __raw_writel(dclkcon, S3C2410_DCLKCON); + __raw_writel(dclkcon, S3C24XX_DCLKCON); return 0; } @@ -426,108 +386,6 @@ struct clk s3c24xx_uclk = { .id = -1, }; - -/* standard clock definitions */ - -static struct clk init_clocks[] = { - { - .name = "nand", - .id = -1, - .parent = &clk_h, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_NAND, - }, { - .name = "lcd", - .id = -1, - .parent = &clk_h, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_LCDC, - }, { - .name = "usb-host", - .id = -1, - .parent = &clk_h, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_USBH, - }, { - .name = "usb-device", - .id = -1, - .parent = &clk_h, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_USBD, - }, { - .name = "timers", - .id = -1, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_PWMT, - }, { - .name = "sdi", - .id = -1, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_SDI, - }, { - .name = "uart", - .id = 0, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_UART0, - }, { - .name = "uart", - .id = 1, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_UART1, - }, { - .name = "uart", - .id = 2, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_UART2, - }, { - .name = "gpio", - .id = -1, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_GPIO, - }, { - .name = "rtc", - .id = -1, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_RTC, - }, { - .name = "adc", - .id = -1, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_ADC, - }, { - .name = "i2c", - .id = -1, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_IIC, - }, { - .name = "iis", - .id = -1, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_IIS, - }, { - .name = "spi", - .id = -1, - .parent = &clk_p, - .enable = s3c24xx_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_SPI, - }, { - .name = "watchdog", - .id = -1, - .parent = &clk_p, - .ctrlbit = 0, - } -}; - /* initialise the clock system */ int s3c24xx_register_clock(struct clk *clk) @@ -537,14 +395,6 @@ int s3c24xx_register_clock(struct clk *clk) if (clk->enable == NULL) clk->enable = clk_null_enable; - /* if this is a standard clock, set the usage state */ - - if (clk->ctrlbit && clk->enable == s3c24xx_clkcon_enable) { - unsigned long clkcon = __raw_readl(S3C2410_CLKCON); - - clk->usage = (clkcon & clk->ctrlbit) ? 1 : 0; - } - /* add to the list of available clocks */ mutex_lock(&clocks_mutex); @@ -561,44 +411,18 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, unsigned long hclk, unsigned long pclk) { - unsigned long upllcon = __raw_readl(S3C2410_UPLLCON); - unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); - struct clk *clkp = init_clocks; - int ptr; - int ret; - - printk(KERN_INFO "S3C2410 Clocks, (c) 2004 Simtec Electronics\n"); + printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n"); /* initialise the main system clocks */ clk_xtal.rate = xtal; - clk_upll.rate = s3c2410_get_pll(upllcon, xtal); + clk_upll.rate = s3c2410_get_pll(__raw_readl(S3C2410_UPLLCON), xtal); + clk_mpll.rate = fclk; clk_h.rate = hclk; clk_p.rate = pclk; clk_f.rate = fclk; - /* We must be careful disabling the clocks we are not intending to - * be using at boot time, as subsytems such as the LCD which do - * their own DMA requests to the bus can cause the system to lockup - * if they where in the middle of requesting bus access. - * - * Disabling the LCD clock if the LCD is active is very dangerous, - * and therefore the bootloader should be careful to not enable - * the LCD clock if it is not needed. - */ - - mutex_lock(&clocks_mutex); - - s3c24xx_clk_enable(S3C2410_CLKCON_NAND, 0); - s3c24xx_clk_enable(S3C2410_CLKCON_USBH, 0); - s3c24xx_clk_enable(S3C2410_CLKCON_USBD, 0); - s3c24xx_clk_enable(S3C2410_CLKCON_ADC, 0); - s3c24xx_clk_enable(S3C2410_CLKCON_IIC, 0); - s3c24xx_clk_enable(S3C2410_CLKCON_SPI, 0); - - mutex_unlock(&clocks_mutex); - /* assume uart clocks are correctly setup */ /* register our clocks */ @@ -606,6 +430,9 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, if (s3c24xx_register_clock(&clk_xtal) < 0) printk(KERN_ERR "failed to register master xtal\n"); + if (s3c24xx_register_clock(&clk_mpll) < 0) + printk(KERN_ERR "failed to register mpll clock\n"); + if (s3c24xx_register_clock(&clk_upll) < 0) printk(KERN_ERR "failed to register upll clock\n"); @@ -618,27 +445,5 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, if (s3c24xx_register_clock(&clk_p) < 0) printk(KERN_ERR "failed to register cpu pclk\n"); - - if (s3c24xx_register_clock(&clk_usb_bus) < 0) - printk(KERN_ERR "failed to register usb bus clock\n"); - - /* register clocks from clock array */ - - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - } - - /* show the clock-slow value */ - - printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n", - print_mhz(xtal / ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))), - (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast", - (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on", - (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on"); - return 0; } diff --git a/arch/arm/mach-s3c2410/clock.h b/arch/arm/mach-s3c2410/clock.h index 01bb458bf8e..7f0ea03e1d4 100644 --- a/arch/arm/mach-s3c2410/clock.h +++ b/arch/arm/mach-s3c2410/clock.h @@ -22,6 +22,7 @@ struct clk { int (*enable)(struct clk *, int enable); int (*set_rate)(struct clk *c, unsigned long rate); + unsigned long (*get_rate)(struct clk *c); unsigned long (*round_rate)(struct clk *c, unsigned long rate); int (*set_parent)(struct clk *c, struct clk *parent); }; @@ -36,6 +37,15 @@ extern struct clk s3c24xx_uclk; extern struct clk clk_usb_bus; +/* core clock support */ + +extern struct clk clk_f; +extern struct clk clk_h; +extern struct clk clk_p; +extern struct clk clk_mpll; +extern struct clk clk_upll; +extern struct clk clk_xtal; + /* exports for arch/arm/mach-s3c2410 * * Please DO NOT use these outside of arch/arm/mach-s3c2410 @@ -43,7 +53,8 @@ extern struct clk clk_usb_bus; extern struct mutex clocks_mutex; -extern int s3c24xx_clkcon_enable(struct clk *clk, int enable); +extern int s3c2410_clkcon_enable(struct clk *clk, int enable); + extern int s3c24xx_register_clock(struct clk *clk); extern int s3c24xx_setup_clocks(unsigned long xtal, diff --git a/arch/arm/mach-s3c2410/common-smdk.c b/arch/arm/mach-s3c2410/common-smdk.c index c940890f621..a40eaa65617 100644 --- a/arch/arm/mach-s3c2410/common-smdk.c +++ b/arch/arm/mach-s3c2410/common-smdk.c @@ -34,6 +34,7 @@ #include <asm/irq.h> #include <asm/arch/regs-gpio.h> +#include <asm/arch/leds-gpio.h> #include <asm/arch/nand.h> @@ -41,6 +42,66 @@ #include "devs.h" #include "pm.h" +/* LED devices */ + +static struct s3c24xx_led_platdata smdk_pdata_led4 = { + .gpio = S3C2410_GPF4, + .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, + .name = "led4", + .def_trigger = "timer", +}; + +static struct s3c24xx_led_platdata smdk_pdata_led5 = { + .gpio = S3C2410_GPF5, + .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, + .name = "led5", + .def_trigger = "nand-disk", +}; + +static struct s3c24xx_led_platdata smdk_pdata_led6 = { + .gpio = S3C2410_GPF6, + .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, + .name = "led6", +}; + +static struct s3c24xx_led_platdata smdk_pdata_led7 = { + .gpio = S3C2410_GPF7, + .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, + .name = "led7", +}; + +static struct platform_device smdk_led4 = { + .name = "s3c24xx_led", + .id = 0, + .dev = { + .platform_data = &smdk_pdata_led4, + }, +}; + +static struct platform_device smdk_led5 = { + .name = "s3c24xx_led", + .id = 1, + .dev = { + .platform_data = &smdk_pdata_led5, + }, +}; + +static struct platform_device smdk_led6 = { + .name = "s3c24xx_led", + .id = 2, + .dev = { + .platform_data = &smdk_pdata_led6, + }, +}; + +static struct platform_device smdk_led7 = { + .name = "s3c24xx_led", + .id = 3, + .dev = { + .platform_data = &smdk_pdata_led7, + }, +}; + /* NAND parititon from 2.4.18-swl5 */ static struct mtd_partition smdk_default_nand_part[] = { @@ -111,6 +172,10 @@ static struct s3c2410_platform_nand smdk_nand_info = { static struct platform_device __initdata *smdk_devs[] = { &s3c_device_nand, + &smdk_led4, + &smdk_led5, + &smdk_led6, + &smdk_led7, }; void __init smdk_machine_init(void) diff --git a/arch/arm/mach-s3c2410/cpu.c b/arch/arm/mach-s3c2410/cpu.c index 70c34fcf785..1c3c6adae6c 100644 --- a/arch/arm/mach-s3c2410/cpu.c +++ b/arch/arm/mach-s3c2410/cpu.c @@ -37,12 +37,17 @@ #include <asm/mach/map.h> #include <asm/arch/regs-gpio.h> +#include <asm/arch/regs-serial.h> #include "cpu.h" +#include "devs.h" #include "clock.h" #include "s3c2400.h" #include "s3c2410.h" +#include "s3c2412.h" +#include "s3c244x.h" #include "s3c2440.h" +#include "s3c2442.h" struct cpu_table { unsigned long idcode; @@ -58,7 +63,9 @@ struct cpu_table { static const char name_s3c2400[] = "S3C2400"; static const char name_s3c2410[] = "S3C2410"; +static const char name_s3c2412[] = "S3C2412"; static const char name_s3c2440[] = "S3C2440"; +static const char name_s3c2442[] = "S3C2442"; static const char name_s3c2410a[] = "S3C2410A"; static const char name_s3c2440a[] = "S3C2440A"; @@ -84,22 +91,40 @@ static struct cpu_table cpu_ids[] __initdata = { { .idcode = 0x32440000, .idmask = 0xffffffff, - .map_io = s3c2440_map_io, - .init_clocks = s3c2440_init_clocks, - .init_uarts = s3c2440_init_uarts, + .map_io = s3c244x_map_io, + .init_clocks = s3c244x_init_clocks, + .init_uarts = s3c244x_init_uarts, .init = s3c2440_init, .name = name_s3c2440 }, { .idcode = 0x32440001, .idmask = 0xffffffff, - .map_io = s3c2440_map_io, - .init_clocks = s3c2440_init_clocks, - .init_uarts = s3c2440_init_uarts, + .map_io = s3c244x_map_io, + .init_clocks = s3c244x_init_clocks, + .init_uarts = s3c244x_init_uarts, .init = s3c2440_init, .name = name_s3c2440a }, { + .idcode = 0x32440aaa, + .idmask = 0xffffffff, + .map_io = s3c244x_map_io, + .init_clocks = s3c244x_init_clocks, + .init_uarts = s3c244x_init_uarts, + .init = s3c2442_init, + .name = name_s3c2442 + }, + { + .idcode = 0x32412001, + .idmask = 0xffffffff, + .map_io = s3c2412_map_io, + .init_clocks = s3c2412_init_clocks, + .init_uarts = s3c2412_init_uarts, + .init = s3c2412_init, + .name = name_s3c2412, + }, + { .idcode = 0x0, /* S3C2400 doesn't have an idcode */ .idmask = 0xffffffff, .map_io = s3c2400_map_io, @@ -157,6 +182,24 @@ void s3c24xx_set_board(struct s3c24xx_board *b) static struct cpu_table *cpu; +static unsigned long s3c24xx_read_idcode_v5(void) +{ +#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) + return __raw_readl(S3C2412_GSTATUS1); +#else + return 1UL; /* don't look like an 2400 */ +#endif +} + +static unsigned long s3c24xx_read_idcode_v4(void) +{ +#ifndef CONFIG_CPU_S3C2400 + return __raw_readl(S3C2410_GSTATUS1); +#else + return 0UL; +#endif +} + void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) { unsigned long idcode = 0x0; @@ -164,9 +207,11 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) /* initialise the io descriptors we need for initialisation */ iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); -#ifndef CONFIG_CPU_S3C2400 - idcode = __raw_readl(S3C2410_GSTATUS1); -#endif + if (cpu_architecture() >= CPU_ARCH_ARMv5) { + idcode = s3c24xx_read_idcode_v5(); + } else { + idcode = s3c24xx_read_idcode_v4(); + } cpu = s3c_lookup_cpu(idcode); @@ -175,13 +220,13 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) panic("Unknown S3C24XX CPU"); } + printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode); + if (cpu->map_io == NULL || cpu->init == NULL) { printk(KERN_ERR "CPU %s support not enabled\n", cpu->name); panic("Unsupported S3C24XX CPU"); } - printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode); - (cpu->map_io)(mach_desc, size); } @@ -208,6 +253,49 @@ void __init s3c24xx_init_clocks(int xtal) (cpu->init_clocks)(xtal); } +/* uart management */ + +static int nr_uarts __initdata = 0; + +static struct s3c2410_uartcfg uart_cfgs[3]; + +/* s3c24xx_init_uartdevs + * + * copy the specified platform data and configuration into our central + * set of devices, before the data is thrown away after the init process. + * + * This also fills in the array passed to the serial driver for the + * early initialisation of the console. +*/ + +void __init s3c24xx_init_uartdevs(char *name, + struct s3c24xx_uart_resources *res, + struct s3c2410_uartcfg *cfg, int no) +{ + struct platform_device *platdev; + struct s3c2410_uartcfg *cfgptr = uart_cfgs; + struct s3c24xx_uart_resources *resp; + int uart; + + memcpy(cfgptr, cfg, sizeof(struct s3c2410_uartcfg) * no); + + for (uart = 0; uart < no; uart++, cfg++, cfgptr++) { + platdev = s3c24xx_uart_src[cfgptr->hwport]; + + resp = res + cfgptr->hwport; + + s3c24xx_uart_devs[uart] = platdev; + + platdev->name = name; + platdev->resource = resp->resources; + platdev->num_resources = resp->nr_resources; + + platdev->dev.platform_data = cfgptr; + } + + nr_uarts = no; +} + void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) { if (cpu == NULL) @@ -232,6 +320,10 @@ static int __init s3c_arch_init(void) if (ret != 0) return ret; + ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts); + if (ret != 0) + return ret; + if (board != NULL) { struct platform_device **ptr = board->devices; int i; diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h index fc1067783f6..b0ed9d2d141 100644 --- a/arch/arm/mach-s3c2410/cpu.h +++ b/arch/arm/mach-s3c2410/cpu.h @@ -31,6 +31,8 @@ #define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000) /* forward declaration */ +struct s3c24xx_uart_resources; +struct platform_device; struct s3c2410_uartcfg; struct map_desc; @@ -44,6 +46,10 @@ extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); extern void s3c24xx_init_clocks(int xtal); +extern void s3c24xx_init_uartdevs(char *name, + struct s3c24xx_uart_resources *res, + struct s3c2410_uartcfg *cfg, int no); + /* the board structure is used at first initialsation time * to get info such as the devices to register for this * board. This is done because platfrom_add_devices() cannot @@ -67,4 +73,7 @@ extern struct sys_timer s3c24xx_timer; /* system device classes */ +extern struct sysdev_class s3c2410_sysclass; +extern struct sysdev_class s3c2412_sysclass; extern struct sysdev_class s3c2440_sysclass; +extern struct sysdev_class s3c2442_sysclass; diff --git a/arch/arm/mach-s3c2410/devs.c b/arch/arm/mach-s3c2410/devs.c index ca09ba516e4..ad3845e329b 100644 --- a/arch/arm/mach-s3c2410/devs.c +++ b/arch/arm/mach-s3c2410/devs.c @@ -38,10 +38,86 @@ #include <asm/arch/regs-serial.h> #include "devs.h" +#include "cpu.h" /* Serial port registrations */ -struct platform_device *s3c24xx_uart_devs[3]; +static struct resource s3c2410_uart0_resource[] = { + [0] = { + .start = S3C2410_PA_UART0, + .end = S3C2410_PA_UART0 + 0x3fff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_S3CUART_RX0, + .end = IRQ_S3CUART_ERR0, + .flags = IORESOURCE_IRQ, + } +}; + +static struct resource s3c2410_uart1_resource[] = { + [0] = { + .start = S3C2410_PA_UART1, + .end = S3C2410_PA_UART1 + 0x3fff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_S3CUART_RX1, + .end = IRQ_S3CUART_ERR1, + .flags = IORESOURCE_IRQ, + } +}; + +static struct resource s3c2410_uart2_resource[] = { + [0] = { + .start = S3C2410_PA_UART2, + .end = S3C2410_PA_UART2 + 0x3fff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_S3CUART_RX2, + .end = IRQ_S3CUART_ERR2, + .flags = IORESOURCE_IRQ, + } +}; + +struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = { + [0] = { + .resources = s3c2410_uart0_resource, + .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource), + }, + [1] = { + .resources = s3c2410_uart1_resource, + .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource), + }, + [2] = { + .resources = s3c2410_uart2_resource, + .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource), + }, +}; + +/* yart devices */ + +static struct platform_device s3c24xx_uart_device0 = { + .id = 0, +}; + +static struct platform_device s3c24xx_uart_device1 = { + .id = 1, +}; + +static struct platform_device s3c24xx_uart_device2 = { + .id = 2, +}; + +struct platform_device *s3c24xx_uart_src[3] = { + &s3c24xx_uart_device0, + &s3c24xx_uart_device1, + &s3c24xx_uart_device2, +}; + +struct platform_device *s3c24xx_uart_devs[3] = { +}; /* USB Host Controller */ diff --git a/arch/arm/mach-s3c2410/devs.h b/arch/arm/mach-s3c2410/devs.h index 52c4bab5c76..726e2eaf879 100644 --- a/arch/arm/mach-s3c2410/devs.h +++ b/arch/arm/mach-s3c2410/devs.h @@ -14,10 +14,17 @@ * 27-Aug-2004 BJD Added timers 0 through 3 * 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv */ -#include <linux/config.h> #include <linux/platform_device.h> +struct s3c24xx_uart_resources { + struct resource *resources; + unsigned long nr_resources; +}; + +extern struct s3c24xx_uart_resources s3c2410_uart_resources[]; + extern struct platform_device *s3c24xx_uart_devs[]; +extern struct platform_device *s3c24xx_uart_src[]; extern struct platform_device s3c_device_usb; extern struct platform_device s3c_device_lcd; diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 4dbd8e758ea..094cc52745c 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c @@ -31,7 +31,6 @@ * possible DMA function */ -#include <linux/config.h> #ifdef CONFIG_S3C2410_DMA_DEBUG #define DEBUG @@ -719,7 +718,7 @@ int s3c2410_dma_request(unsigned int channel, s3c2410_dma_client_t *client, pr_debug("dma%d: %s : requesting irq %d\n", channel, __FUNCTION__, chan->irq); - err = request_irq(chan->irq, s3c2410_dma_irq, SA_INTERRUPT, + err = request_irq(chan->irq, s3c2410_dma_irq, IRQF_DISABLED, client->name, (void *)chan); if (err) { diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c index 66d8c068e94..6822dc7f779 100644 --- a/arch/arm/mach-s3c2410/irq.c +++ b/arch/arm/mach-s3c2410/irq.c @@ -191,13 +191,9 @@ static struct irqchip s3c_irq_chip = { .ack = s3c_irq_ack, .mask = s3c_irq_mask, .unmask = s3c_irq_unmask, - .set_wake = s3c_irq_wake + .set_wake = s3c_irq_wake }; -/* S3C2410_EINTMASK - * S3C2410_EINTPEND - */ - static void s3c_irqext_mask(unsigned int irqno) { @@ -205,9 +201,9 @@ s3c_irqext_mask(unsigned int irqno) irqno -= EXTINT_OFF; - mask = __raw_readl(S3C2410_EINTMASK); + mask = __raw_readl(S3C24XX_EINTMASK); mask |= ( 1UL << irqno); - __raw_writel(mask, S3C2410_EINTMASK); + __raw_writel(mask, S3C24XX_EINTMASK); if (irqno <= (IRQ_EINT7 - EXTINT_OFF)) { /* check to see if all need masking */ @@ -232,11 +228,11 @@ s3c_irqext_ack(unsigned int irqno) bit = 1UL << (irqno - EXTINT_OFF); - mask = __raw_readl(S3C2410_EINTMASK); + mask = __raw_readl(S3C24XX_EINTMASK); - __raw_writel(bit, S3C2410_EINTPEND); + __raw_writel(bit, S3C24XX_EINTPEND); - req = __raw_readl(S3C2410_EINTPEND); + req = __raw_readl(S3C24XX_EINTPEND); req &= ~mask; /* not sure if we should be acking the parent irq... */ @@ -257,9 +253,9 @@ s3c_irqext_unmask(unsigned int irqno) irqno -= EXTINT_OFF; - mask = __raw_readl(S3C2410_EINTMASK); + mask = __raw_readl(S3C24XX_EINTMASK); mask &= ~( 1UL << irqno); - __raw_writel(mask, S3C2410_EINTMASK); + __raw_writel(mask, S3C24XX_EINTMASK); s3c_irq_unmask((irqno <= (IRQ_EINT7 - EXTINT_OFF)) ? IRQ_EINT4t7 : IRQ_EINT8t23); } @@ -275,28 +271,28 @@ s3c_irqext_type(unsigned int irq, unsigned int type) if ((irq >= IRQ_EINT0) && (irq <= IRQ_EINT3)) { gpcon_reg = S3C2410_GPFCON; - extint_reg = S3C2410_EXTINT0; + extint_reg = S3C24XX_EXTINT0; gpcon_offset = (irq - IRQ_EINT0) * 2; extint_offset = (irq - IRQ_EINT0) * 4; } else if ((irq >= IRQ_EINT4) && (irq <= IRQ_EINT7)) { gpcon_reg = S3C2410_GPFCON; - extint_reg = S3C2410_EXTINT0; + extint_reg = S3C24XX_EXTINT0; gpcon_offset = (irq - (EXTINT_OFF)) * 2; extint_offset = (irq - (EXTINT_OFF)) * 4; } else if ((irq >= IRQ_EINT8) && (irq <= IRQ_EINT15)) { gpcon_reg = S3C2410_GPGCON; - extint_reg = S3C2410_EXTINT1; + extint_reg = S3C24XX_EXTINT1; gpcon_offset = (irq - IRQ_EINT8) * 2; extint_offset = (irq - IRQ_EINT8) * 4; } else if ((irq >= IRQ_EINT16) && (irq <= IRQ_EINT23)) { gpcon_reg = S3C2410_GPGCON; - extint_reg = S3C2410_EXTINT2; + extint_reg = S3C24XX_EXTINT2; gpcon_offset = (irq - IRQ_EINT8) * 2; extint_offset = (irq - IRQ_EINT16) * 4; } else @@ -572,6 +568,23 @@ s3c_irq_demux_uart2(unsigned int irq, s3c_irq_demux_uart(IRQ_S3CUART_RX2, regs); } +static void +s3c_irq_demux_extint(unsigned int irq, + struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned long eintpnd = __raw_readl(S3C24XX_EINTPEND); + unsigned long eintmsk = __raw_readl(S3C24XX_EINTMASK); + + eintpnd &= ~eintmsk; + + if (eintpnd) { + irq = fls(eintpnd); + irq += (IRQ_EINT4 - (4 + 1)); + + desc_handle_irq(irq, irq_desc + irq, regs); + } +} /* s3c24xx_init_irq * @@ -591,12 +604,12 @@ void __init s3c24xx_init_irq(void) last = 0; for (i = 0; i < 4; i++) { - pend = __raw_readl(S3C2410_EINTPEND); + pend = __raw_readl(S3C24XX_EINTPEND); if (pend == 0 || pend == last) break; - __raw_writel(pend, S3C2410_EINTPEND); + __raw_writel(pend, S3C24XX_EINTPEND); printk("irq: clearing pending ext status %08x\n", (int)pend); last = pend; } @@ -630,12 +643,14 @@ void __init s3c24xx_init_irq(void) irqdbf("s3c2410_init_irq: registering s3c2410 interrupt handlers\n"); - for (irqno = IRQ_BATT_FLT; irqno <= IRQ_ADCPARENT; irqno++) { + for (irqno = IRQ_EINT4t7; irqno <= IRQ_ADCPARENT; irqno++) { /* set all the s3c2410 internal irqs */ switch (irqno) { /* deal with the special IRQs (cascaded) */ + case IRQ_EINT4t7: + case IRQ_EINT8t23: case IRQ_UART0: case IRQ_UART1: case IRQ_UART2: @@ -659,12 +674,14 @@ void __init s3c24xx_init_irq(void) /* setup the cascade irq handlers */ + set_irq_chained_handler(IRQ_EINT4t7, s3c_irq_demux_extint); + set_irq_chained_handler(IRQ_EINT8t23, s3c_irq_demux_extint); + set_irq_chained_handler(IRQ_UART0, s3c_irq_demux_uart0); set_irq_chained_handler(IRQ_UART1, s3c_irq_demux_uart1); set_irq_chained_handler(IRQ_UART2, s3c_irq_demux_uart2); set_irq_chained_handler(IRQ_ADCPARENT, s3c_irq_demux_adc); - /* external interrupts */ for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) { diff --git a/arch/arm/mach-s3c2410/mach-anubis.c b/arch/arm/mach-s3c2410/mach-anubis.c index cc97fbf6629..4a92d6f92d6 100644 --- a/arch/arm/mach-s3c2410/mach-anubis.c +++ b/arch/arm/mach-s3c2410/mach-anubis.c @@ -131,7 +131,7 @@ static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = { }; -static struct s3c2410_uartcfg anubis_uartcfgs[] = { +static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, @@ -239,6 +239,54 @@ static struct s3c2410_platform_nand anubis_nand_info = { .select_chip = anubis_nand_select, }; +/* IDE channels */ + +static struct resource anubis_ide0_resource[] = { + { + .start = S3C2410_CS3, + .end = S3C2410_CS3 + (8*32) - 1, + .flags = IORESOURCE_MEM, + }, { + .start = S3C2410_CS3 + (1<<26), + .end = S3C2410_CS3 + (1<<26) + (8*32) - 1, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_IDE0, + .end = IRQ_IDE0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device anubis_device_ide0 = { + .name = "simtec-ide", + .id = 0, + .num_resources = ARRAY_SIZE(anubis_ide0_resource), + .resource = anubis_ide0_resource, +}; + +static struct resource anubis_ide1_resource[] = { + { + .start = S3C2410_CS4, + .end = S3C2410_CS4 + (8*32) - 1, + .flags = IORESOURCE_MEM, + }, { + .start = S3C2410_CS4 + (1<<26), + .end = S3C2410_CS4 + (1<<26) + (8*32) - 1, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_IDE0, + .end = IRQ_IDE0, + .flags = IORESOURCE_IRQ, + }, +}; + + +static struct platform_device anubis_device_ide1 = { + .name = "simtec-ide", + .id = 1, + .num_resources = ARRAY_SIZE(anubis_ide1_resource), + .resource = anubis_ide1_resource, +}; /* Standard Anubis devices */ @@ -249,6 +297,8 @@ static struct platform_device *anubis_devices[] __initdata = { &s3c_device_i2c, &s3c_device_rtc, &s3c_device_nand, + &anubis_device_ide0, + &anubis_device_ide1, }; static struct clk *anubis_clocks[] = { diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 995bb8add33..947234df816 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -208,7 +208,7 @@ static struct s3c24xx_uart_clksrc bast_serial_clocks[] = { }; -static struct s3c2410_uartcfg bast_uartcfgs[] = { +static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 646a3a5d33a..aec431b2830 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -72,7 +72,7 @@ static struct map_desc h1940_iodesc[] __initdata = { #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE -static struct s3c2410_uartcfg h1940_uartcfgs[] = { +static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, diff --git a/arch/arm/mach-s3c2410/mach-nexcoder.c b/arch/arm/mach-s3c2410/mach-nexcoder.c index 07d09509a62..065a1d4e860 100644 --- a/arch/arm/mach-s3c2410/mach-nexcoder.c +++ b/arch/arm/mach-s3c2410/mach-nexcoder.c @@ -51,7 +51,7 @@ static struct map_desc nexcoder_iodesc[] __initdata = { #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE -static struct s3c2410_uartcfg nexcoder_uartcfgs[] = { +static struct s3c2410_uartcfg nexcoder_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, diff --git a/arch/arm/mach-s3c2410/mach-osiris.c b/arch/arm/mach-s3c2410/mach-osiris.c index ae078755775..858fd03c6bc 100644 --- a/arch/arm/mach-s3c2410/mach-osiris.c +++ b/arch/arm/mach-s3c2410/mach-osiris.c @@ -95,8 +95,7 @@ static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = { } }; - -static struct s3c2410_uartcfg osiris_uartcfgs[] = { +static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, @@ -107,7 +106,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] = { .clocks_size = ARRAY_SIZE(osiris_serial_clocks) }, [1] = { - .hwport = 2, + .hwport = 1, .flags = 0, .ucon = UCON, .ulcon = ULCON, diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c index b39daedf93c..c71673fd995 100644 --- a/arch/arm/mach-s3c2410/mach-otom.c +++ b/arch/arm/mach-s3c2410/mach-otom.c @@ -45,7 +45,7 @@ static struct map_desc otom11_iodesc[] __initdata = { #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE -static struct s3c2410_uartcfg otom11_uartcfgs[] = { +static struct s3c2410_uartcfg otom11_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c index 2db932d72c5..25f7e9f4dce 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2410.c +++ b/arch/arm/mach-s3c2410/mach-smdk2410.c @@ -65,7 +65,7 @@ static struct map_desc smdk2410_iodesc[] __initdata = { #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE -static struct s3c2410_uartcfg smdk2410_uartcfgs[] = { +static struct s3c2410_uartcfg smdk2410_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, diff --git a/arch/arm/mach-s3c2410/mach-smdk2413.c b/arch/arm/mach-s3c2410/mach-smdk2413.c new file mode 100644 index 00000000000..b7ef7d3c54a --- /dev/null +++ b/arch/arm/mach-s3c2410/mach-smdk2413.c @@ -0,0 +1,126 @@ +/* linux/arch/arm/mach-s3c2410/mach-smdk2413.c + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Thanks to Dimity Andric (TomTom) and Steven Ryu (Samsung) for the + * loans of SMDK2413 to work with. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/timer.h> +#include <linux/init.h> +#include <linux/platform_device.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/hardware.h> +#include <asm/hardware/iomd.h> +#include <asm/setup.h> +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/mach-types.h> + +//#include <asm/debug-ll.h> +#include <asm/arch/regs-serial.h> +#include <asm/arch/regs-gpio.h> +#include <asm/arch/regs-lcd.h> + +#include <asm/arch/idle.h> +#include <asm/arch/fb.h> + +#include "s3c2410.h" +#include "s3c2412.h" +#include "clock.h" +#include "devs.h" +#include "cpu.h" + +#include "common-smdk.h" + +static struct map_desc smdk2413_iodesc[] __initdata = { +}; + +static struct s3c2410_uartcfg smdk2413_uartcfgs[] __initdata = { + [0] = { + .hwport = 0, + .flags = 0, + .ucon = 0x3c5, + .ulcon = 0x03, + .ufcon = 0x51, + }, + [1] = { + .hwport = 1, + .flags = 0, + .ucon = 0x3c5, + .ulcon = 0x03, + .ufcon = 0x51, + }, + /* IR port */ + [2] = { + .hwport = 2, + .flags = 0, + .ucon = 0x3c5, + .ulcon = 0x43, + .ufcon = 0x51, + } +}; + +static struct platform_device *smdk2413_devices[] __initdata = { + &s3c_device_usb, + //&s3c_device_lcd, + &s3c_device_wdt, + &s3c_device_i2c, + &s3c_device_iis, +}; + +static struct s3c24xx_board smdk2413_board __initdata = { + .devices = smdk2413_devices, + .devices_count = ARRAY_SIZE(smdk2413_devices) +}; + +static void __init smdk2413_fixup(struct machine_desc *desc, + struct tag *tags, char **cmdline, + struct meminfo *mi) +{ + if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) { + mi->nr_banks=1; + mi->bank[0].start = 0x30000000; + mi->bank[0].size = SZ_64M; + mi->bank[0].node = 0; + } +} + +static void __init smdk2413_map_io(void) +{ + s3c24xx_init_io(smdk2413_iodesc, ARRAY_SIZE(smdk2413_iodesc)); + s3c24xx_init_clocks(12000000); + s3c24xx_init_uarts(smdk2413_uartcfgs, ARRAY_SIZE(smdk2413_uartcfgs)); + s3c24xx_set_board(&smdk2413_board); +} + +static void __init smdk2413_machine_init(void) +{ + smdk_machine_init(); +} + +MACHINE_START(S3C2413, "SMDK2413") + /* Maintainer: Ben Dooks <ben@fluff.org> */ + .phys_io = S3C2410_PA_UART, + .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, + .boot_params = S3C2410_SDRAM_PA + 0x100, + + .fixup = smdk2413_fixup, + .init_irq = s3c24xx_init_irq, + .map_io = smdk2413_map_io, + .init_machine = smdk2413_machine_init, + .timer = &s3c24xx_timer, +MACHINE_END diff --git a/arch/arm/mach-s3c2410/mach-smdk2440.c b/arch/arm/mach-s3c2410/mach-smdk2440.c index 5fffd1d5104..d661c6b7ff5 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2440.c +++ b/arch/arm/mach-s3c2410/mach-smdk2440.c @@ -86,7 +86,7 @@ static struct map_desc smdk2440_iodesc[] __initdata = { #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE -static struct s3c2410_uartcfg smdk2440_uartcfgs[] = { +static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index 785fc9cdcf7..d18efb279d3 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c @@ -166,7 +166,7 @@ static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = { } }; -static struct s3c2410_uartcfg vr1000_uartcfgs[] = { +static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, diff --git a/arch/arm/mach-s3c2410/pm-simtec.c b/arch/arm/mach-s3c2410/pm-simtec.c index 4c7ccef6c20..7b244566a43 100644 --- a/arch/arm/mach-s3c2410/pm-simtec.c +++ b/arch/arm/mach-s3c2410/pm-simtec.c @@ -48,7 +48,8 @@ static __init int pm_simtec_init(void) /* check which machine we are running on */ - if (!machine_is_bast() && !machine_is_vr1000() && !machine_is_anubis()) + if (!machine_is_bast() && !machine_is_vr1000() && + !machine_is_anubis() && !machine_is_osiris()) return 0; printk(KERN_INFO "Simtec Board Power Manangement" COPYRIGHT "\n"); diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c index fe57d966a34..a589fe76d91 100644 --- a/arch/arm/mach-s3c2410/pm.c +++ b/arch/arm/mach-s3c2410/pm.c @@ -29,7 +29,6 @@ * 10-Mar-2005 LCVR Changed S3C2410_VA_UART to S3C24XX_VA_UART */ -#include <linux/config.h> #include <linux/init.h> #include <linux/suspend.h> #include <linux/errno.h> @@ -58,7 +57,11 @@ unsigned long s3c_pm_flags; /* cache functions from arch/arm/mm/proc-arm920.S */ +#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH extern void arm920_flush_kern_cache_all(void); +#else +static void arm920_flush_kern_cache_all(void) { } +#endif #define PFX "s3c24xx-pm: " diff --git a/arch/arm/mach-s3c2410/s3c2410-clock.c b/arch/arm/mach-s3c2410/s3c2410-clock.c new file mode 100644 index 00000000000..99718663318 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2410-clock.c @@ -0,0 +1,271 @@ +/* linux/arch/arm/mach-s3c2410/clock.c + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C2410,S3C2440,S3C2442 Clock control support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/sysdev.h> +#include <linux/clk.h> +#include <linux/mutex.h> +#include <linux/delay.h> + +#include <asm/hardware.h> +#include <asm/io.h> + +#include <asm/arch/regs-clock.h> +#include <asm/arch/regs-gpio.h> + +#include "clock.h" +#include "cpu.h" + +int s3c2410_clkcon_enable(struct clk *clk, int enable) +{ + unsigned int clocks = clk->ctrlbit; + unsigned long clkcon; + + clkcon = __raw_readl(S3C2410_CLKCON); + + if (enable) + clkcon |= clocks; + else + clkcon &= ~clocks; + + /* ensure none of the special function bits set */ + clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER); + + __raw_writel(clkcon, S3C2410_CLKCON); + + return 0; +} + +static int s3c2410_upll_enable(struct clk *clk, int enable) +{ + unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); + unsigned long orig = clkslow; + + if (enable) + clkslow &= ~S3C2410_CLKSLOW_UCLK_OFF; + else + clkslow |= S3C2410_CLKSLOW_UCLK_OFF; + + __raw_writel(clkslow, S3C2410_CLKSLOW); + + /* if we started the UPLL, then allow to settle */ + + if (enable && (orig & S3C2410_CLKSLOW_UCLK_OFF)) + udelay(200); + + return 0; +} + +/* standard clock definitions */ + +static struct clk init_clocks_disable[] = { + { + .name = "nand", + .id = -1, + .parent = &clk_h, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_NAND, + }, { + .name = "sdi", + .id = -1, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_SDI, + }, { + .name = "adc", + .id = -1, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_ADC, + }, { + .name = "i2c", + .id = -1, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_IIC, + }, { + .name = "iis", + .id = -1, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_IIS, + }, { + .name = "spi", + .id = -1, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_SPI, + } +}; + +static struct clk init_clocks[] = { + { + .name = "lcd", + .id = -1, + .parent = &clk_h, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_LCDC, + }, { + .name = "gpio", + .id = -1, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_GPIO, + }, { + .name = "usb-host", + .id = -1, + .parent = &clk_h, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_USBH, + }, { + .name = "usb-device", + .id = -1, + .parent = &clk_h, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_USBD, + }, { + .name = "timers", + .id = -1, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_PWMT, + }, { + .name = "uart", + .id = 0, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_UART0, + }, { + .name = "uart", + .id = 1, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_UART1, + }, { + .name = "uart", + .id = 2, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_UART2, + }, { + .name = "rtc", + .id = -1, + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_RTC, + }, { + .name = "watchdog", + .id = -1, + .parent = &clk_p, + .ctrlbit = 0, + }, { + .name = "usb-bus-host", + .id = -1, + .parent = &clk_usb_bus, + }, { + .name = "usb-bus-gadget", + .id = -1, + .parent = &clk_usb_bus, + }, +}; + +/* s3c2410_baseclk_add() + * + * Add all the clocks used by the s3c2410 or compatible CPUs + * such as the S3C2440 and S3C2442. + * + * We cannot use a system device as we are needed before any + * of the init-calls that initialise the devices are actually + * done. +*/ + +int __init s3c2410_baseclk_add(void) +{ + unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); + unsigned long clkcon = __raw_readl(S3C2410_CLKCON); + struct clk *clkp; + struct clk *xtal; + int ret; + int ptr; + + clk_upll.enable = s3c2410_upll_enable; + + if (s3c24xx_register_clock(&clk_usb_bus) < 0) + printk(KERN_ERR "failed to register usb bus clock\n"); + + /* register clocks from clock array */ + + clkp = init_clocks; + for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { + /* ensure that we note the clock state */ + + clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0; + + ret = s3c24xx_register_clock(clkp); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + clkp->name, ret); + } + } + + /* We must be careful disabling the clocks we are not intending to + * be using at boot time, as subsytems such as the LCD which do + * their own DMA requests to the bus can cause the system to lockup + * if they where in the middle of requesting bus access. + * + * Disabling the LCD clock if the LCD is active is very dangerous, + * and therefore the bootloader should be careful to not enable + * the LCD clock if it is not needed. + */ + + /* install (and disable) the clocks we do not need immediately */ + + clkp = init_clocks_disable; + for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { + + ret = s3c24xx_register_clock(clkp); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + clkp->name, ret); + } + + s3c2410_clkcon_enable(clkp, 0); + } + + /* show the clock-slow value */ + + xtal = clk_get(NULL, "xtal"); + + printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n", + print_mhz(clk_get_rate(xtal) / + ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))), + (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast", + (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on", + (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on"); + + return 0; +} diff --git a/arch/arm/mach-s3c2410/s3c2410-gpio.c b/arch/arm/mach-s3c2410/s3c2410-gpio.c index d5e1caea1d2..471a7149001 100644 --- a/arch/arm/mach-s3c2410/s3c2410-gpio.c +++ b/arch/arm/mach-s3c2410/s3c2410-gpio.c @@ -18,9 +18,6 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * Changelog - * 15-Jan-2006 LCVR Splitted from gpio.c */ #include <linux/kernel.h> @@ -38,7 +35,7 @@ int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, unsigned int config) { - void __iomem *reg = S3C2410_EINFLT0; + void __iomem *reg = S3C24XX_EINFLT0; unsigned long flags; unsigned long val; @@ -47,7 +44,7 @@ int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, config &= 0xff; - pin -= S3C2410_GPG8_EINT16; + pin -= S3C2410_GPG8; reg += pin & ~3; local_irq_save(flags); @@ -61,10 +58,10 @@ int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, /* update filter enable */ - val = __raw_readl(S3C2410_EXTINT2); + val = __raw_readl(S3C24XX_EXTINT2); val &= ~(1 << ((pin * 4) + 3)); val |= on << ((pin * 4) + 3); - __raw_writel(val, S3C2410_EXTINT2); + __raw_writel(val, S3C24XX_EXTINT2); local_irq_restore(flags); @@ -75,7 +72,7 @@ EXPORT_SYMBOL(s3c2410_gpio_irqfilter); int s3c2410_gpio_getirq(unsigned int pin) { - if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15_EINT23) + if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15) return -1; /* not valid interrupts */ if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7) diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index 0a2013a7654..a110cff9cf6 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c @@ -27,6 +27,7 @@ #include <linux/list.h> #include <linux/timer.h> #include <linux/init.h> +#include <linux/sysdev.h> #include <linux/platform_device.h> #include <asm/mach/arch.h> @@ -42,6 +43,7 @@ #include "s3c2410.h" #include "cpu.h" +#include "devs.h" #include "clock.h" /* Initial IO mappings */ @@ -55,93 +57,13 @@ static struct map_desc s3c2410_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), }; -static struct resource s3c_uart0_resource[] = { - [0] = { - .start = S3C2410_PA_UART0, - .end = S3C2410_PA_UART0 + 0x3fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_S3CUART_RX0, - .end = IRQ_S3CUART_ERR0, - .flags = IORESOURCE_IRQ, - } - -}; - -static struct resource s3c_uart1_resource[] = { - [0] = { - .start = S3C2410_PA_UART1, - .end = S3C2410_PA_UART1 + 0x3fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_S3CUART_RX1, - .end = IRQ_S3CUART_ERR1, - .flags = IORESOURCE_IRQ, - } -}; - -static struct resource s3c_uart2_resource[] = { - [0] = { - .start = S3C2410_PA_UART2, - .end = S3C2410_PA_UART2 + 0x3fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_S3CUART_RX2, - .end = IRQ_S3CUART_ERR2, - .flags = IORESOURCE_IRQ, - } -}; - /* our uart devices */ -static struct platform_device s3c_uart0 = { - .name = "s3c2410-uart", - .id = 0, - .num_resources = ARRAY_SIZE(s3c_uart0_resource), - .resource = s3c_uart0_resource, -}; - - -static struct platform_device s3c_uart1 = { - .name = "s3c2410-uart", - .id = 1, - .num_resources = ARRAY_SIZE(s3c_uart1_resource), - .resource = s3c_uart1_resource, -}; - -static struct platform_device s3c_uart2 = { - .name = "s3c2410-uart", - .id = 2, - .num_resources = ARRAY_SIZE(s3c_uart2_resource), - .resource = s3c_uart2_resource, -}; - -static struct platform_device *uart_devices[] __initdata = { - &s3c_uart0, - &s3c_uart1, - &s3c_uart2 -}; - -static int s3c2410_uart_count = 0; - /* uart registration process */ void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no) { - struct platform_device *platdev; - int uart; - - for (uart = 0; uart < no; uart++, cfg++) { - platdev = uart_devices[cfg->hwport]; - - s3c24xx_uart_devs[uart] = platdev; - platdev->dev.platform_data = cfg; - } - - s3c2410_uart_count = uart; + s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no); } /* s3c2410_map_io @@ -187,11 +109,33 @@ void __init s3c2410_init_clocks(int xtal) */ s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); + s3c2410_baseclk_add(); } +struct sysdev_class s3c2410_sysclass = { + set_kset_name("s3c2410-core"), +}; + +static struct sys_device s3c2410_sysdev = { + .cls = &s3c2410_sysclass, +}; + +/* need to register class before we actually register the device, and + * we also need to ensure that it has been initialised before any of the + * drivers even try to use it (even if not on an s3c2440 based system) + * as a driver which may support both 2410 and 2440 may try and use it. +*/ + +static int __init s3c2410_core_init(void) +{ + return sysdev_class_register(&s3c2410_sysclass); +} + +core_initcall(s3c2410_core_init); + int __init s3c2410_init(void) { printk("S3C2410: Initialising architecture\n"); - return platform_add_devices(s3c24xx_uart_devs, s3c2410_uart_count); + return sysdev_register(&s3c2410_sysdev); } diff --git a/arch/arm/mach-s3c2410/s3c2410.h b/arch/arm/mach-s3c2410/s3c2410.h index 4d5312a4820..73f1a2474a6 100644 --- a/arch/arm/mach-s3c2410/s3c2410.h +++ b/arch/arm/mach-s3c2410/s3c2410.h @@ -29,6 +29,8 @@ extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no); extern void s3c2410_init_clocks(int xtal); +extern int s3c2410_baseclk_add(void); + #else #define s3c2410_init_clocks NULL #define s3c2410_init_uarts NULL diff --git a/arch/arm/mach-s3c2410/s3c2412-clock.c b/arch/arm/mach-s3c2410/s3c2412-clock.c new file mode 100644 index 00000000000..c95ed3e1858 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2412-clock.c @@ -0,0 +1,711 @@ +/* linux/arch/arm/mach-s3c2410/s3c2412-clock.c + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C2412,S3C2413 Clock control support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/sysdev.h> +#include <linux/clk.h> +#include <linux/mutex.h> +#include <linux/delay.h> + +#include <asm/hardware.h> +#include <asm/io.h> + +#include <asm/arch/regs-clock.h> +#include <asm/arch/regs-gpio.h> + +#include "clock.h" +#include "cpu.h" + +/* We currently have to assume that the system is running + * from the XTPll input, and that all ***REFCLKs are being + * fed from it, as we cannot read the state of OM[4] from + * software. + * + * It would be possible for each board initialisation to + * set the correct muxing at initialisation +*/ + +int s3c2412_clkcon_enable(struct clk *clk, int enable) +{ + unsigned int clocks = clk->ctrlbit; + unsigned long clkcon; + + clkcon = __raw_readl(S3C2410_CLKCON); + + if (enable) + clkcon |= clocks; + else + clkcon &= ~clocks; + + __raw_writel(clkcon, S3C2410_CLKCON); + + return 0; +} + +static int s3c2412_upll_enable(struct clk *clk, int enable) +{ + unsigned long upllcon = __raw_readl(S3C2410_UPLLCON); + unsigned long orig = upllcon; + + if (!enable) + upllcon |= S3C2412_PLLCON_OFF; + else + upllcon &= ~S3C2412_PLLCON_OFF; + + __raw_writel(upllcon, S3C2410_UPLLCON); + + /* allow ~150uS for the PLL to settle and lock */ + + if (enable && (orig & S3C2412_PLLCON_OFF)) + udelay(150); + + return 0; +} + +/* clock selections */ + +/* CPU EXTCLK input */ +static struct clk clk_ext = { + .name = "extclk", + .id = -1, +}; + +static struct clk clk_erefclk = { + .name = "erefclk", + .id = -1, +}; + +static struct clk clk_urefclk = { + .name = "urefclk", + .id = -1, +}; + +static int s3c2412_setparent_usysclk(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_urefclk) + clksrc &= ~S3C2412_CLKSRC_USYSCLK_UPLL; + else if (parent == &clk_upll) + clksrc |= S3C2412_CLKSRC_USYSCLK_UPLL; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} + +static struct clk clk_usysclk = { + .name = "usysclk", + .id = -1, + .parent = &clk_xtal, + .set_parent = s3c2412_setparent_usysclk, +}; + +static struct clk clk_mrefclk = { + .name = "mrefclk", + .parent = &clk_xtal, + .id = -1, +}; + +static struct clk clk_mdivclk = { + .name = "mdivclk", + .parent = &clk_xtal, + .id = -1, +}; + +static int s3c2412_setparent_usbsrc(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_usysclk) + clksrc &= ~S3C2412_CLKSRC_USBCLK_HCLK; + else if (parent == &clk_h) + clksrc |= S3C2412_CLKSRC_USBCLK_HCLK; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} + +static unsigned long s3c2412_roundrate_usbsrc(struct clk *clk, + unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + int div; + + if (rate > parent_rate) + return parent_rate; + + div = parent_rate / rate; + if (div > 2) + div = 2; + + return parent_rate / div; +} + +static unsigned long s3c2412_getrate_usbsrc(struct clk *clk) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long div = __raw_readl(S3C2410_CLKDIVN); + + return parent_rate / ((div & S3C2412_CLKDIVN_USB48DIV) ? 2 : 1); +} + +static int s3c2412_setrate_usbsrc(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN); + + rate = s3c2412_roundrate_usbsrc(clk, rate); + + if ((parent_rate / rate) == 2) + clkdivn |= S3C2412_CLKDIVN_USB48DIV; + else + clkdivn &= ~S3C2412_CLKDIVN_USB48DIV; + + __raw_writel(clkdivn, S3C2410_CLKDIVN); + return 0; +} + +static struct clk clk_usbsrc = { + .name = "usbsrc", + .id = -1, + .get_rate = s3c2412_getrate_usbsrc, + .set_rate = s3c2412_setrate_usbsrc, + .round_rate = s3c2412_roundrate_usbsrc, + .set_parent = s3c2412_setparent_usbsrc, +}; + +static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_mdivclk) + clksrc &= ~S3C2412_CLKSRC_MSYSCLK_MPLL; + else if (parent == &clk_upll) + clksrc |= S3C2412_CLKSRC_MSYSCLK_MPLL; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} + +static struct clk clk_msysclk = { + .name = "msysclk", + .id = -1, + .set_parent = s3c2412_setparent_msysclk, +}; + +/* these next clocks have an divider immediately after them, + * so we can register them with their divider and leave out the + * intermediate clock stage +*/ +static unsigned long s3c2412_roundrate_clksrc(struct clk *clk, + unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + int div; + + if (rate > parent_rate) + return parent_rate; + + /* note, we remove the +/- 1 calculations as they cancel out */ + + div = (rate / parent_rate); + + if (div < 1) + div = 1; + else if (div > 16) + div = 16; + + return parent_rate / div; +} + +static int s3c2412_setparent_uart(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_erefclk) + clksrc &= ~S3C2412_CLKSRC_UARTCLK_MPLL; + else if (parent == &clk_mpll) + clksrc |= S3C2412_CLKSRC_UARTCLK_MPLL; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} + +static unsigned long s3c2412_getrate_uart(struct clk *clk) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long div = __raw_readl(S3C2410_CLKDIVN); + + div &= S3C2412_CLKDIVN_UARTDIV_MASK; + div >>= S3C2412_CLKDIVN_UARTDIV_SHIFT; + + return parent_rate / (div + 1); +} + +static int s3c2412_setrate_uart(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN); + + rate = s3c2412_roundrate_clksrc(clk, rate); + + clkdivn &= ~S3C2412_CLKDIVN_UARTDIV_MASK; + clkdivn |= ((parent_rate / rate) - 1) << S3C2412_CLKDIVN_UARTDIV_SHIFT; + + __raw_writel(clkdivn, S3C2410_CLKDIVN); + return 0; +} + +static struct clk clk_uart = { + .name = "uartclk", + .id = -1, + .get_rate = s3c2412_getrate_uart, + .set_rate = s3c2412_setrate_uart, + .set_parent = s3c2412_setparent_uart, + .round_rate = s3c2412_roundrate_clksrc, +}; + +static int s3c2412_setparent_i2s(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_erefclk) + clksrc &= ~S3C2412_CLKSRC_I2SCLK_MPLL; + else if (parent == &clk_mpll) + clksrc |= S3C2412_CLKSRC_I2SCLK_MPLL; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} + +static unsigned long s3c2412_getrate_i2s(struct clk *clk) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long div = __raw_readl(S3C2410_CLKDIVN); + + div &= S3C2412_CLKDIVN_I2SDIV_MASK; + div >>= S3C2412_CLKDIVN_I2SDIV_SHIFT; + + return parent_rate / (div + 1); +} + +static int s3c2412_setrate_i2s(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN); + + rate = s3c2412_roundrate_clksrc(clk, rate); + + clkdivn &= ~S3C2412_CLKDIVN_I2SDIV_MASK; + clkdivn |= ((parent_rate / rate) - 1) << S3C2412_CLKDIVN_I2SDIV_SHIFT; + + __raw_writel(clkdivn, S3C2410_CLKDIVN); + return 0; +} + +static struct clk clk_i2s = { + .name = "i2sclk", + .id = -1, + .get_rate = s3c2412_getrate_i2s, + .set_rate = s3c2412_setrate_i2s, + .set_parent = s3c2412_setparent_i2s, + .round_rate = s3c2412_roundrate_clksrc, +}; + +static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_usysclk) + clksrc &= ~S3C2412_CLKSRC_CAMCLK_HCLK; + else if (parent == &clk_h) + clksrc |= S3C2412_CLKSRC_CAMCLK_HCLK; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} +static unsigned long s3c2412_getrate_cam(struct clk *clk) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long div = __raw_readl(S3C2410_CLKDIVN); + + div &= S3C2412_CLKDIVN_CAMDIV_MASK; + div >>= S3C2412_CLKDIVN_CAMDIV_SHIFT; + + return parent_rate / (div + 1); +} + +static int s3c2412_setrate_cam(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN); + + rate = s3c2412_roundrate_clksrc(clk, rate); + + clkdivn &= ~S3C2412_CLKDIVN_CAMDIV_MASK; + clkdivn |= ((parent_rate / rate) - 1) << S3C2412_CLKDIVN_CAMDIV_SHIFT; + + __raw_writel(clkdivn, S3C2410_CLKDIVN); + return 0; +} + +static struct clk clk_cam = { + .name = "camif-upll", /* same as 2440 name */ + .id = -1, + .get_rate = s3c2412_getrate_cam, + .set_rate = s3c2412_setrate_cam, + .set_parent = s3c2412_setparent_cam, + .round_rate = s3c2412_roundrate_clksrc, +}; + +/* standard clock definitions */ + +static struct clk init_clocks_disable[] = { + { + .name = "nand", + .id = -1, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_NAND, + }, { + .name = "sdi", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_SDI, + }, { + .name = "adc", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_ADC, + }, { + .name = "i2c", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_IIC, + }, { + .name = "iis", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_IIS, + }, { + .name = "spi", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_SPI, + } +}; + +static struct clk init_clocks[] = { + { + .name = "dma", + .id = 0, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_DMA0, + }, { + .name = "dma", + .id = 1, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_DMA1, + }, { + .name = "dma", + .id = 2, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_DMA2, + }, { + .name = "dma", + .id = 3, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_DMA3, + }, { + .name = "lcd", + .id = -1, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_LCDC, + }, { + .name = "gpio", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_GPIO, + }, { + .name = "usb-host", + .id = -1, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_USBH, + }, { + .name = "usb-device", + .id = -1, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_USBD, + }, { + .name = "timers", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_PWMT, + }, { + .name = "uart", + .id = 0, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_UART0, + }, { + .name = "uart", + .id = 1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_UART1, + }, { + .name = "uart", + .id = 2, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_UART2, + }, { + .name = "rtc", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_RTC, + }, { + .name = "watchdog", + .id = -1, + .parent = &clk_p, + .ctrlbit = 0, + }, { + .name = "usb-bus-gadget", + .id = -1, + .parent = &clk_usb_bus, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_USB_DEV48, + }, { + .name = "usb-bus-host", + .id = -1, + .parent = &clk_usb_bus, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_USB_HOST48, + } +}; + +/* clocks to add where we need to check their parentage */ + +struct clk_init { + struct clk *clk; + unsigned int bit; + struct clk *src_0; + struct clk *src_1; +}; + +struct clk_init clks_src[] __initdata = { + { + .clk = &clk_usysclk, + .bit = S3C2412_CLKSRC_USBCLK_HCLK, + .src_0 = &clk_urefclk, + .src_1 = &clk_upll, + }, { + .clk = &clk_i2s, + .bit = S3C2412_CLKSRC_I2SCLK_MPLL, + .src_0 = &clk_erefclk, + .src_1 = &clk_mpll, + }, { + .clk = &clk_cam, + .bit = S3C2412_CLKSRC_CAMCLK_HCLK, + .src_0 = &clk_usysclk, + .src_1 = &clk_h, + }, { + .clk = &clk_msysclk, + .bit = S3C2412_CLKSRC_MSYSCLK_MPLL, + .src_0 = &clk_mdivclk, + .src_1 = &clk_mpll, + }, { + .clk = &clk_uart, + .bit = S3C2412_CLKSRC_UARTCLK_MPLL, + .src_0 = &clk_erefclk, + .src_1 = &clk_mpll, + }, { + .clk = &clk_usbsrc, + .bit = S3C2412_CLKSRC_USBCLK_HCLK, + .src_0 = &clk_usysclk, + .src_1 = &clk_h, + }, +}; + +/* s3c2412_clk_initparents + * + * Initialise the parents for the clocks that we get at start-time +*/ + +static void __init s3c2412_clk_initparents(void) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + struct clk_init *cip = clks_src; + struct clk *src; + int ptr; + int ret; + + for (ptr = 0; ptr < ARRAY_SIZE(clks_src); ptr++, cip++) { + ret = s3c24xx_register_clock(cip->clk); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + cip->clk->name, ret); + } + + src = (clksrc & cip->bit) ? cip->src_1 : cip->src_0; + + printk(KERN_INFO "%s: parent %s\n", cip->clk->name, src->name); + clk_set_parent(cip->clk, src); + } +} + +/* clocks to add straight away */ + +struct clk *clks[] __initdata = { + &clk_ext, + &clk_usb_bus, + &clk_erefclk, + &clk_urefclk, + &clk_mrefclk, +}; + +int __init s3c2412_baseclk_add(void) +{ + unsigned long clkcon = __raw_readl(S3C2410_CLKCON); + struct clk *clkp; + int ret; + int ptr; + + clk_upll.enable = s3c2412_upll_enable; + clk_usb_bus.parent = &clk_usbsrc; + clk_usb_bus.rate = 0x0; + + s3c2412_clk_initparents(); + + for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { + clkp = clks[ptr]; + + ret = s3c24xx_register_clock(clkp); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + clkp->name, ret); + } + } + + /* ensure usb bus clock is within correct rate of 48MHz */ + + if (clk_get_rate(&clk_usb_bus) != (48 * 1000 * 1000)) { + printk(KERN_INFO "Warning: USB bus clock not at 48MHz\n"); + + /* for the moment, let's use the UPLL, and see if we can + * get 48MHz */ + + clk_set_parent(&clk_usysclk, &clk_upll); + clk_set_parent(&clk_usbsrc, &clk_usysclk); + clk_set_rate(&clk_usbsrc, 48*1000*1000); + } + + printk("S3C2412: upll %s, %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n", + (__raw_readl(S3C2410_UPLLCON) & S3C2412_PLLCON_OFF) ? "off":"on", + print_mhz(clk_get_rate(&clk_upll)), + print_mhz(clk_get_rate(&clk_usb_bus))); + + /* register clocks from clock array */ + + clkp = init_clocks; + for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { + /* ensure that we note the clock state */ + + clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0; + + ret = s3c24xx_register_clock(clkp); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + clkp->name, ret); + } + } + + /* We must be careful disabling the clocks we are not intending to + * be using at boot time, as subsytems such as the LCD which do + * their own DMA requests to the bus can cause the system to lockup + * if they where in the middle of requesting bus access. + * + * Disabling the LCD clock if the LCD is active is very dangerous, + * and therefore the bootloader should be careful to not enable + * the LCD clock if it is not needed. + */ + + /* install (and disable) the clocks we do not need immediately */ + + clkp = init_clocks_disable; + for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { + + ret = s3c24xx_register_clock(clkp); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + clkp->name, ret); + } + + s3c2412_clkcon_enable(clkp, 0); + } + + return 0; +} diff --git a/arch/arm/mach-s3c2410/s3c2412.c b/arch/arm/mach-s3c2410/s3c2412.c new file mode 100644 index 00000000000..e24ffd5e478 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2412.c @@ -0,0 +1,195 @@ +/* linux/arch/arm/mach-s3c2410/s3c2412.c + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * http://armlinux.simtec.co.uk/. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Modifications: + * 16-May-2003 BJD Created initial version + * 16-Aug-2003 BJD Fixed header files and copyright, added URL + * 05-Sep-2003 BJD Moved to kernel v2.6 + * 18-Jan-2004 BJD Added serial port configuration + * 21-Aug-2004 BJD Added new struct s3c2410_board handler + * 28-Sep-2004 BJD Updates for new serial port bits + * 04-Nov-2004 BJD Updated UART configuration process + * 10-Jan-2005 BJD Removed s3c2410_clock_tick_rate + * 13-Aug-2005 DA Removed UART from initial I/O mappings +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/timer.h> +#include <linux/init.h> +#include <linux/sysdev.h> +#include <linux/platform_device.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/irq.h> + +#include <asm/arch/regs-clock.h> +#include <asm/arch/regs-serial.h> +#include <asm/arch/regs-gpio.h> +#include <asm/arch/regs-gpioj.h> +#include <asm/arch/regs-dsc.h> + +#include "s3c2412.h" +#include "cpu.h" +#include "devs.h" +#include "clock.h" +#include "pm.h" + +#ifndef CONFIG_CPU_S3C2412_ONLY +void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; +#endif + +/* Initial IO mappings */ + +static struct map_desc s3c2412_iodesc[] __initdata = { + IODESC_ENT(CLKPWR), + IODESC_ENT(LCD), + IODESC_ENT(TIMER), + IODESC_ENT(ADC), + IODESC_ENT(WATCHDOG), +}; + +/* uart registration process */ + +void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no); + + /* rename devices that are s3c2412/s3c2413 specific */ + s3c_device_sdi.name = "s3c2412-sdi"; + s3c_device_nand.name = "s3c2412-nand"; +} + +/* s3c2412_map_io + * + * register the standard cpu IO areas, and any passed in from the + * machine specific initialisation. +*/ + +void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size) +{ + /* move base of IO */ + + s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10; + + /* register our io-tables */ + + iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); + iotable_init(mach_desc, mach_size); +} + +void __init s3c2412_init_clocks(int xtal) +{ + unsigned long tmp; + unsigned long fclk; + unsigned long hclk; + unsigned long pclk; + + /* now we've got our machine bits initialised, work out what + * clocks we've got */ + + fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); + + tmp = __raw_readl(S3C2410_CLKDIVN); + + /* work out clock scalings */ + + hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1); + hclk /= ((tmp & S3C2421_CLKDIVN_ARMDIVN) ? 2 : 1); + pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1); + + /* print brieft summary of clocks, etc */ + + printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", + print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); + + /* initialise the clocks here, to allow other things like the + * console to use them + */ + + s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); + s3c2412_baseclk_add(); +} + +/* need to register class before we actually register the device, and + * we also need to ensure that it has been initialised before any of the + * drivers even try to use it (even if not on an s3c2412 based system) + * as a driver which may support both 2410 and 2440 may try and use it. +*/ + +#ifdef CONFIG_PM +static struct sleep_save s3c2412_sleep[] = { + SAVE_ITEM(S3C2412_DSC0), + SAVE_ITEM(S3C2412_DSC1), + SAVE_ITEM(S3C2413_GPJDAT), + SAVE_ITEM(S3C2413_GPJCON), + SAVE_ITEM(S3C2413_GPJUP), + + /* save the sleep configuration anyway, just in case these + * get damaged during wakeup */ + + SAVE_ITEM(S3C2412_GPBSLPCON), + SAVE_ITEM(S3C2412_GPCSLPCON), + SAVE_ITEM(S3C2412_GPDSLPCON), + SAVE_ITEM(S3C2412_GPESLPCON), + SAVE_ITEM(S3C2412_GPFSLPCON), + SAVE_ITEM(S3C2412_GPGSLPCON), + SAVE_ITEM(S3C2412_GPHSLPCON), + SAVE_ITEM(S3C2413_GPJSLPCON), +}; + +static int s3c2412_suspend(struct sys_device *dev, pm_message_t state) +{ + s3c2410_pm_do_save(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep)); + return 0; +} + +static int s3c2412_resume(struct sys_device *dev) +{ + s3c2410_pm_do_restore(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep)); + return 0; +} + +#else +#define s3c2412_suspend NULL +#define s3c2412_resume NULL +#endif + +struct sysdev_class s3c2412_sysclass = { + set_kset_name("s3c2412-core"), + .suspend = s3c2412_suspend, + .resume = s3c2412_resume +}; + +static int __init s3c2412_core_init(void) +{ + return sysdev_class_register(&s3c2412_sysclass); +} + +core_initcall(s3c2412_core_init); + +static struct sys_device s3c2412_sysdev = { + .cls = &s3c2412_sysclass, +}; + +int __init s3c2412_init(void) +{ + printk("S3C2412: Initialising architecture\n"); + + return sysdev_register(&s3c2412_sysdev); +} diff --git a/arch/arm/mach-s3c2410/s3c2412.h b/arch/arm/mach-s3c2410/s3c2412.h new file mode 100644 index 00000000000..c6e56032a6e --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2412.h @@ -0,0 +1,29 @@ +/* arch/arm/mach-s3c2410/s3c2412.h + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for s3c2412 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifdef CONFIG_CPU_S3C2412 + +extern int s3c2412_init(void); + +extern void s3c2412_map_io(struct map_desc *mach_desc, int size); + +extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +extern void s3c2412_init_clocks(int xtal); + +extern int s3c2412_baseclk_add(void); +#else +#define s3c2412_init_clocks NULL +#define s3c2412_init_uarts NULL +#define s3c2412_map_io NULL +#define s3c2412_init NULL +#endif diff --git a/arch/arm/mach-s3c2410/s3c2440-clock.c b/arch/arm/mach-s3c2410/s3c2440-clock.c index d7a30ed6c32..15796864d01 100644 --- a/arch/arm/mach-s3c2410/s3c2440-clock.c +++ b/arch/arm/mach-s3c2410/s3c2440-clock.c @@ -91,7 +91,7 @@ static int s3c2440_camif_upll_setrate(struct clk *clk, unsigned long rate) static struct clk s3c2440_clk_cam = { .name = "camif", .id = -1, - .enable = s3c24xx_clkcon_enable, + .enable = s3c2410_clkcon_enable, .ctrlbit = S3C2440_CLKCON_CAMERA, }; @@ -105,7 +105,7 @@ static struct clk s3c2440_clk_cam_upll = { static struct clk s3c2440_clk_ac97 = { .name = "ac97", .id = -1, - .enable = s3c24xx_clkcon_enable, + .enable = s3c2410_clkcon_enable, .ctrlbit = S3C2440_CLKCON_CAMERA, }; diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c index 278d0044c85..acfe3870727 100644 --- a/arch/arm/mach-s3c2410/s3c2440-irq.c +++ b/arch/arm/mach-s3c2410/s3c2440-irq.c @@ -100,73 +100,12 @@ static struct irqchip s3c_irq_wdtac97 = { .ack = s3c_irq_wdtac97_ack, }; -/* camera irq */ - -static void s3c_irq_demux_cam(unsigned int irq, - struct irqdesc *desc, - struct pt_regs *regs) -{ - unsigned int subsrc, submsk; - struct irqdesc *mydesc; - - /* read the current pending interrupts, and the mask - * for what it is available */ - - subsrc = __raw_readl(S3C2410_SUBSRCPND); - submsk = __raw_readl(S3C2410_INTSUBMSK); - - subsrc &= ~submsk; - subsrc >>= 11; - subsrc &= 3; - - if (subsrc != 0) { - if (subsrc & 1) { - mydesc = irq_desc + IRQ_S3C2440_CAM_C; - desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs); - } - if (subsrc & 2) { - mydesc = irq_desc + IRQ_S3C2440_CAM_P; - desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs); - } - } -} - -#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0)) - -static void -s3c_irq_cam_mask(unsigned int irqno) -{ - s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11); -} - -static void -s3c_irq_cam_unmask(unsigned int irqno) -{ - s3c_irqsub_unmask(irqno, INTMSK_CAM); -} - -static void -s3c_irq_cam_ack(unsigned int irqno) -{ - s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11); -} - -static struct irqchip s3c_irq_cam = { - .mask = s3c_irq_cam_mask, - .unmask = s3c_irq_cam_unmask, - .ack = s3c_irq_cam_ack, -}; - static int s3c2440_irq_add(struct sys_device *sysdev) { unsigned int irqno; printk("S3C2440: IRQ Support\n"); - set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip); - set_irq_handler(IRQ_NFCON, do_level_IRQ); - set_irq_flags(IRQ_NFCON, IRQF_VALID); - /* add new chained handler for wdt, ac7 */ set_irq_chip(IRQ_WDT, &s3c_irq_level_chip); @@ -179,18 +118,6 @@ static int s3c2440_irq_add(struct sys_device *sysdev) set_irq_flags(irqno, IRQF_VALID); } - /* add chained handler for camera */ - - set_irq_chip(IRQ_CAM, &s3c_irq_level_chip); - set_irq_handler(IRQ_CAM, do_level_IRQ); - set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam); - - for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) { - set_irq_chip(irqno, &s3c_irq_cam); - set_irq_handler(irqno, do_level_IRQ); - set_irq_flags(irqno, IRQF_VALID); - } - return 0; } @@ -198,10 +125,10 @@ static struct sysdev_driver s3c2440_irq_driver = { .add = s3c2440_irq_add, }; -static int s3c24xx_irq_driver(void) +static int s3c2440_irq_init(void) { return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver); } -arch_initcall(s3c24xx_irq_driver); +arch_initcall(s3c2440_irq_init); diff --git a/arch/arm/mach-s3c2410/s3c2440.c b/arch/arm/mach-s3c2410/s3c2440.c index b7fe6d9453f..0ab50f44f31 100644 --- a/arch/arm/mach-s3c2410/s3c2440.c +++ b/arch/arm/mach-s3c2410/s3c2440.c @@ -1,6 +1,6 @@ /* linux/arch/arm/mach-s3c2410/s3c2440.c * - * Copyright (c) 2004-2005 Simtec Electronics + * Copyright (c) 2004-2006 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * * Samsung S3C2440 Mobile CPU support @@ -8,16 +8,6 @@ * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. - * - * Modifications: - * 24-Aug-2004 BJD Start of s3c2440 support - * 12-Oct-2004 BJD Moved clock info out to clock.c - * 01-Nov-2004 BJD Fixed clock build code - * 09-Nov-2004 BJD Added sysdev for power management - * 04-Nov-2004 BJD New serial registration - * 15-Nov-2004 BJD Rename the i2c device for the s3c2440 - * 14-Jan-2005 BJD Moved clock init code into seperate function - * 14-Jan-2005 BJD Removed un-used clock bits */ #include <linux/kernel.h> @@ -50,234 +40,20 @@ #include "cpu.h" #include "pm.h" - -static struct map_desc s3c2440_iodesc[] __initdata = { - IODESC_ENT(USBHOST), - IODESC_ENT(CLKPWR), - IODESC_ENT(LCD), - IODESC_ENT(TIMER), - IODESC_ENT(ADC), - IODESC_ENT(WATCHDOG), -}; - -static struct resource s3c_uart0_resource[] = { - [0] = { - .start = S3C2410_PA_UART0, - .end = S3C2410_PA_UART0 + 0x3fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_S3CUART_RX0, - .end = IRQ_S3CUART_ERR0, - .flags = IORESOURCE_IRQ, - } - -}; - -static struct resource s3c_uart1_resource[] = { - [0] = { - .start = S3C2410_PA_UART1, - .end = S3C2410_PA_UART1 + 0x3fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_S3CUART_RX1, - .end = IRQ_S3CUART_ERR1, - .flags = IORESOURCE_IRQ, - } -}; - -static struct resource s3c_uart2_resource[] = { - [0] = { - .start = S3C2410_PA_UART2, - .end = S3C2410_PA_UART2 + 0x3fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_S3CUART_RX2, - .end = IRQ_S3CUART_ERR2, - .flags = IORESOURCE_IRQ, - } -}; - -/* our uart devices */ - -static struct platform_device s3c_uart0 = { - .name = "s3c2440-uart", - .id = 0, - .num_resources = ARRAY_SIZE(s3c_uart0_resource), - .resource = s3c_uart0_resource, -}; - -static struct platform_device s3c_uart1 = { - .name = "s3c2440-uart", - .id = 1, - .num_resources = ARRAY_SIZE(s3c_uart1_resource), - .resource = s3c_uart1_resource, -}; - -static struct platform_device s3c_uart2 = { - .name = "s3c2440-uart", - .id = 2, - .num_resources = ARRAY_SIZE(s3c_uart2_resource), - .resource = s3c_uart2_resource, -}; - -static struct platform_device *uart_devices[] __initdata = { - &s3c_uart0, - &s3c_uart1, - &s3c_uart2 -}; - -/* uart initialisation */ - -static int __initdata s3c2440_uart_count; - -void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - struct platform_device *platdev; - int uart; - - for (uart = 0; uart < no; uart++, cfg++) { - platdev = uart_devices[cfg->hwport]; - - s3c24xx_uart_devs[uart] = platdev; - platdev->dev.platform_data = cfg; - } - - s3c2440_uart_count = uart; -} - - -#ifdef CONFIG_PM - -static struct sleep_save s3c2440_sleep[] = { - SAVE_ITEM(S3C2440_DSC0), - SAVE_ITEM(S3C2440_DSC1), - SAVE_ITEM(S3C2440_GPJDAT), - SAVE_ITEM(S3C2440_GPJCON), - SAVE_ITEM(S3C2440_GPJUP) -}; - -static int s3c2440_suspend(struct sys_device *dev, pm_message_t state) -{ - s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep)); - return 0; -} - -static int s3c2440_resume(struct sys_device *dev) -{ - s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep)); - return 0; -} - -#else -#define s3c2440_suspend NULL -#define s3c2440_resume NULL -#endif - -struct sysdev_class s3c2440_sysclass = { - set_kset_name("s3c2440-core"), - .suspend = s3c2440_suspend, - .resume = s3c2440_resume -}; - static struct sys_device s3c2440_sysdev = { .cls = &s3c2440_sysclass, }; -void __init s3c2440_map_io(struct map_desc *mach_desc, int size) +int __init s3c2440_init(void) { - /* register our io-tables */ - - iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc)); - iotable_init(mach_desc, size); - - /* rename any peripherals used differing from the s3c2410 */ - - s3c_device_i2c.name = "s3c2440-i2c"; - s3c_device_nand.name = "s3c2440-nand"; + printk("S3C2440: Initialising architecture\n"); /* change irq for watchdog */ s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT; -} - -void __init s3c2440_init_clocks(int xtal) -{ - unsigned long clkdiv; - unsigned long camdiv; - unsigned long hclk, fclk, pclk; - int hdiv = 1; - - /* now we've got our machine bits initialised, work out what - * clocks we've got */ - - fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2; - - clkdiv = __raw_readl(S3C2410_CLKDIVN); - camdiv = __raw_readl(S3C2440_CAMDIVN); - - /* work out clock scalings */ - - switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) { - case S3C2440_CLKDIVN_HDIVN_1: - hdiv = 1; - break; - - case S3C2440_CLKDIVN_HDIVN_2: - hdiv = 2; - break; - - case S3C2440_CLKDIVN_HDIVN_4_8: - hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4; - break; - - case S3C2440_CLKDIVN_HDIVN_3_6: - hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3; - break; - } - - hclk = fclk / hdiv; - pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1); - - /* print brief summary of clocks, etc */ - - printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", - print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); - - /* initialise the clocks here, to allow other things like the - * console to use them, and to add new ones after the initialisation - */ - - s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); -} - -/* need to register class before we actually register the device, and - * we also need to ensure that it has been initialised before any of the - * drivers even try to use it (even if not on an s3c2440 based system) - * as a driver which may support both 2410 and 2440 may try and use it. -*/ - -static int __init s3c2440_core_init(void) -{ - return sysdev_class_register(&s3c2440_sysclass); -} - -core_initcall(s3c2440_core_init); - -int __init s3c2440_init(void) -{ - int ret; - - printk("S3C2440: Initialising architecture\n"); - ret = sysdev_register(&s3c2440_sysdev); - if (ret != 0) - printk(KERN_ERR "failed to register sysdev for s3c2440\n"); - else - ret = platform_add_devices(s3c24xx_uart_devs, s3c2440_uart_count); + /* register our system device for everything else */ - return ret; + return sysdev_register(&s3c2440_sysdev); } diff --git a/arch/arm/mach-s3c2410/s3c2442-clock.c b/arch/arm/mach-s3c2410/s3c2442-clock.c new file mode 100644 index 00000000000..d9f54b5cab7 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2442-clock.c @@ -0,0 +1,171 @@ +/* linux/arch/arm/mach-s3c2410/s3c2442-clock.c + * + * Copyright (c) 2004-2005 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C2442 Clock support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/device.h> +#include <linux/sysdev.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/mutex.h> +#include <linux/clk.h> + +#include <asm/hardware.h> +#include <asm/atomic.h> +#include <asm/irq.h> +#include <asm/io.h> + +#include <asm/arch/regs-clock.h> + +#include "clock.h" +#include "cpu.h" + +/* S3C2442 extended clock support */ + +static unsigned long s3c2442_camif_upll_round(struct clk *clk, + unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + int div; + + if (rate > parent_rate) + return parent_rate; + + div = parent_rate / rate; + + if (div == 3) + return parent_rate / 3; + + /* note, we remove the +/- 1 calculations for the divisor */ + + div /= 2; + + if (div < 1) + div = 1; + else if (div > 16) + div = 16; + + return parent_rate / (div * 2); +} + +static int s3c2442_camif_upll_setrate(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); + + rate = s3c2442_camif_upll_round(clk, rate); + + camdivn &= ~S3C2442_CAMDIVN_CAMCLK_DIV3; + + if (rate == parent_rate) { + camdivn &= ~S3C2440_CAMDIVN_CAMCLK_SEL; + } else if ((parent_rate / rate) == 3) { + camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL; + camdivn |= S3C2442_CAMDIVN_CAMCLK_DIV3; + } else { + camdivn &= ~S3C2440_CAMDIVN_CAMCLK_MASK; + camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL; + camdivn |= (((parent_rate / rate) / 2) - 1); + } + + __raw_writel(camdivn, S3C2440_CAMDIVN); + + return 0; +} + +/* Extra S3C2442 clocks */ + +static struct clk s3c2442_clk_cam = { + .name = "camif", + .id = -1, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2440_CLKCON_CAMERA, +}; + +static struct clk s3c2442_clk_cam_upll = { + .name = "camif-upll", + .id = -1, + .set_rate = s3c2442_camif_upll_setrate, + .round_rate = s3c2442_camif_upll_round, +}; + +static int s3c2442_clk_add(struct sys_device *sysdev) +{ + unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); + unsigned long clkdivn; + struct clk *clk_h; + struct clk *clk_p; + struct clk *clk_upll; + + printk("S3C2442: Clock Support, DVS %s\n", + (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); + + clk_p = clk_get(NULL, "pclk"); + clk_h = clk_get(NULL, "hclk"); + clk_upll = clk_get(NULL, "upll"); + + if (IS_ERR(clk_p) || IS_ERR(clk_h) || IS_ERR(clk_upll)) { + printk(KERN_ERR "S3C2442: Failed to get parent clocks\n"); + return -EINVAL; + } + + /* check rate of UPLL, and if it is near 96MHz, then change + * to using half the UPLL rate for the system */ + + if (clk_get_rate(clk_upll) > (94 * MHZ)) { + clk_usb_bus.rate = clk_get_rate(clk_upll) / 2; + + mutex_lock(&clocks_mutex); + + clkdivn = __raw_readl(S3C2410_CLKDIVN); + clkdivn |= S3C2440_CLKDIVN_UCLK; + __raw_writel(clkdivn, S3C2410_CLKDIVN); + + mutex_unlock(&clocks_mutex); + } + + s3c2442_clk_cam.parent = clk_h; + s3c2442_clk_cam_upll.parent = clk_upll; + + s3c24xx_register_clock(&s3c2442_clk_cam); + s3c24xx_register_clock(&s3c2442_clk_cam_upll); + + clk_disable(&s3c2442_clk_cam); + + return 0; +} + +static struct sysdev_driver s3c2442_clk_driver = { + .add = s3c2442_clk_add, +}; + +static __init int s3c2442_clk_init(void) +{ + return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver); +} + +arch_initcall(s3c2442_clk_init); diff --git a/arch/arm/mach-s3c2410/s3c2442.c b/arch/arm/mach-s3c2410/s3c2442.c new file mode 100644 index 00000000000..debae243055 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2442.c @@ -0,0 +1,52 @@ +/* linux/arch/arm/mach-s3c2410/s3c2440.c + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Samsung S3C2442 Mobile CPU support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/timer.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/sysdev.h> +#include <linux/clk.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/irq.h> + +#include <asm/arch/regs-clock.h> +#include <asm/arch/regs-serial.h> +#include <asm/arch/regs-gpio.h> +#include <asm/arch/regs-gpioj.h> +#include <asm/arch/regs-dsc.h> + +#include "s3c2442.h" +#include "clock.h" +#include "devs.h" +#include "cpu.h" +#include "pm.h" + +static struct sys_device s3c2442_sysdev = { + .cls = &s3c2442_sysclass, +}; + +int __init s3c2442_init(void) +{ + printk("S3C2442: Initialising architecture\n"); + + return sysdev_register(&s3c2442_sysdev); +} diff --git a/arch/arm/mach-s3c2410/s3c2442.h b/arch/arm/mach-s3c2410/s3c2442.h new file mode 100644 index 00000000000..0ae37d24866 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2442.h @@ -0,0 +1,17 @@ +/* arch/arm/mach-s3c2410/s3c2442.h + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for s3c2442 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifdef CONFIG_CPU_S3C2442 +extern int s3c2442_init(void); +#else +#define s3c2442_init NULL +#endif diff --git a/arch/arm/mach-s3c2410/s3c244x-irq.c b/arch/arm/mach-s3c2410/s3c244x-irq.c new file mode 100644 index 00000000000..2aadca1ce7e --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c244x-irq.c @@ -0,0 +1,142 @@ +/* linux/arch/arm/mach-s3c2410/s3c2440-irq.c + * + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Changelog: + * 25-Jul-2005 BJD Split from irq.c + * +*/ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/ptrace.h> +#include <linux/sysdev.h> + +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/io.h> + +#include <asm/mach/irq.h> + +#include <asm/arch/regs-irq.h> +#include <asm/arch/regs-gpio.h> + +#include "cpu.h" +#include "pm.h" +#include "irq.h" + +/* camera irq */ + +static void s3c_irq_demux_cam(unsigned int irq, + struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int subsrc, submsk; + struct irqdesc *mydesc; + + /* read the current pending interrupts, and the mask + * for what it is available */ + + subsrc = __raw_readl(S3C2410_SUBSRCPND); + submsk = __raw_readl(S3C2410_INTSUBMSK); + + subsrc &= ~submsk; + subsrc >>= 11; + subsrc &= 3; + + if (subsrc != 0) { + if (subsrc & 1) { + mydesc = irq_desc + IRQ_S3C2440_CAM_C; + desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs); + } + if (subsrc & 2) { + mydesc = irq_desc + IRQ_S3C2440_CAM_P; + desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs); + } + } +} + +#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0)) + +static void +s3c_irq_cam_mask(unsigned int irqno) +{ + s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11); +} + +static void +s3c_irq_cam_unmask(unsigned int irqno) +{ + s3c_irqsub_unmask(irqno, INTMSK_CAM); +} + +static void +s3c_irq_cam_ack(unsigned int irqno) +{ + s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11); +} + +static struct irqchip s3c_irq_cam = { + .mask = s3c_irq_cam_mask, + .unmask = s3c_irq_cam_unmask, + .ack = s3c_irq_cam_ack, +}; + +static int s3c244x_irq_add(struct sys_device *sysdev) +{ + unsigned int irqno; + + set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip); + set_irq_handler(IRQ_NFCON, do_level_IRQ); + set_irq_flags(IRQ_NFCON, IRQF_VALID); + + /* add chained handler for camera */ + + set_irq_chip(IRQ_CAM, &s3c_irq_level_chip); + set_irq_handler(IRQ_CAM, do_level_IRQ); + set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam); + + for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) { + set_irq_chip(irqno, &s3c_irq_cam); + set_irq_handler(irqno, do_level_IRQ); + set_irq_flags(irqno, IRQF_VALID); + } + + return 0; +} + +static struct sysdev_driver s3c244x_irq_driver = { + .add = s3c244x_irq_add, +}; + +static int s3c2440_irq_init(void) +{ + return sysdev_driver_register(&s3c2440_sysclass, &s3c244x_irq_driver); +} + +arch_initcall(s3c2440_irq_init); + + +static int s3c2442_irq_init(void) +{ + return sysdev_driver_register(&s3c2442_sysclass, &s3c244x_irq_driver); +} + +arch_initcall(s3c2442_irq_init); diff --git a/arch/arm/mach-s3c2410/s3c244x.c b/arch/arm/mach-s3c2410/s3c244x.c new file mode 100644 index 00000000000..9a2258270de --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c244x.c @@ -0,0 +1,185 @@ +/* linux/arch/arm/mach-s3c2410/s3c244x.c + * + * Copyright (c) 2004-2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Samsung S3C2440 and S3C2442 Mobile CPU support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/timer.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/sysdev.h> +#include <linux/clk.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/irq.h> + +#include <asm/arch/regs-clock.h> +#include <asm/arch/regs-serial.h> +#include <asm/arch/regs-gpio.h> +#include <asm/arch/regs-gpioj.h> +#include <asm/arch/regs-dsc.h> + +#include "s3c2410.h" +#include "s3c2440.h" +#include "s3c244x.h" +#include "clock.h" +#include "devs.h" +#include "cpu.h" +#include "pm.h" + +static struct map_desc s3c244x_iodesc[] __initdata = { + IODESC_ENT(CLKPWR), + IODESC_ENT(TIMER), + IODESC_ENT(WATCHDOG), + IODESC_ENT(LCD), + IODESC_ENT(ADC), + IODESC_ENT(USBHOST), +}; + +/* uart initialisation */ + +void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); +} + +void __init s3c244x_map_io(struct map_desc *mach_desc, int size) +{ + /* register our io-tables */ + + iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc)); + iotable_init(mach_desc, size); + + /* rename any peripherals used differing from the s3c2410 */ + + s3c_device_i2c.name = "s3c2440-i2c"; + s3c_device_nand.name = "s3c2440-nand"; + s3c_device_usbgadget.name = "s3c2440-usbgadget"; +} + +void __init s3c244x_init_clocks(int xtal) +{ + unsigned long clkdiv; + unsigned long camdiv; + unsigned long hclk, fclk, pclk; + int hdiv = 1; + + /* now we've got our machine bits initialised, work out what + * clocks we've got */ + + fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2; + + clkdiv = __raw_readl(S3C2410_CLKDIVN); + camdiv = __raw_readl(S3C2440_CAMDIVN); + + /* work out clock scalings */ + + switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) { + case S3C2440_CLKDIVN_HDIVN_1: + hdiv = 1; + break; + + case S3C2440_CLKDIVN_HDIVN_2: + hdiv = 2; + break; + + case S3C2440_CLKDIVN_HDIVN_4_8: + hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4; + break; + + case S3C2440_CLKDIVN_HDIVN_3_6: + hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3; + break; + } + + hclk = fclk / hdiv; + pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1); + + /* print brief summary of clocks, etc */ + + printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", + print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); + + /* initialise the clocks here, to allow other things like the + * console to use them, and to add new ones after the initialisation + */ + + s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); + s3c2410_baseclk_add(); +} + +#ifdef CONFIG_PM + +static struct sleep_save s3c244x_sleep[] = { + SAVE_ITEM(S3C2440_DSC0), + SAVE_ITEM(S3C2440_DSC1), + SAVE_ITEM(S3C2440_GPJDAT), + SAVE_ITEM(S3C2440_GPJCON), + SAVE_ITEM(S3C2440_GPJUP) +}; + +static int s3c244x_suspend(struct sys_device *dev, pm_message_t state) +{ + s3c2410_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); + return 0; +} + +static int s3c244x_resume(struct sys_device *dev) +{ + s3c2410_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); + return 0; +} + +#else +#define s3c244x_suspend NULL +#define s3c244x_resume NULL +#endif + +/* Since the S3C2442 and S3C2440 share items, put both sysclasses here */ + +struct sysdev_class s3c2440_sysclass = { + set_kset_name("s3c2440-core"), + .suspend = s3c244x_suspend, + .resume = s3c244x_resume +}; + +struct sysdev_class s3c2442_sysclass = { + set_kset_name("s3c2442-core"), + .suspend = s3c244x_suspend, + .resume = s3c244x_resume +}; + +/* need to register class before we actually register the device, and + * we also need to ensure that it has been initialised before any of the + * drivers even try to use it (even if not on an s3c2440 based system) + * as a driver which may support both 2410 and 2440 may try and use it. +*/ + +static int __init s3c2440_core_init(void) +{ + return sysdev_class_register(&s3c2440_sysclass); +} + +core_initcall(s3c2440_core_init); + +static int __init s3c2442_core_init(void) +{ + return sysdev_class_register(&s3c2442_sysclass); +} + +core_initcall(s3c2442_core_init); diff --git a/arch/arm/mach-s3c2410/s3c244x.h b/arch/arm/mach-s3c2410/s3c244x.h new file mode 100644 index 00000000000..3e7f5f75134 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c244x.h @@ -0,0 +1,25 @@ +/* arch/arm/mach-s3c2410/s3c2440.h + * + * Copyright (c) 2004-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for S3C2440 and S3C2442 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) + +extern void s3c244x_map_io(struct map_desc *mach_desc, int size); + +extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +extern void s3c244x_init_clocks(int xtal); + +#else +#define s3c244x_init_clocks NULL +#define s3c244x_init_uarts NULL +#define s3c244x_map_io NULL +#endif diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S index 73de2eaca22..a7561a79fc8 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c2410/sleep.S @@ -24,7 +24,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/hardware.h> @@ -66,7 +65,9 @@ ENTRY(s3c2410_cpu_suspend) @@ flush the caches to ensure everything is back out to @@ SDRAM before the core powers down +#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH bl arm920_flush_kern_cache_all +#endif @@ prepare cpu to sleep @@ -126,7 +127,7 @@ s3c2410_sleep_save_phys: */ ENTRY(s3c2410_cpu_resume) - mov r0, #PSR_I_BIT | PSR_F_BIT | MODE_SVC + mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE msr cpsr_c, r0 @@ load UART to allow us to print the two characters for diff --git a/arch/arm/mach-s3c2410/time.c b/arch/arm/mach-s3c2410/time.c index 9d7b799ea4a..00d1cfca971 100644 --- a/arch/arm/mach-s3c2410/time.c +++ b/arch/arm/mach-s3c2410/time.c @@ -18,11 +18,11 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/sched.h> #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/err.h> #include <linux/clk.h> @@ -138,7 +138,7 @@ s3c2410_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction s3c2410_timer_irq = { .name = "S3C2410 Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = s3c2410_timer_interrupt, }; diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c index 495f8c6ffcb..6b22d8f0a00 100644 --- a/arch/arm/mach-s3c2410/usb-simtec.c +++ b/arch/arm/mach-s3c2410/usb-simtec.c @@ -85,8 +85,8 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on) if (on) { ret = request_irq(IRQ_USBOC, usb_simtec_ocirq, - SA_INTERRUPT | SA_TRIGGER_RISING | - SA_TRIGGER_FALLING, + IRQF_DISABLED | IRQF_TRIGGER_RISING | + IRQF_TRIGGER_FALLING, "USB Over-current", info); if (ret != 0) { printk(KERN_ERR "failed to request usb oc irq\n"); diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index c58f12ba7a9..be06d668a3c 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -9,7 +9,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c index 8269a9ef9af..31afe50d7cd 100644 --- a/arch/arm/mach-sa1100/cerf.c +++ b/arch/arm/mach-sa1100/cerf.c @@ -10,11 +10,11 @@ * Jan-2004 : Removed io map for flash [FB] */ -#include <linux/config.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/tty.h> #include <linux/platform_device.h> +#include <linux/irq.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index 676b5c5b75b..a6bab50dab6 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c @@ -17,7 +17,6 @@ * 04-16-2001 Lineo Japan,Inc. ... */ -#include <linux/config.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/tty.h> diff --git a/arch/arm/mach-sa1100/collie_pm.c b/arch/arm/mach-sa1100/collie_pm.c index 696d7d29c8a..45b1e71f111 100644 --- a/arch/arm/mach-sa1100/collie_pm.c +++ b/arch/arm/mach-sa1100/collie_pm.c @@ -45,12 +45,12 @@ static void collie_charger_init(void) } /* Register interrupt handler. */ - if ((err = request_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr, SA_INTERRUPT, + if ((err = request_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr, IRQF_DISABLED, "ACIN", sharpsl_ac_isr))) { printk("Could not get irq %d.\n", COLLIE_IRQ_GPIO_AC_IN); return; } - if ((err = request_irq(COLLIE_IRQ_GPIO_CO, sharpsl_chrg_full_isr, SA_INTERRUPT, + if ((err = request_irq(COLLIE_IRQ_GPIO_CO, sharpsl_chrg_full_isr, IRQF_DISABLED, "CO", sharpsl_chrg_full_isr))) { free_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr); printk("Could not get irq %d.\n", COLLIE_IRQ_GPIO_CO); diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c index 04c94ab6c18..63959772993 100644 --- a/arch/arm/mach-sa1100/cpu-sa1110.c +++ b/arch/arm/mach-sa1100/cpu-sa1110.c @@ -15,7 +15,10 @@ * SDRAM reads (rev A0, B0, B1) * * We ignore rev. A0 and B0 devices; I don't think they're worth supporting. + * + * The SDRAM type can be passed on the command line as cpu_sa1110.sdram=type */ +#include <linux/moduleparam.h> #include <linux/types.h> #include <linux/kernel.h> #include <linux/sched.h> @@ -35,6 +38,7 @@ static struct cpufreq_driver sa1110_driver; struct sdram_params { + const char name[16]; u_char rows; /* bits */ u_char cas_latency; /* cycles */ u_char tck; /* clock cycle time (ns) */ @@ -50,54 +54,53 @@ struct sdram_info { u_int mdcas[3]; }; -static struct sdram_params tc59sm716_cl2_params __initdata = { - .rows = 12, - .tck = 10, - .trcd = 20, - .trp = 20, - .twr = 10, - .refresh = 64000, - .cas_latency = 2, -}; - -static struct sdram_params tc59sm716_cl3_params __initdata = { - .rows = 12, - .tck = 8, - .trcd = 20, - .trp = 20, - .twr = 8, - .refresh = 64000, - .cas_latency = 3, -}; - -static struct sdram_params samsung_k4s641632d_tc75 __initdata = { - .rows = 14, - .tck = 9, - .trcd = 27, - .trp = 20, - .twr = 9, - .refresh = 64000, - .cas_latency = 3, -}; - -static struct sdram_params samsung_km416s4030ct __initdata = { - .rows = 13, - .tck = 8, - .trcd = 24, /* 3 CLKs */ - .trp = 24, /* 3 CLKs */ - .twr = 16, /* Trdl: 2 CLKs */ - .refresh = 64000, - .cas_latency = 3, -}; - -static struct sdram_params wbond_w982516ah75l_cl3_params __initdata = { - .rows = 16, - .tck = 8, - .trcd = 20, - .trp = 20, - .twr = 8, - .refresh = 64000, - .cas_latency = 3, +static struct sdram_params sdram_tbl[] __initdata = { + { /* Toshiba TC59SM716 CL2 */ + .name = "TC59SM716-CL2", + .rows = 12, + .tck = 10, + .trcd = 20, + .trp = 20, + .twr = 10, + .refresh = 64000, + .cas_latency = 2, + }, { /* Toshiba TC59SM716 CL3 */ + .name = "TC59SM716-CL3", + .rows = 12, + .tck = 8, + .trcd = 20, + .trp = 20, + .twr = 8, + .refresh = 64000, + .cas_latency = 3, + }, { /* Samsung K4S641632D TC75 */ + .name = "K4S641632D", + .rows = 14, + .tck = 9, + .trcd = 27, + .trp = 20, + .twr = 9, + .refresh = 64000, + .cas_latency = 3, + }, { /* Samsung KM416S4030CT */ + .name = "KM416S4030CT", + .rows = 13, + .tck = 8, + .trcd = 24, /* 3 CLKs */ + .trp = 24, /* 3 CLKs */ + .twr = 16, /* Trdl: 2 CLKs */ + .refresh = 64000, + .cas_latency = 3, + }, { /* Winbond W982516AH75L CL3 */ + .name = "W982516AH75L", + .rows = 16, + .tck = 8, + .trcd = 20, + .trp = 20, + .twr = 8, + .refresh = 64000, + .cas_latency = 3, + }, }; static struct sdram_params sdram_params; @@ -336,19 +339,36 @@ static struct cpufreq_driver sa1110_driver = { .name = "sa1110", }; +static struct sdram_params *sa1110_find_sdram(const char *name) +{ + struct sdram_params *sdram; + + for (sdram = sdram_tbl; sdram < sdram_tbl + ARRAY_SIZE(sdram_tbl); sdram++) + if (strcmp(name, sdram->name) == 0) + return sdram; + + return NULL; +} + +static char sdram_name[16]; + static int __init sa1110_clk_init(void) { - struct sdram_params *sdram = NULL; + struct sdram_params *sdram; + const char *name = sdram_name; - if (machine_is_assabet()) - sdram = &tc59sm716_cl3_params; + if (!name[0]) { + if (machine_is_assabet()) + name = "TC59SM716-CL3"; - if (machine_is_pt_system3()) - sdram = &samsung_k4s641632d_tc75; + if (machine_is_pt_system3()) + name = "K4S641632D"; - if (machine_is_h3100()) - sdram = &samsung_km416s4030ct; + if (machine_is_h3100()) + name = "KM416S4030CT"; + } + sdram = sa1110_find_sdram(name); if (sdram) { printk(KERN_DEBUG "SDRAM: tck: %d trcd: %d trp: %d" " twr: %d refresh: %d cas_latency: %d\n", @@ -363,4 +383,5 @@ static int __init sa1110_clk_init(void) return 0; } +module_param_string(sdram, sdram_name, sizeof(sdram_name), 0); arch_initcall(sa1110_clk_init); diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c index be0e4427bec..3c6441d4bc5 100644 --- a/arch/arm/mach-sa1100/dma.c +++ b/arch/arm/mach-sa1100/dma.c @@ -124,7 +124,7 @@ int sa1100_request_dma (dma_device_t device, const char *device_id, i = dma - dma_chan; regs = (dma_regs_t *)&DDAR(i); - err = request_irq(IRQ_DMA0 + i, dma_irq_handler, SA_INTERRUPT, + err = request_irq(IRQ_DMA0 + i, dma_irq_handler, IRQF_DISABLED, device_id, regs); if (err) { printk(KERN_ERR diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 9ea71551fc0..4575f316e14 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -9,7 +9,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c index b04d9227102..7364478cec1 100644 --- a/arch/arm/mach-sa1100/h3600.c +++ b/arch/arm/mach-sa1100/h3600.c @@ -19,7 +19,6 @@ * and abstracted EGPIO interface. * */ -#include <linux/config.h> #include <linux/module.h> #include <linux/init.h> #include <linux/kernel.h> @@ -741,7 +740,7 @@ static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc, struct pt_re static struct irqaction h3800_irq = { .name = "h3800_asic", .handler = h3800_IRQ_demux, - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, }; u32 kpio_int_shadow = 0; @@ -836,7 +835,7 @@ static void __init h3800_init_irq(void) } #endif set_irq_type(IRQ_GPIO_H3800_ASIC, IRQT_RISING); - set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, &h3800_IRQ_demux); + set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, h3800_IRQ_demux); } diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index b3a56024182..2891b8ca86d 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c @@ -11,12 +11,13 @@ */ #include <linux/init.h> #include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/ioport.h> #include <linux/ptrace.h> #include <linux/sysdev.h> #include <asm/hardware.h> -#include <asm/irq.h> #include <asm/mach/irq.h> #include "generic.h" diff --git a/arch/arm/mach-sa1100/leds-assabet.c b/arch/arm/mach-sa1100/leds-assabet.c index e9aa9dff211..ee978898987 100644 --- a/arch/arm/mach-sa1100/leds-assabet.c +++ b/arch/arm/mach-sa1100/leds-assabet.c @@ -9,7 +9,6 @@ * - Green - toggles state every 50 timer interrupts * - Red - on if system is not idle */ -#include <linux/config.h> #include <linux/init.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-sa1100/leds-badge4.c b/arch/arm/mach-sa1100/leds-badge4.c index 0a8f87bb6c4..280929be972 100644 --- a/arch/arm/mach-sa1100/leds-badge4.c +++ b/arch/arm/mach-sa1100/leds-badge4.c @@ -10,7 +10,6 @@ * */ -#include <linux/config.h> #include <linux/init.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-sa1100/leds-cerf.c b/arch/arm/mach-sa1100/leds-cerf.c index f6635a2d0e8..f38eeddbef1 100644 --- a/arch/arm/mach-sa1100/leds-cerf.c +++ b/arch/arm/mach-sa1100/leds-cerf.c @@ -3,7 +3,6 @@ * * Author: ??? */ -#include <linux/config.h> #include <linux/init.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-sa1100/leds-hackkit.c b/arch/arm/mach-sa1100/leds-hackkit.c index 2e5fa14aa4e..7e91cc90b5a 100644 --- a/arch/arm/mach-sa1100/leds-hackkit.c +++ b/arch/arm/mach-sa1100/leds-hackkit.c @@ -9,7 +9,6 @@ * The HackKit has two leds (GPIO 22/23). The red led (gpio 22) is used * as cpu led, the green one is used as timer led. */ -#include <linux/config.h> #include <linux/init.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-sa1100/leds-lart.c b/arch/arm/mach-sa1100/leds-lart.c index 18750149071..2d27d76cfc6 100644 --- a/arch/arm/mach-sa1100/leds-lart.c +++ b/arch/arm/mach-sa1100/leds-lart.c @@ -9,7 +9,6 @@ * time, but in that case the timer events will still dictate the * pace of the LED. */ -#include <linux/config.h> #include <linux/init.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-sa1100/leds-simpad.c b/arch/arm/mach-sa1100/leds-simpad.c index 6a27a2d3220..def090a8738 100644 --- a/arch/arm/mach-sa1100/leds-simpad.c +++ b/arch/arm/mach-sa1100/leds-simpad.c @@ -3,7 +3,6 @@ * * Author: Juergen Messerer <juergen.messerer@siemens.ch> */ -#include <linux/config.h> #include <linux/init.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c index 0709ebab531..c7bf7e0038f 100644 --- a/arch/arm/mach-sa1100/pleb.c +++ b/arch/arm/mach-sa1100/pleb.c @@ -7,6 +7,7 @@ #include <linux/tty.h> #include <linux/ioport.h> #include <linux/platform_device.h> +#include <linux/irq.h> #include <linux/mtd/partitions.h> diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c index 5aafe0b5699..8acab7b1e4c 100644 --- a/arch/arm/mach-sa1100/shannon.c +++ b/arch/arm/mach-sa1100/shannon.c @@ -2,7 +2,6 @@ * linux/arch/arm/mach-sa1100/shannon.c */ -#include <linux/config.h> #include <linux/init.h> #include <linux/device.h> #include <linux/kernel.h> diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index d2c23b2c34d..a9ae1b581aa 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -2,7 +2,6 @@ * linux/arch/arm/mach-sa1100/simpad.c */ -#include <linux/config.h> #include <linux/module.h> #include <linux/init.h> #include <linux/kernel.h> diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S index 2fa1e289d17..5a84062f92a 100644 --- a/arch/arm/mach-sa1100/sleep.S +++ b/arch/arm/mach-sa1100/sleep.S @@ -177,7 +177,7 @@ sa1110_sdram_controller_fix: .data .align 5 ENTRY(sa1100_cpu_resume) - mov r0, #PSR_F_BIT | PSR_I_BIT | MODE_SVC + mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE msr cpsr_c, r0 @ set SVC, irqs off ldr r0, sleep_save_sp @ stack phys addr diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index e4b435e634e..49ae716e16c 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c @@ -11,6 +11,7 @@ #include <linux/init.h> #include <linux/errno.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/timex.h> #include <linux/signal.h> @@ -110,7 +111,7 @@ sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction sa1100_timer_irq = { .name = "SA11xx Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = sa1100_timer_interrupt, }; diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index 877600e212d..1095df34fec 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c @@ -6,6 +6,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/sched.h> #include <linux/serial_8250.h> @@ -89,7 +90,7 @@ shark_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction shark_timer_irq = { .name = "Shark Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = shark_timer_interrupt, }; diff --git a/arch/arm/mach-shark/dma.c b/arch/arm/mach-shark/dma.c index 835989a0291..6774b8d5d13 100644 --- a/arch/arm/mach-shark/dma.c +++ b/arch/arm/mach-shark/dma.c @@ -8,7 +8,6 @@ * Copyright (C) 1998 Phil Blundell */ -#include <linux/config.h> #include <linux/init.h> #include <asm/dma.h> diff --git a/arch/arm/mach-shark/leds.c b/arch/arm/mach-shark/leds.c index 7bdeb70a0c1..7cd86d357a3 100644 --- a/arch/arm/mach-shark/leds.c +++ b/arch/arm/mach-shark/leds.c @@ -15,7 +15,6 @@ * * Changelog: */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/init.h> diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index cebd48a3dae..a432539cc1b 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -18,7 +18,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/init.h> #include <linux/device.h> #include <linux/dma-mapping.h> @@ -870,7 +869,7 @@ static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id, struct pt_re static struct irqaction versatile_timer_irq = { .name = "Versatile Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = versatile_timer_interrupt, }; diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c index 722fbabc9cf..41b370090b6 100644 --- a/arch/arm/mach-versatile/pci.c +++ b/arch/arm/mach-versatile/pci.c @@ -14,7 +14,6 @@ * 14/04/2005 Initial version, colin.king@philips.com * */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/pci.h> #include <linux/ptrace.h> diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c index 1eb59678207..b257ef78ef4 100644 --- a/arch/arm/mach-versatile/versatile_ab.c +++ b/arch/arm/mach-versatile/versatile_ab.c @@ -19,7 +19,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/init.h> #include <linux/device.h> #include <linux/sysdev.h> diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index f17ab4fb548..503725b166f 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c @@ -19,7 +19,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/init.h> #include <linux/device.h> #include <linux/sysdev.h> diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index c55b739e10b..5f80f184cd3 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -15,8 +15,8 @@ config CPU_ARM610 select CPU_32v3 select CPU_CACHE_V3 select CPU_CACHE_VIVT - select CPU_COPY_V3 - select CPU_TLB_V3 + select CPU_COPY_V3 if MMU + select CPU_TLB_V3 if MMU help The ARM610 is the successor to the ARM3 processor and was produced by VLSI Technology Inc. @@ -31,8 +31,8 @@ config CPU_ARM710 select CPU_32v3 select CPU_CACHE_V3 select CPU_CACHE_VIVT - select CPU_COPY_V3 - select CPU_TLB_V3 + select CPU_COPY_V3 if MMU + select CPU_TLB_V3 if MMU help A 32-bit RISC microprocessor based on the ARM7 processor core designed by Advanced RISC Machines Ltd. The ARM710 is the @@ -50,8 +50,8 @@ config CPU_ARM720T select CPU_ABRT_LV4T select CPU_CACHE_V4 select CPU_CACHE_VIVT - select CPU_COPY_V4WT - select CPU_TLB_V4WT + select CPU_COPY_V4WT if MMU + select CPU_TLB_V4WT if MMU help A 32-bit RISC processor with 8kByte Cache, Write Buffer and MMU built around an ARM7TDMI core. @@ -61,15 +61,15 @@ config CPU_ARM720T # ARM920T config CPU_ARM920T - bool "Support ARM920T processor" if !ARCH_S3C2410 - depends on ARCH_EP93XX || ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200 - default y if ARCH_S3C2410 || ARCH_AT91RM9200 + bool "Support ARM920T processor" + depends on ARCH_EP93XX || ARCH_INTEGRATOR || CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200 + default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200 select CPU_32v4 select CPU_ABRT_EV4T select CPU_CACHE_V4WT select CPU_CACHE_VIVT - select CPU_COPY_V4WB - select CPU_TLB_V4WBI + select CPU_COPY_V4WB if MMU + select CPU_TLB_V4WBI if MMU help The ARM920T is licensed to be produced by numerous vendors, and is used in the Maverick EP9312 and the Samsung S3C2410. @@ -89,8 +89,8 @@ config CPU_ARM922T select CPU_ABRT_EV4T select CPU_CACHE_V4WT select CPU_CACHE_VIVT - select CPU_COPY_V4WB - select CPU_TLB_V4WBI + select CPU_COPY_V4WB if MMU + select CPU_TLB_V4WBI if MMU help The ARM922T is a version of the ARM920T, but with smaller instruction and data caches. It is used in Altera's @@ -108,8 +108,8 @@ config CPU_ARM925T select CPU_ABRT_EV4T select CPU_CACHE_V4WT select CPU_CACHE_VIVT - select CPU_COPY_V4WB - select CPU_TLB_V4WBI + select CPU_COPY_V4WB if MMU + select CPU_TLB_V4WBI if MMU help The ARM925T is a mix between the ARM920T and ARM926T, but with different instruction and data caches. It is used in TI's OMAP @@ -121,13 +121,13 @@ config CPU_ARM925T # ARM926T config CPU_ARM926T bool "Support ARM926T processor" - depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB - default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX + depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 + default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 select CPU_32v5 select CPU_ABRT_EV5TJ select CPU_CACHE_VIVT - select CPU_COPY_V4WB - select CPU_TLB_V4WBI + select CPU_COPY_V4WB if MMU + select CPU_TLB_V4WBI if MMU help This is a variant of the ARM920. It has slightly different instruction sequences for cache and TLB operations. Curiously, @@ -144,8 +144,8 @@ config CPU_ARM1020 select CPU_ABRT_EV4T select CPU_CACHE_V4WT select CPU_CACHE_VIVT - select CPU_COPY_V4WB - select CPU_TLB_V4WBI + select CPU_COPY_V4WB if MMU + select CPU_TLB_V4WBI if MMU help The ARM1020 is the 32K cached version of the ARM10 processor, with an addition of a floating-point unit. @@ -161,8 +161,8 @@ config CPU_ARM1020E select CPU_ABRT_EV4T select CPU_CACHE_V4WT select CPU_CACHE_VIVT - select CPU_COPY_V4WB - select CPU_TLB_V4WBI + select CPU_COPY_V4WB if MMU + select CPU_TLB_V4WBI if MMU depends on n # ARM1022E @@ -172,8 +172,8 @@ config CPU_ARM1022 select CPU_32v5 select CPU_ABRT_EV4T select CPU_CACHE_VIVT - select CPU_COPY_V4WB # can probably do better - select CPU_TLB_V4WBI + select CPU_COPY_V4WB if MMU # can probably do better + select CPU_TLB_V4WBI if MMU help The ARM1022E is an implementation of the ARMv5TE architecture based upon the ARM10 integer core with a 16KiB L1 Harvard cache, @@ -189,8 +189,8 @@ config CPU_ARM1026 select CPU_32v5 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 select CPU_CACHE_VIVT - select CPU_COPY_V4WB # can probably do better - select CPU_TLB_V4WBI + select CPU_COPY_V4WB if MMU # can probably do better + select CPU_TLB_V4WBI if MMU help The ARM1026EJ-S is an implementation of the ARMv5TEJ architecture based upon the ARM10 integer core. @@ -207,8 +207,8 @@ config CPU_SA110 select CPU_ABRT_EV4 select CPU_CACHE_V4WB select CPU_CACHE_VIVT - select CPU_COPY_V4WB - select CPU_TLB_V4WB + select CPU_COPY_V4WB if MMU + select CPU_TLB_V4WB if MMU help The Intel StrongARM(R) SA-110 is a 32-bit microprocessor and is available at five speeds ranging from 100 MHz to 233 MHz. @@ -227,7 +227,7 @@ config CPU_SA1100 select CPU_ABRT_EV4 select CPU_CACHE_V4WB select CPU_CACHE_VIVT - select CPU_TLB_V4WB + select CPU_TLB_V4WB if MMU # XScale config CPU_XSCALE @@ -237,7 +237,7 @@ config CPU_XSCALE select CPU_32v5 select CPU_ABRT_EV5T select CPU_CACHE_VIVT - select CPU_TLB_V4WBI + select CPU_TLB_V4WBI if MMU # XScale Core Version 3 config CPU_XSC3 @@ -247,7 +247,7 @@ config CPU_XSC3 select CPU_32v5 select CPU_ABRT_EV5T select CPU_CACHE_VIVT - select CPU_TLB_V4WBI + select CPU_TLB_V4WBI if MMU select IO_36 # ARMv6 @@ -258,8 +258,8 @@ config CPU_V6 select CPU_ABRT_EV6 select CPU_CACHE_V6 select CPU_CACHE_VIPT - select CPU_COPY_V6 - select CPU_TLB_V6 + select CPU_COPY_V6 if MMU + select CPU_TLB_V6 if MMU # ARMv6k config CPU_32v6K @@ -277,17 +277,17 @@ config CPU_32v6K # This defines the compiler instruction set which depends on the machine type. config CPU_32v3 bool - select TLS_REG_EMUL if SMP + select TLS_REG_EMUL if SMP || !MMU select NEEDS_SYSCALL_FOR_CMPXCHG if SMP config CPU_32v4 bool - select TLS_REG_EMUL if SMP + select TLS_REG_EMUL if SMP || !MMU select NEEDS_SYSCALL_FOR_CMPXCHG if SMP config CPU_32v5 bool - select TLS_REG_EMUL if SMP + select TLS_REG_EMUL if SMP || !MMU select NEEDS_SYSCALL_FOR_CMPXCHG if SMP config CPU_32v6 @@ -334,6 +334,7 @@ config CPU_CACHE_VIVT config CPU_CACHE_VIPT bool +if MMU # The copy-page model config CPU_COPY_V3 bool @@ -372,6 +373,8 @@ config CPU_TLB_V4WBI config CPU_TLB_V6 bool +endif + # # CPU supports 36-bit I/O # diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 07a53850578..21a2770226e 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile @@ -2,10 +2,16 @@ # Makefile for the linux arm-specific parts of the memory manager. # -obj-y := consistent.o extable.o fault-armv.o \ - fault.o flush.o init.o ioremap.o mmap.o \ +obj-y := consistent.o extable.o fault.o init.o \ + iomap.o + +obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \ mm-armv.o +ifneq ($(CONFIG_MMU),y) +obj-y += nommu.o +endif + obj-$(CONFIG_MODULES) += proc-syms.o obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index 705c98921c3..e0d21bbbe7d 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -11,7 +11,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/compiler.h> #include <linux/kernel.h> #include <linux/errno.h> diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S index 54e3c5bb518..2ebc1b3bf85 100644 --- a/arch/arm/mm/cache-v4wb.S +++ b/arch/arm/mm/cache-v4wb.S @@ -7,7 +7,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/linkage.h> #include <linux/init.h> #include <asm/memory.h> diff --git a/arch/arm/mm/copypage-v3.S b/arch/arm/mm/copypage-v3.S index 3c58ebbf035..2ee394b11bc 100644 --- a/arch/arm/mm/copypage-v3.S +++ b/arch/arm/mm/copypage-v3.S @@ -35,7 +35,7 @@ ENTRY(v3_copy_user_page) stmia r0!, {r3, r4, ip, lr} @ 4 ldmneia r1!, {r3, r4, ip, lr} @ 4 bne 1b @ 1 - LOADREGS(fd, sp!, {r4, pc}) @ 3 + ldmfd sp!, {r4, pc} @ 3 .align 5 /* diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index 4a884baf3b9..c5e0622c776 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c @@ -8,7 +8,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/signal.h> #include <linux/ptrace.h> diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 9ea1f87a707..fe3f7f62500 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -7,7 +7,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/errno.h> #include <linux/ptrace.h> @@ -26,8 +25,6 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#define TABLE_SIZE (2 * PTRS_PER_PTE * sizeof(pte_t)) - DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; diff --git a/arch/arm/mm/iomap.c b/arch/arm/mm/iomap.c new file mode 100644 index 00000000000..62066f3020c --- /dev/null +++ b/arch/arm/mm/iomap.c @@ -0,0 +1,55 @@ +/* + * linux/arch/arm/mm/iomap.c + * + * Map IO port and PCI memory spaces so that {read,write}[bwl] can + * be used to access this memory. + */ +#include <linux/module.h> +#include <linux/pci.h> +#include <linux/ioport.h> + +#include <asm/io.h> + +#ifdef __io +void __iomem *ioport_map(unsigned long port, unsigned int nr) +{ + return __io(port); +} +EXPORT_SYMBOL(ioport_map); + +void ioport_unmap(void __iomem *addr) +{ +} +EXPORT_SYMBOL(ioport_unmap); +#endif + +#ifdef CONFIG_PCI +void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) +{ + unsigned long start = pci_resource_start(dev, bar); + unsigned long len = pci_resource_len(dev, bar); + unsigned long flags = pci_resource_flags(dev, bar); + + if (!len || !start) + return NULL; + if (maxlen && len > maxlen) + len = maxlen; + if (flags & IORESOURCE_IO) + return ioport_map(start, len); + if (flags & IORESOURCE_MEM) { + if (flags & IORESOURCE_CACHEABLE) + return ioremap(start, len); + return ioremap_nocache(start, len); + } + return NULL; +} +EXPORT_SYMBOL(pci_iomap); + +void pci_iounmap(struct pci_dev *dev, void __iomem *addr) +{ + if ((unsigned long)addr >= VMALLOC_START && + (unsigned long)addr < VMALLOC_END) + iounmap(addr); +} +EXPORT_SYMBOL(pci_iounmap); +#endif diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index c1f7180c7be..7eac87f0518 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -27,7 +27,16 @@ #include <asm/cacheflush.h> #include <asm/io.h> +#include <asm/mmu_context.h> +#include <asm/pgalloc.h> #include <asm/tlbflush.h> +#include <asm/sizes.h> + +/* + * Used by ioremap() and iounmap() code to mark (super)section-mapped + * I/O regions in vm_struct->flags field. + */ +#define VM_ARM_SECTION_MAPPING 0x80000000 static inline void remap_area_pte(pte_t * pte, unsigned long address, unsigned long size, @@ -113,10 +122,168 @@ remap_area_pages(unsigned long start, unsigned long pfn, dir++; } while (address && (address < end)); - flush_cache_vmap(start, end); return err; } + +void __check_kvm_seq(struct mm_struct *mm) +{ + unsigned int seq; + + do { + seq = init_mm.context.kvm_seq; + memcpy(pgd_offset(mm, VMALLOC_START), + pgd_offset_k(VMALLOC_START), + sizeof(pgd_t) * (pgd_index(VMALLOC_END) - + pgd_index(VMALLOC_START))); + mm->context.kvm_seq = seq; + } while (seq != init_mm.context.kvm_seq); +} + +#ifndef CONFIG_SMP +/* + * Section support is unsafe on SMP - If you iounmap and ioremap a region, + * the other CPUs will not see this change until their next context switch. + * Meanwhile, (eg) if an interrupt comes in on one of those other CPUs + * which requires the new ioremap'd region to be referenced, the CPU will + * reference the _old_ region. + * + * Note that get_vm_area() allocates a guard 4K page, so we need to mask + * the size back to 1MB aligned or we will overflow in the loop below. + */ +static void unmap_area_sections(unsigned long virt, unsigned long size) +{ + unsigned long addr = virt, end = virt + (size & ~SZ_1M); + pgd_t *pgd; + + flush_cache_vunmap(addr, end); + pgd = pgd_offset_k(addr); + do { + pmd_t pmd, *pmdp = pmd_offset(pgd, addr); + + pmd = *pmdp; + if (!pmd_none(pmd)) { + /* + * Clear the PMD from the page table, and + * increment the kvm sequence so others + * notice this change. + * + * Note: this is still racy on SMP machines. + */ + pmd_clear(pmdp); + init_mm.context.kvm_seq++; + + /* + * Free the page table, if there was one. + */ + if ((pmd_val(pmd) & PMD_TYPE_MASK) == PMD_TYPE_TABLE) + pte_free_kernel(pmd_page_kernel(pmd)); + } + + addr += PGDIR_SIZE; + pgd++; + } while (addr < end); + + /* + * Ensure that the active_mm is up to date - we want to + * catch any use-after-iounmap cases. + */ + if (current->active_mm->context.kvm_seq != init_mm.context.kvm_seq) + __check_kvm_seq(current->active_mm); + + flush_tlb_kernel_range(virt, end); +} + +static int +remap_area_sections(unsigned long virt, unsigned long pfn, + unsigned long size, unsigned long flags) +{ + unsigned long prot, addr = virt, end = virt + size; + pgd_t *pgd; + + /* + * Remove and free any PTE-based mapping, and + * sync the current kernel mapping. + */ + unmap_area_sections(virt, size); + + prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO) | + (flags & (L_PTE_CACHEABLE | L_PTE_BUFFERABLE)); + + /* + * ARMv6 and above need XN set to prevent speculative prefetches + * hitting IO. + */ + if (cpu_architecture() >= CPU_ARCH_ARMv6) + prot |= PMD_SECT_XN; + + pgd = pgd_offset_k(addr); + do { + pmd_t *pmd = pmd_offset(pgd, addr); + + pmd[0] = __pmd(__pfn_to_phys(pfn) | prot); + pfn += SZ_1M >> PAGE_SHIFT; + pmd[1] = __pmd(__pfn_to_phys(pfn) | prot); + pfn += SZ_1M >> PAGE_SHIFT; + flush_pmd_entry(pmd); + + addr += PGDIR_SIZE; + pgd++; + } while (addr < end); + + return 0; +} + +static int +remap_area_supersections(unsigned long virt, unsigned long pfn, + unsigned long size, unsigned long flags) +{ + unsigned long prot, addr = virt, end = virt + size; + pgd_t *pgd; + + /* + * Remove and free any PTE-based mapping, and + * sync the current kernel mapping. + */ + unmap_area_sections(virt, size); + + prot = PMD_TYPE_SECT | PMD_SECT_SUPER | PMD_SECT_AP_WRITE | + PMD_DOMAIN(DOMAIN_IO) | + (flags & (L_PTE_CACHEABLE | L_PTE_BUFFERABLE)); + + /* + * ARMv6 and above need XN set to prevent speculative prefetches + * hitting IO. + */ + if (cpu_architecture() >= CPU_ARCH_ARMv6) + prot |= PMD_SECT_XN; + + pgd = pgd_offset_k(virt); + do { + unsigned long super_pmd_val, i; + + super_pmd_val = __pfn_to_phys(pfn) | prot; + super_pmd_val |= ((pfn >> (32 - PAGE_SHIFT)) & 0xf) << 20; + + for (i = 0; i < 8; i++) { + pmd_t *pmd = pmd_offset(pgd, addr); + + pmd[0] = __pmd(super_pmd_val); + pmd[1] = __pmd(super_pmd_val); + flush_pmd_entry(pmd); + + addr += PGDIR_SIZE; + pgd++; + } + + pfn += SUPERSECTION_SIZE >> PAGE_SHIFT; + } while (addr < end); + + return 0; +} +#endif + + /* * Remap an arbitrary physical address space into the kernel virtual * address space. Needed when the kernel wants to access high addresses @@ -133,18 +300,42 @@ void __iomem * __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, unsigned long flags) { + int err; unsigned long addr; struct vm_struct * area; + unsigned int cr = get_cr(); + + /* + * High mappings must be supersection aligned + */ + if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK)) + return NULL; area = get_vm_area(size, VM_IOREMAP); if (!area) return NULL; addr = (unsigned long)area->addr; - if (remap_area_pages(addr, pfn, size, flags)) { + +#ifndef CONFIG_SMP + if ((((cpu_architecture() >= CPU_ARCH_ARMv6) && (cr & CR_XP)) || + cpu_is_xsc3()) && + !((__pfn_to_phys(pfn) | size | addr) & ~SUPERSECTION_MASK)) { + area->flags |= VM_ARM_SECTION_MAPPING; + err = remap_area_supersections(addr, pfn, size, flags); + } else if (!((__pfn_to_phys(pfn) | size | addr) & ~PMD_MASK)) { + area->flags |= VM_ARM_SECTION_MAPPING; + err = remap_area_sections(addr, pfn, size, flags); + } else +#endif + err = remap_area_pages(addr, pfn, size, flags); + + if (err) { vunmap((void *)addr); return NULL; } - return (void __iomem *) (offset + (char *)addr); + + flush_cache_vmap(addr, addr + size); + return (void __iomem *) (offset + addr); } EXPORT_SYMBOL(__ioremap_pfn); @@ -173,53 +364,34 @@ EXPORT_SYMBOL(__ioremap); void __iounmap(void __iomem *addr) { - vunmap((void *)(PAGE_MASK & (unsigned long)addr)); -} -EXPORT_SYMBOL(__iounmap); - -#ifdef __io -void __iomem *ioport_map(unsigned long port, unsigned int nr) -{ - return __io(port); -} -EXPORT_SYMBOL(ioport_map); - -void ioport_unmap(void __iomem *addr) -{ -} -EXPORT_SYMBOL(ioport_unmap); -#endif + struct vm_struct **p, *tmp; + unsigned int section_mapping = 0; -#ifdef CONFIG_PCI -#include <linux/pci.h> -#include <linux/ioport.h> + addr = (void __iomem *)(PAGE_MASK & (unsigned long)addr); -void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) -{ - unsigned long start = pci_resource_start(dev, bar); - unsigned long len = pci_resource_len(dev, bar); - unsigned long flags = pci_resource_flags(dev, bar); - - if (!len || !start) - return NULL; - if (maxlen && len > maxlen) - len = maxlen; - if (flags & IORESOURCE_IO) - return ioport_map(start, len); - if (flags & IORESOURCE_MEM) { - if (flags & IORESOURCE_CACHEABLE) - return ioremap(start, len); - return ioremap_nocache(start, len); + /* + * If this is a section based mapping we need to handle it + * specially as the VM subysystem does not know how to handle + * such a beast. We need the lock here b/c we need to clear + * all the mappings before the area can be reclaimed + * by someone else. + */ + write_lock(&vmlist_lock); + for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) { + if((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) { + if (tmp->flags & VM_ARM_SECTION_MAPPING) { + *p = tmp->next; + unmap_area_sections((unsigned long)tmp->addr, + tmp->size); + kfree(tmp); + section_mapping = 1; + } + break; + } } - return NULL; -} -EXPORT_SYMBOL(pci_iomap); + write_unlock(&vmlist_lock); -void pci_iounmap(struct pci_dev *dev, void __iomem *addr) -{ - if ((unsigned long)addr >= VMALLOC_START && - (unsigned long)addr < VMALLOC_END) - iounmap(addr); + if (!section_mapping) + vunmap(addr); } -EXPORT_SYMBOL(pci_iounmap); -#endif +EXPORT_SYMBOL(__iounmap); diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c index 95273de4f77..38769f5862b 100644 --- a/arch/arm/mm/mm-armv.c +++ b/arch/arm/mm/mm-armv.c @@ -9,7 +9,6 @@ * * Page table sludge for ARM v3 and v4 processor architectures. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/mm.h> #include <linux/init.h> @@ -227,7 +226,7 @@ void free_pgd_slow(pgd_t *pgd) pte = pmd_page(*pmd); pmd_clear(pmd); - dec_page_state(nr_page_table_pages); + dec_zone_page_state(virt_to_page((unsigned long *)pgd), NR_PAGETABLE); pte_lock_deinit(pte); pte_free(pte); pmd_free(pmd); @@ -303,16 +302,16 @@ static struct mem_types mem_types[] __initdata = { .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | L_PTE_WRITE, .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PMD_TYPE_SECT | PMD_SECT_UNCACHED | + .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED | PMD_SECT_AP_WRITE, .domain = DOMAIN_IO, }, [MT_CACHECLEAN] = { - .prot_sect = PMD_TYPE_SECT, + .prot_sect = PMD_TYPE_SECT | PMD_BIT4, .domain = DOMAIN_KERNEL, }, [MT_MINICLEAN] = { - .prot_sect = PMD_TYPE_SECT | PMD_SECT_MINICACHE, + .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_MINICACHE, .domain = DOMAIN_KERNEL, }, [MT_LOW_VECTORS] = { @@ -328,25 +327,25 @@ static struct mem_types mem_types[] __initdata = { .domain = DOMAIN_USER, }, [MT_MEMORY] = { - .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, + .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_AP_WRITE, .domain = DOMAIN_KERNEL, }, [MT_ROM] = { - .prot_sect = PMD_TYPE_SECT, + .prot_sect = PMD_TYPE_SECT | PMD_BIT4, .domain = DOMAIN_KERNEL, }, [MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */ .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | L_PTE_WRITE, .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PMD_TYPE_SECT | PMD_SECT_UNCACHED | + .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED | PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE | PMD_SECT_TEX(1), .domain = DOMAIN_IO, }, [MT_NONSHARED_DEVICE] = { .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PMD_TYPE_SECT | PMD_SECT_NONSHARED_DEV | + .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_NONSHARED_DEV | PMD_SECT_AP_WRITE, .domain = DOMAIN_IO, } @@ -376,14 +375,21 @@ void __init build_mem_type_table(void) ecc_mask = 0; } - if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) { - for (i = 0; i < ARRAY_SIZE(mem_types); i++) { + /* + * Xscale must not have PMD bit 4 set for section mappings. + */ + if (cpu_is_xscale()) + for (i = 0; i < ARRAY_SIZE(mem_types); i++) + mem_types[i].prot_sect &= ~PMD_BIT4; + + /* + * ARMv5 and lower, excluding Xscale, bit 4 must be set for + * page tables. + */ + if (cpu_arch < CPU_ARCH_ARMv6 && !cpu_is_xscale()) + for (i = 0; i < ARRAY_SIZE(mem_types); i++) if (mem_types[i].prot_l1) mem_types[i].prot_l1 |= PMD_BIT4; - if (mem_types[i].prot_sect) - mem_types[i].prot_sect |= PMD_BIT4; - } - } cp = &cache_policies[cachepolicy]; kern_pgprot = user_pgprot = cp->pte; @@ -407,8 +413,8 @@ void __init build_mem_type_table(void) * bit 4 becomes XN which we must clear for the * kernel memory mapping. */ - mem_types[MT_MEMORY].prot_sect &= ~PMD_BIT4; - mem_types[MT_ROM].prot_sect &= ~PMD_BIT4; + mem_types[MT_MEMORY].prot_sect &= ~PMD_SECT_XN; + mem_types[MT_ROM].prot_sect &= ~PMD_SECT_XN; /* * Mark cache clean areas and XIP ROM read only diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c index 3de7f84b53c..29e54807c5b 100644 --- a/arch/arm/mm/mmap.c +++ b/arch/arm/mm/mmap.c @@ -1,7 +1,6 @@ /* * linux/arch/arm/mm/mmap.c */ -#include <linux/config.h> #include <linux/fs.h> #include <linux/mm.h> #include <linux/mman.h> diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c new file mode 100644 index 00000000000..1464ed817b5 --- /dev/null +++ b/arch/arm/mm/nommu.c @@ -0,0 +1,39 @@ +/* + * linux/arch/arm/mm/nommu.c + * + * ARM uCLinux supporting functions. + */ +#include <linux/module.h> +#include <linux/mm.h> +#include <linux/pagemap.h> + +#include <asm/cacheflush.h> +#include <asm/io.h> +#include <asm/page.h> + +void flush_dcache_page(struct page *page) +{ + __cpuc_flush_dcache_page(page_address(page)); +} +EXPORT_SYMBOL(flush_dcache_page); + +void __iomem *__ioremap_pfn(unsigned long pfn, unsigned long offset, + size_t size, unsigned long flags) +{ + if (pfn >= (0x100000000ULL >> PAGE_SHIFT)) + return NULL; + return (void __iomem *) (offset + (pfn << PAGE_SHIFT)); +} +EXPORT_SYMBOL(__ioremap_pfn); + +void __iomem *__ioremap(unsigned long phys_addr, size_t size, + unsigned long flags) +{ + return (void __iomem *)phys_addr; +} +EXPORT_SYMBOL(__ioremap); + +void __iounmap(void __iomem *addr) +{ +} +EXPORT_SYMBOL(__iounmap); diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index 959588884fa..700297ae4a5 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -3,6 +3,7 @@ * * Copyright (C) 2000 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd. + * hacked for non-paged-MM by Hyok S. Choi, 2003. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +26,6 @@ * CONFIG_CPU_ARM1020_CPU_IDLE -> nohlt */ #include <linux/linkage.h> -#include <linux/config.h> #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> @@ -101,7 +101,9 @@ ENTRY(cpu_arm1020_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mrc p15, 0, ip, c1, c0, 0 @ ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x1100 @ ...i...s........ @@ -359,6 +361,7 @@ ENTRY(cpu_arm1020_dcache_clean_area) */ .align 5 ENTRY(cpu_arm1020_switch_mm) +#ifdef CONFIG_MMU #ifndef CONFIG_CPU_DCACHE_DISABLE mcr p15, 0, r3, c7, c10, 4 mov r1, #0xF @ 16 segments @@ -383,6 +386,7 @@ ENTRY(cpu_arm1020_switch_mm) mcr p15, 0, r1, c7, c10, 4 @ drain WB mcr p15, 0, r0, c2, c0, 0 @ load page table pointer mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs +#endif /* CONFIG_MMU */ mov pc, lr /* @@ -392,6 +396,7 @@ ENTRY(cpu_arm1020_switch_mm) */ .align 5 ENTRY(cpu_arm1020_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -421,6 +426,7 @@ ENTRY(cpu_arm1020_set_pte) mcr p15, 0, r0, c7, c10, 1 @ clean D entry #endif mcr p15, 0, r0, c7, c10, 4 @ drain WB +#endif /* CONFIG_MMU */ mov pc, lr __INIT @@ -430,12 +436,15 @@ __arm1020_setup: mov r0, #0 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 +#endif + + adr r5, arm1020_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, arm1020_cr1_clear bic r0, r0, r5 - ldr r5, arm1020_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN orr r0, r0, #0x4000 @ .R.. .... .... .... #endif @@ -447,12 +456,9 @@ __arm1020_setup: * .RVI ZFRS BLDP WCAM * .011 1001 ..11 0101 */ - .type arm1020_cr1_clear, #object - .type arm1020_cr1_set, #object -arm1020_cr1_clear: - .word 0x593f -arm1020_cr1_set: - .word 0x3935 + .type arm1020_crval, #object +arm1020_crval: + crval clear=0x0000593f, mmuset=0x00003935, ucset=0x00001930 __INITDATA @@ -518,6 +524,9 @@ __arm1020_proc_info: .long PMD_TYPE_SECT | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm1020_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index be6d081ff2b..0c33a5ed5a6 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S @@ -3,6 +3,7 @@ * * Copyright (C) 2000 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd. + * hacked for non-paged-MM by Hyok S. Choi, 2003. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +26,6 @@ * CONFIG_CPU_ARM1020_CPU_IDLE -> nohlt */ #include <linux/linkage.h> -#include <linux/config.h> #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> @@ -101,7 +101,9 @@ ENTRY(cpu_arm1020e_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mrc p15, 0, ip, c1, c0, 0 @ ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x1100 @ ...i...s........ @@ -344,6 +346,7 @@ ENTRY(cpu_arm1020e_dcache_clean_area) */ .align 5 ENTRY(cpu_arm1020e_switch_mm) +#ifdef CONFIG_MMU #ifndef CONFIG_CPU_DCACHE_DISABLE mcr p15, 0, r3, c7, c10, 4 mov r1, #0xF @ 16 segments @@ -367,6 +370,7 @@ ENTRY(cpu_arm1020e_switch_mm) mcr p15, 0, r1, c7, c10, 4 @ drain WB mcr p15, 0, r0, c2, c0, 0 @ load page table pointer mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs +#endif mov pc, lr /* @@ -376,6 +380,7 @@ ENTRY(cpu_arm1020e_switch_mm) */ .align 5 ENTRY(cpu_arm1020e_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -403,6 +408,7 @@ ENTRY(cpu_arm1020e_set_pte) #ifndef CONFIG_CPU_DCACHE_DISABLE mcr p15, 0, r0, c7, c10, 1 @ clean D entry #endif +#endif /* CONFIG_MMU */ mov pc, lr __INIT @@ -412,12 +418,14 @@ __arm1020e_setup: mov r0, #0 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 +#endif + adr r5, arm1020e_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, arm1020e_cr1_clear bic r0, r0, r5 - ldr r5, arm1020e_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN orr r0, r0, #0x4000 @ .R.. .... .... .... #endif @@ -429,12 +437,9 @@ __arm1020e_setup: * .RVI ZFRS BLDP WCAM * .011 1001 ..11 0101 */ - .type arm1020e_cr1_clear, #object - .type arm1020e_cr1_set, #object -arm1020e_cr1_clear: - .word 0x5f3f -arm1020e_cr1_set: - .word 0x3935 + .type arm1020e_crval, #object +arm1020e_crval: + crval clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001930 __INITDATA @@ -468,25 +473,7 @@ cpu_elf_name: .type cpu_arm1020e_name, #object cpu_arm1020e_name: - .ascii "ARM1020E" -#ifndef CONFIG_CPU_ICACHE_DISABLE - .ascii "i" -#endif -#ifndef CONFIG_CPU_DCACHE_DISABLE - .ascii "d" -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - .ascii "(wt)" -#else - .ascii "(wb)" -#endif -#endif -#ifndef CONFIG_CPU_BPREDICT_DISABLE - .ascii "B" -#endif -#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN - .ascii "RR" -#endif - .ascii "\0" + .asciz "ARM1020E" .size cpu_arm1020e_name, . - cpu_arm1020e_name .align @@ -501,6 +488,10 @@ __arm1020e_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm1020e_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index f778545d57a..566a5565307 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S @@ -3,6 +3,7 @@ * * Copyright (C) 2000 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd. + * hacked for non-paged-MM by Hyok S. Choi, 2003. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,7 +15,6 @@ * functions on the ARM1022E. */ #include <linux/linkage.h> -#include <linux/config.h> #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> @@ -90,7 +90,9 @@ ENTRY(cpu_arm1022_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mrc p15, 0, ip, c1, c0, 0 @ ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x1100 @ ...i...s........ @@ -333,6 +335,7 @@ ENTRY(cpu_arm1022_dcache_clean_area) */ .align 5 ENTRY(cpu_arm1022_switch_mm) +#ifdef CONFIG_MMU #ifndef CONFIG_CPU_DCACHE_DISABLE mov r1, #(CACHE_DSEGMENTS - 1) << 5 @ 16 segments 1: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries @@ -349,6 +352,7 @@ ENTRY(cpu_arm1022_switch_mm) mcr p15, 0, r1, c7, c10, 4 @ drain WB mcr p15, 0, r0, c2, c0, 0 @ load page table pointer mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs +#endif mov pc, lr /* @@ -358,6 +362,7 @@ ENTRY(cpu_arm1022_switch_mm) */ .align 5 ENTRY(cpu_arm1022_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -385,6 +390,7 @@ ENTRY(cpu_arm1022_set_pte) #ifndef CONFIG_CPU_DCACHE_DISABLE mcr p15, 0, r0, c7, c10, 1 @ clean D entry #endif +#endif /* CONFIG_MMU */ mov pc, lr __INIT @@ -394,12 +400,14 @@ __arm1022_setup: mov r0, #0 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 +#endif + adr r5, arm1022_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, arm1022_cr1_clear bic r0, r0, r5 - ldr r5, arm1022_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN orr r0, r0, #0x4000 @ .R.............. #endif @@ -412,12 +420,9 @@ __arm1022_setup: * .011 1001 ..11 0101 * */ - .type arm1022_cr1_clear, #object - .type arm1022_cr1_set, #object -arm1022_cr1_clear: - .word 0x7f3f -arm1022_cr1_set: - .word 0x3935 + .type arm1022_crval, #object +arm1022_crval: + crval clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001930 __INITDATA @@ -451,25 +456,7 @@ cpu_elf_name: .type cpu_arm1022_name, #object cpu_arm1022_name: - .ascii "arm1022" -#ifndef CONFIG_CPU_ICACHE_DISABLE - .ascii "i" -#endif -#ifndef CONFIG_CPU_DCACHE_DISABLE - .ascii "d" -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - .ascii "(wt)" -#else - .ascii "(wb)" -#endif -#endif -#ifndef CONFIG_CPU_BPREDICT_DISABLE - .ascii "B" -#endif -#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN - .ascii "RR" -#endif - .ascii "\0" + .asciz "ARM1022" .size cpu_arm1022_name, . - cpu_arm1022_name .align @@ -484,6 +471,10 @@ __arm1022_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm1022_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 148c111fde7..6ea76321d0d 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S @@ -3,6 +3,7 @@ * * Copyright (C) 2000 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd. + * hacked for non-paged-MM by Hyok S. Choi, 2003. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,7 +15,6 @@ * functions on the ARM1026EJ-S. */ #include <linux/linkage.h> -#include <linux/config.h> #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> @@ -90,7 +90,9 @@ ENTRY(cpu_arm1026_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mrc p15, 0, ip, c1, c0, 0 @ ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x1100 @ ...i...s........ @@ -327,6 +329,7 @@ ENTRY(cpu_arm1026_dcache_clean_area) */ .align 5 ENTRY(cpu_arm1026_switch_mm) +#ifdef CONFIG_MMU mov r1, #0 #ifndef CONFIG_CPU_DCACHE_DISABLE 1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate @@ -338,6 +341,7 @@ ENTRY(cpu_arm1026_switch_mm) mcr p15, 0, r1, c7, c10, 4 @ drain WB mcr p15, 0, r0, c2, c0, 0 @ load page table pointer mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs +#endif mov pc, lr /* @@ -347,6 +351,7 @@ ENTRY(cpu_arm1026_switch_mm) */ .align 5 ENTRY(cpu_arm1026_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -374,6 +379,7 @@ ENTRY(cpu_arm1026_set_pte) #ifndef CONFIG_CPU_DCACHE_DISABLE mcr p15, 0, r0, c7, c10, 1 @ clean D entry #endif +#endif /* CONFIG_MMU */ mov pc, lr @@ -384,17 +390,19 @@ __arm1026_setup: mov r0, #0 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 mcr p15, 0, r4, c2, c0 @ load page table pointer +#endif #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH mov r0, #4 @ explicitly disable writeback mcr p15, 7, r0, c15, c0, 0 #endif + adr r5, arm1026_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, arm1026_cr1_clear bic r0, r0, r5 - ldr r5, arm1026_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN orr r0, r0, #0x4000 @ .R.. .... .... .... #endif @@ -407,12 +415,9 @@ __arm1026_setup: * .011 1001 ..11 0101 * */ - .type arm1026_cr1_clear, #object - .type arm1026_cr1_set, #object -arm1026_cr1_clear: - .word 0x7f3f -arm1026_cr1_set: - .word 0x3935 + .type arm1026_crval, #object +arm1026_crval: + crval clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001934 __INITDATA @@ -447,25 +452,7 @@ cpu_elf_name: .type cpu_arm1026_name, #object cpu_arm1026_name: - .ascii "ARM1026EJ-S" -#ifndef CONFIG_CPU_ICACHE_DISABLE - .ascii "i" -#endif -#ifndef CONFIG_CPU_DCACHE_DISABLE - .ascii "d" -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - .ascii "(wt)" -#else - .ascii "(wb)" -#endif -#endif -#ifndef CONFIG_CPU_BPREDICT_DISABLE - .ascii "B" -#endif -#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN - .ascii "RR" -#endif - .ascii "\0" + .asciz "ARM1026EJ-S" .size cpu_arm1026_name, . - cpu_arm1026_name .align @@ -480,6 +467,10 @@ __arm1026_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm1026_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S index 540359b475d..0432e480688 100644 --- a/arch/arm/mm/proc-arm6_7.S +++ b/arch/arm/mm/proc-arm6_7.S @@ -2,6 +2,7 @@ * linux/arch/arm/mm/proc-arm6,7.S * * Copyright (C) 1997-2000 Russell King + * hacked for non-paged-MM by Hyok S. Choi, 2003. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -199,10 +200,12 @@ ENTRY(cpu_arm7_do_idle) */ ENTRY(cpu_arm6_switch_mm) ENTRY(cpu_arm7_switch_mm) +#ifdef CONFIG_MMU mov r1, #0 mcr p15, 0, r1, c7, c0, 0 @ flush cache mcr p15, 0, r0, c2, c0, 0 @ update page table ptr mcr p15, 0, r1, c5, c0, 0 @ flush TLBs +#endif mov pc, lr /* @@ -214,6 +217,7 @@ ENTRY(cpu_arm7_switch_mm) .align 5 ENTRY(cpu_arm6_set_pte) ENTRY(cpu_arm7_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -232,6 +236,7 @@ ENTRY(cpu_arm7_set_pte) movne r2, #0 str r2, [r0] @ hardware version +#endif /* CONFIG_MMU */ mov pc, lr /* @@ -243,7 +248,9 @@ ENTRY(cpu_arm6_reset) ENTRY(cpu_arm7_reset) mov r1, #0 mcr p15, 0, r1, c7, c0, 0 @ flush cache +#ifdef CONFIG_MMU mcr p15, 0, r1, c5, c0, 0 @ flush TLB +#endif mov r1, #0x30 mcr p15, 0, r1, c1, c0, 0 @ turn off MMU etc mov pc, r0 @@ -253,19 +260,27 @@ ENTRY(cpu_arm7_reset) .type __arm6_setup, #function __arm6_setup: mov r0, #0 mcr p15, 0, r0, c7, c0 @ flush caches on v3 +#ifdef CONFIG_MMU mcr p15, 0, r0, c5, c0 @ flush TLBs on v3 mov r0, #0x3d @ . ..RS BLDP WCAM orr r0, r0, #0x100 @ . ..01 0011 1101 +#else + mov r0, #0x3c @ . ..RS BLDP WCA. +#endif mov pc, lr .size __arm6_setup, . - __arm6_setup .type __arm7_setup, #function __arm7_setup: mov r0, #0 mcr p15, 0, r0, c7, c0 @ flush caches on v3 +#ifdef CONFIG_MMU mcr p15, 0, r0, c5, c0 @ flush TLBs on v3 mcr p15, 0, r0, c3, c0 @ load domain access register mov r0, #0x7d @ . ..RS BLDP WCAM orr r0, r0, #0x100 @ . ..01 0111 1101 +#else + mov r0, #0x7c @ . ..RS BLDP WCA. +#endif mov pc, lr .size __arm7_setup, . - __arm7_setup @@ -340,6 +355,10 @@ __arm6_proc_info: .long 0x41560600 .long 0xfffffff0 .long 0x00000c1e + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm6_setup .long cpu_arch_name .long cpu_elf_name @@ -356,6 +375,10 @@ __arm610_proc_info: .long 0x41560610 .long 0xfffffff0 .long 0x00000c1e + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm6_setup .long cpu_arch_name .long cpu_elf_name @@ -372,6 +395,10 @@ __arm7_proc_info: .long 0x41007000 .long 0xffffff00 .long 0x00000c1e + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm7_setup .long cpu_arch_name .long cpu_elf_name @@ -393,6 +420,10 @@ __arm710_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm7_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S index 26f00ee2ad9..c2f0705bfd4 100644 --- a/arch/arm/mm/proc-arm720.S +++ b/arch/arm/mm/proc-arm720.S @@ -4,6 +4,7 @@ * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) * Rob Scott (rscott@mtrob.fdns.net) * Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd. + * hacked for non-paged-MM by Hyok S. Choi, 2004. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -29,6 +30,7 @@ * out of 'proc-arm6,7.S' per RMK discussion * 07-25-2000 SJH Added idle function. * 08-25-2000 DBS Updated for integration of ARM Ltd version. + * 04-20-2004 HSC modified for non-paged memory management mode. */ #include <linux/linkage.h> #include <linux/init.h> @@ -39,6 +41,8 @@ #include <asm/procinfo.h> #include <asm/ptrace.h> +#include "proc-macros.S" + /* * Function: arm720_proc_init (void) * : arm720_proc_fin (void) @@ -75,10 +79,12 @@ ENTRY(cpu_arm720_do_idle) * the new. */ ENTRY(cpu_arm720_switch_mm) +#ifdef CONFIG_MMU mov r1, #0 mcr p15, 0, r1, c7, c7, 0 @ invalidate cache mcr p15, 0, r0, c2, c0, 0 @ update page table ptr mcr p15, 0, r1, c8, c7, 0 @ flush TLB (v4) +#endif mov pc, lr /* @@ -89,6 +95,7 @@ ENTRY(cpu_arm720_switch_mm) */ .align 5 ENTRY(cpu_arm720_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -107,6 +114,7 @@ ENTRY(cpu_arm720_set_pte) movne r2, #0 str r2, [r0] @ hardware version +#endif mov pc, lr /* @@ -117,7 +125,9 @@ ENTRY(cpu_arm720_set_pte) ENTRY(cpu_arm720_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate cache +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4) +#endif mrc p15, 0, ip, c1, c0, 0 @ get ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x2100 @ ..v....s........ @@ -130,7 +140,9 @@ ENTRY(cpu_arm720_reset) __arm710_setup: mov r0, #0 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) +#endif mrc p15, 0, r0, c1, c0 @ get control register ldr r5, arm710_cr1_clear bic r0, r0, r5 @@ -156,12 +168,14 @@ arm710_cr1_set: __arm720_setup: mov r0, #0 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) +#endif + adr r5, arm720_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register - ldr r5, arm720_cr1_clear bic r0, r0, r5 - ldr r5, arm720_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 mov pc, lr @ __ret (head.S) .size __arm720_setup, . - __arm720_setup @@ -171,12 +185,9 @@ __arm720_setup: * ..1. 1001 ..11 1101 * */ - .type arm720_cr1_clear, #object - .type arm720_cr1_set, #object -arm720_cr1_clear: - .word 0x2f3f -arm720_cr1_set: - .word 0x213d + .type arm720_crval, #object +arm720_crval: + crval clear=0x00002f3f, mmuset=0x0000213d, ucset=0x00000130 __INITDATA @@ -234,6 +245,10 @@ __arm710_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm710_setup @ cpu_flush .long cpu_arch_name @ arch_name .long cpu_elf_name @ elf_name @@ -255,6 +270,10 @@ __arm720_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm720_setup @ cpu_flush .long cpu_arch_name @ arch_name .long cpu_elf_name @ elf_name diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index a17f79e0199..4adb46b3a4e 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S @@ -3,6 +3,7 @@ * * Copyright (C) 1999,2000 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd. + * hacked for non-paged-MM by Hyok S. Choi, 2003. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +26,6 @@ * CONFIG_CPU_ARM920_CPU_IDLE -> nohlt */ #include <linux/linkage.h> -#include <linux/config.h> #include <linux/init.h> #include <asm/assembler.h> #include <asm/pgtable-hwdef.h> @@ -97,7 +97,9 @@ ENTRY(cpu_arm920_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mrc p15, 0, ip, c1, c0, 0 @ ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x1100 @ ...i...s........ @@ -317,6 +319,7 @@ ENTRY(cpu_arm920_dcache_clean_area) */ .align 5 ENTRY(cpu_arm920_switch_mm) +#ifdef CONFIG_MMU mov ip, #0 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache @@ -337,6 +340,7 @@ ENTRY(cpu_arm920_switch_mm) mcr p15, 0, ip, c7, c10, 4 @ drain WB mcr p15, 0, r0, c2, c0, 0 @ load page table pointer mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mov pc, lr /* @@ -346,6 +350,7 @@ ENTRY(cpu_arm920_switch_mm) */ .align 5 ENTRY(cpu_arm920_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -372,6 +377,7 @@ ENTRY(cpu_arm920_set_pte) mov r0, r0 mcr p15, 0, r0, c7, c10, 1 @ clean D entry mcr p15, 0, r0, c7, c10, 4 @ drain WB +#endif /* CONFIG_MMU */ mov pc, lr __INIT @@ -381,12 +387,14 @@ __arm920_setup: mov r0, #0 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 +#endif + adr r5, arm920_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, arm920_cr1_clear bic r0, r0, r5 - ldr r5, arm920_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 mov pc, lr .size __arm920_setup, . - __arm920_setup @@ -396,12 +404,9 @@ __arm920_setup: * ..11 0001 ..11 0101 * */ - .type arm920_cr1_clear, #object - .type arm920_cr1_set, #object -arm920_cr1_clear: - .word 0x3f3f -arm920_cr1_set: - .word 0x3135 + .type arm920_crval, #object +arm920_crval: + crval clear=0x00003f3f, mmuset=0x00003135, ucset=0x00001130 __INITDATA @@ -435,19 +440,7 @@ cpu_elf_name: .type cpu_arm920_name, #object cpu_arm920_name: - .ascii "ARM920T" -#ifndef CONFIG_CPU_ICACHE_DISABLE - .ascii "i" -#endif -#ifndef CONFIG_CPU_DCACHE_DISABLE - .ascii "d" -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - .ascii "(wt)" -#else - .ascii "(wb)" -#endif -#endif - .ascii "\0" + .asciz "ARM920T" .size cpu_arm920_name, . - cpu_arm920_name .align @@ -464,6 +457,10 @@ __arm920_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm920_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index bbde4a024a4..571f082f024 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S @@ -4,6 +4,7 @@ * Copyright (C) 1999,2000 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd. * Copyright (C) 2001 Altera Corporation + * hacked for non-paged-MM by Hyok S. Choi, 2003. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -26,7 +27,6 @@ * CONFIG_CPU_ARM922_CPU_IDLE -> nohlt */ #include <linux/linkage.h> -#include <linux/config.h> #include <linux/init.h> #include <asm/assembler.h> #include <asm/pgtable-hwdef.h> @@ -99,7 +99,9 @@ ENTRY(cpu_arm922_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mrc p15, 0, ip, c1, c0, 0 @ ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x1100 @ ...i...s........ @@ -321,6 +323,7 @@ ENTRY(cpu_arm922_dcache_clean_area) */ .align 5 ENTRY(cpu_arm922_switch_mm) +#ifdef CONFIG_MMU mov ip, #0 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache @@ -341,6 +344,7 @@ ENTRY(cpu_arm922_switch_mm) mcr p15, 0, ip, c7, c10, 4 @ drain WB mcr p15, 0, r0, c2, c0, 0 @ load page table pointer mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mov pc, lr /* @@ -350,6 +354,7 @@ ENTRY(cpu_arm922_switch_mm) */ .align 5 ENTRY(cpu_arm922_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -376,6 +381,7 @@ ENTRY(cpu_arm922_set_pte) mov r0, r0 mcr p15, 0, r0, c7, c10, 1 @ clean D entry mcr p15, 0, r0, c7, c10, 4 @ drain WB +#endif /* CONFIG_MMU */ mov pc, lr __INIT @@ -385,12 +391,14 @@ __arm922_setup: mov r0, #0 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 +#endif + adr r5, arm922_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, arm922_cr1_clear bic r0, r0, r5 - ldr r5, arm922_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 mov pc, lr .size __arm922_setup, . - __arm922_setup @@ -400,12 +408,9 @@ __arm922_setup: * ..11 0001 ..11 0101 * */ - .type arm922_cr1_clear, #object - .type arm922_cr1_set, #object -arm922_cr1_clear: - .word 0x3f3f -arm922_cr1_set: - .word 0x3135 + .type arm922_crval, #object +arm922_crval: + crval clear=0x00003f3f, mmuset=0x00003135, ucset=0x00001130 __INITDATA @@ -439,19 +444,7 @@ cpu_elf_name: .type cpu_arm922_name, #object cpu_arm922_name: - .ascii "ARM922T" -#ifndef CONFIG_CPU_ICACHE_DISABLE - .ascii "i" -#endif -#ifndef CONFIG_CPU_DCACHE_DISABLE - .ascii "d" -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - .ascii "(wt)" -#else - .ascii "(wb)" -#endif -#endif - .ascii "\0" + .asciz "ARM922T" .size cpu_arm922_name, . - cpu_arm922_name .align @@ -468,6 +461,10 @@ __arm922_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm922_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index 224ce226a01..ad15f8503d5 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S @@ -9,6 +9,8 @@ * Update for Linux-2.6 and cache flush improvements * Copyright (C) 2004 Nokia Corporation by Tony Lindgren <tony@atomide.com> * + * hacked for non-paged-MM by Hyok S. Choi, 2004. + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -48,7 +50,6 @@ */ #include <linux/linkage.h> -#include <linux/config.h> #include <linux/init.h> #include <asm/assembler.h> #include <asm/pgtable-hwdef.h> @@ -122,7 +123,9 @@ ENTRY(cpu_arm925_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mrc p15, 0, ip, c1, c0, 0 @ ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x1100 @ ...i...s........ @@ -369,6 +372,7 @@ ENTRY(cpu_arm925_dcache_clean_area) */ .align 5 ENTRY(cpu_arm925_switch_mm) +#ifdef CONFIG_MMU mov ip, #0 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache @@ -383,6 +387,7 @@ ENTRY(cpu_arm925_switch_mm) mcr p15, 0, ip, c7, c10, 4 @ drain WB mcr p15, 0, r0, c2, c0, 0 @ load page table pointer mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mov pc, lr /* @@ -392,6 +397,7 @@ ENTRY(cpu_arm925_switch_mm) */ .align 5 ENTRY(cpu_arm925_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -420,6 +426,7 @@ ENTRY(cpu_arm925_set_pte) mcr p15, 0, r0, c7, c10, 1 @ clean D entry #endif mcr p15, 0, r0, c7, c10, 4 @ drain WB +#endif /* CONFIG_MMU */ mov pc, lr __INIT @@ -438,18 +445,19 @@ __arm925_setup: mov r0, #0 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 +#endif #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH mov r0, #4 @ disable write-back on caches explicitly mcr p15, 7, r0, c15, c0, 0 #endif + adr r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, arm925_cr1_clear bic r0, r0, r5 - ldr r5, arm925_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN orr r0, r0, #0x4000 @ .1.. .... .... .... #endif @@ -462,12 +470,9 @@ __arm925_setup: * .011 0001 ..11 1101 * */ - .type arm925_cr1_clear, #object - .type arm925_cr1_set, #object -arm925_cr1_clear: - .word 0x7f3f -arm925_cr1_set: - .word 0x313d + .type arm925_crval, #object +arm925_crval: + crval clear=0x00007f3f, mmuset=0x0000313d, ucset=0x00001130 __INITDATA @@ -501,22 +506,7 @@ cpu_elf_name: .type cpu_arm925_name, #object cpu_arm925_name: - .ascii "ARM925T" -#ifndef CONFIG_CPU_ICACHE_DISABLE - .ascii "i" -#endif -#ifndef CONFIG_CPU_DCACHE_DISABLE - .ascii "d" -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - .ascii "(wt)" -#else - .ascii "(wb)" -#endif -#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN - .ascii "RR" -#endif -#endif - .ascii "\0" + .asciz "ARM925T" .size cpu_arm925_name, . - cpu_arm925_name .align @@ -531,6 +521,10 @@ __arm925_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm925_setup .long cpu_arch_name .long cpu_elf_name @@ -550,6 +544,10 @@ __arm915_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm925_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 4e2a087cf38..1e89d408047 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S @@ -3,6 +3,7 @@ * * Copyright (C) 1999-2001 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd. + * hacked for non-paged-MM by Hyok S. Choi, 2003. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +26,6 @@ * CONFIG_CPU_ARM926_CPU_IDLE -> nohlt */ #include <linux/linkage.h> -#include <linux/config.h> #include <linux/init.h> #include <asm/assembler.h> #include <asm/pgtable-hwdef.h> @@ -85,7 +85,9 @@ ENTRY(cpu_arm926_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mrc p15, 0, ip, c1, c0, 0 @ ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x1100 @ ...i...s........ @@ -329,6 +331,7 @@ ENTRY(cpu_arm926_dcache_clean_area) */ .align 5 ENTRY(cpu_arm926_switch_mm) +#ifdef CONFIG_MMU mov ip, #0 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache @@ -341,6 +344,7 @@ ENTRY(cpu_arm926_switch_mm) mcr p15, 0, ip, c7, c10, 4 @ drain WB mcr p15, 0, r0, c2, c0, 0 @ load page table pointer mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mov pc, lr /* @@ -350,6 +354,7 @@ ENTRY(cpu_arm926_switch_mm) */ .align 5 ENTRY(cpu_arm926_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -378,6 +383,7 @@ ENTRY(cpu_arm926_set_pte) mcr p15, 0, r0, c7, c10, 1 @ clean D entry #endif mcr p15, 0, r0, c7, c10, 4 @ drain WB +#endif mov pc, lr __INIT @@ -387,7 +393,9 @@ __arm926_setup: mov r0, #0 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 +#endif #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH @@ -395,11 +403,11 @@ __arm926_setup: mcr p15, 7, r0, c15, c0, 0 #endif + adr r5, arm926_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, arm926_cr1_clear bic r0, r0, r5 - ldr r5, arm926_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN orr r0, r0, #0x4000 @ .1.. .... .... .... #endif @@ -412,12 +420,9 @@ __arm926_setup: * .011 0001 ..11 0101 * */ - .type arm926_cr1_clear, #object - .type arm926_cr1_set, #object -arm926_cr1_clear: - .word 0x7f3f -arm926_cr1_set: - .word 0x3135 + .type arm926_crval, #object +arm926_crval: + crval clear=0x00007f3f, mmuset=0x00003135, ucset=0x00001134 __INITDATA @@ -451,22 +456,7 @@ cpu_elf_name: .type cpu_arm926_name, #object cpu_arm926_name: - .ascii "ARM926EJ-S" -#ifndef CONFIG_CPU_ICACHE_DISABLE - .ascii "i" -#endif -#ifndef CONFIG_CPU_DCACHE_DISABLE - .ascii "d" -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - .ascii "(wt)" -#else - .ascii "(wb)" -#endif -#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN - .ascii "RR" -#endif -#endif - .ascii "\0" + .asciz "ARM926EJ-S" .size cpu_arm926_name, . - cpu_arm926_name .align @@ -483,6 +473,10 @@ __arm926_proc_info: PMD_BIT4 | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm926_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index 7cfc2604a1e..9e2c89eb211 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S @@ -49,3 +49,13 @@ .macro asid, rd, rn and \rd, \rn, #255 .endm + + .macro crval, clear, mmuset, ucset +#ifdef CONFIG_MMU + .word \clear + .word \mmuset +#else + .word \clear + .word \ucset +#endif + .endm diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S index a2dd5ae1077..c878064e9b8 100644 --- a/arch/arm/mm/proc-sa110.S +++ b/arch/arm/mm/proc-sa110.S @@ -2,6 +2,7 @@ * linux/arch/arm/mm/proc-sa110.S * * Copyright (C) 1997-2002 Russell King + * hacked for non-paged-MM by Hyok S. Choi, 2003. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -22,6 +23,8 @@ #include <asm/pgtable.h> #include <asm/ptrace.h> +#include "proc-macros.S" + /* * the cache line size of the I and D cache */ @@ -67,7 +70,9 @@ ENTRY(cpu_sa110_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mrc p15, 0, ip, c1, c0, 0 @ ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x1100 @ ...i...s........ @@ -130,11 +135,15 @@ ENTRY(cpu_sa110_dcache_clean_area) */ .align 5 ENTRY(cpu_sa110_switch_mm) +#ifdef CONFIG_MMU str lr, [sp, #-4]! bl v4wb_flush_kern_cache_all @ clears IP mcr p15, 0, r0, c2, c0, 0 @ load page table pointer mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs ldr pc, [sp], #4 +#else + mov pc, lr +#endif /* * cpu_sa110_set_pte(ptep, pte) @@ -143,6 +152,7 @@ ENTRY(cpu_sa110_switch_mm) */ .align 5 ENTRY(cpu_sa110_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -164,6 +174,7 @@ ENTRY(cpu_sa110_set_pte) mov r0, r0 mcr p15, 0, r0, c7, c10, 1 @ clean D entry mcr p15, 0, r0, c7, c10, 4 @ drain WB +#endif mov pc, lr __INIT @@ -173,12 +184,15 @@ __sa110_setup: mov r10, #0 mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4 +#endif + + adr r5, sa110_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, sa110_cr1_clear bic r0, r0, r5 - ldr r5, sa110_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 mov pc, lr .size __sa110_setup, . - __sa110_setup @@ -188,12 +202,9 @@ __sa110_setup: * ..01 0001 ..11 1101 * */ - .type sa110_cr1_clear, #object - .type sa110_cr1_set, #object -sa110_cr1_clear: - .word 0x3f3f -sa110_cr1_set: - .word 0x113d + .type sa110_crval, #object +sa110_crval: + crval clear=0x00003f3f, mmuset=0x0000113d, ucset=0x00001130 __INITDATA @@ -244,6 +255,9 @@ __sa110_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __sa110_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S index 777ad99c143..b23b66a6155 100644 --- a/arch/arm/mm/proc-sa1100.S +++ b/arch/arm/mm/proc-sa1100.S @@ -2,6 +2,7 @@ * linux/arch/arm/mm/proc-sa1100.S * * Copyright (C) 1997-2002 Russell King + * hacked for non-paged-MM by Hyok S. Choi, 2003. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -26,6 +27,8 @@ #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> +#include "proc-macros.S" + /* * the cache line size of the I and D cache */ @@ -77,7 +80,9 @@ ENTRY(cpu_sa1100_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif mrc p15, 0, ip, c1, c0, 0 @ ctrl register bic ip, ip, #0x000f @ ............wcam bic ip, ip, #0x1100 @ ...i...s........ @@ -142,12 +147,16 @@ ENTRY(cpu_sa1100_dcache_clean_area) */ .align 5 ENTRY(cpu_sa1100_switch_mm) +#ifdef CONFIG_MMU str lr, [sp, #-4]! bl v4wb_flush_kern_cache_all @ clears IP mcr p15, 0, ip, c9, c0, 0 @ invalidate RB mcr p15, 0, r0, c2, c0, 0 @ load page table pointer mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs ldr pc, [sp], #4 +#else + mov pc, lr +#endif /* * cpu_sa1100_set_pte(ptep, pte) @@ -156,6 +165,7 @@ ENTRY(cpu_sa1100_switch_mm) */ .align 5 ENTRY(cpu_sa1100_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY @@ -177,6 +187,7 @@ ENTRY(cpu_sa1100_set_pte) mov r0, r0 mcr p15, 0, r0, c7, c10, 1 @ clean D entry mcr p15, 0, r0, c7, c10, 4 @ drain WB +#endif mov pc, lr __INIT @@ -186,12 +197,14 @@ __sa1100_setup: mov r0, #0 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 +#endif + adr r5, sa1100_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0 @ get control register v4 - ldr r5, sa1100_cr1_clear bic r0, r0, r5 - ldr r5, sa1100_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 mov pc, lr .size __sa1100_setup, . - __sa1100_setup @@ -201,12 +214,9 @@ __sa1100_setup: * ..11 0001 ..11 1101 * */ - .type sa1100_cr1_clear, #object - .type sa1100_cr1_set, #object -sa1100_cr1_clear: - .word 0x3f3f -sa1100_cr1_set: - .word 0x313d + .type sa1100_crval, #object +sa1100_crval: + crval clear=0x00003f3f, mmuset=0x0000313d, ucset=0x00001130 __INITDATA @@ -265,6 +275,9 @@ __sa1100_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __sa1100_setup .long cpu_arch_name .long cpu_elf_name @@ -285,6 +298,9 @@ __sa1110_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __sa1100_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index ee6f1529873..6f72549f884 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -2,6 +2,7 @@ * linux/arch/arm/mm/proc-v6.S * * Copyright (C) 2001 Deep Blue Solutions Ltd. + * Modified by Catalin Marinas for noMMU support * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -29,38 +30,6 @@ #define TTB_RGN_WT (2 << 3) #define TTB_RGN_WB (3 << 3) - .macro cpsie, flags - .ifc \flags, f - .long 0xf1080040 - .exitm - .endif - .ifc \flags, i - .long 0xf1080080 - .exitm - .endif - .ifc \flags, if - .long 0xf10800c0 - .exitm - .endif - .err - .endm - - .macro cpsid, flags - .ifc \flags, f - .long 0xf10c0040 - .exitm - .endif - .ifc \flags, i - .long 0xf10c0080 - .exitm - .endif - .ifc \flags, if - .long 0xf10c00c0 - .exitm - .endif - .err - .endm - ENTRY(cpu_v6_proc_init) mov pc, lr @@ -120,6 +89,7 @@ ENTRY(cpu_v6_dcache_clean_area) * - we are not using split page tables */ ENTRY(cpu_v6_switch_mm) +#ifdef CONFIG_MMU mov r2, #0 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id #ifdef CONFIG_SMP @@ -129,6 +99,7 @@ ENTRY(cpu_v6_switch_mm) mcr p15, 0, r2, c7, c10, 4 @ drain write buffer mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 mcr p15, 0, r1, c13, c0, 1 @ set context ID +#endif mov pc, lr /* @@ -151,6 +122,7 @@ ENTRY(cpu_v6_switch_mm) * 1111 0 1 1 r/w r/w */ ENTRY(cpu_v6_set_pte) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version bic r2, r1, #0x000003f0 @@ -177,6 +149,7 @@ ENTRY(cpu_v6_set_pte) str r2, [r0] mcr p15, 0, r0, c7, c10, 1 @ flush_pte +#endif mov pc, lr @@ -226,22 +199,24 @@ __v6_setup: mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache mcr p15, 0, r0, c7, c10, 4 @ drain write buffer +#ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs mcr p15, 0, r0, c2, c0, 2 @ TTB control register #ifdef CONFIG_SMP orr r4, r4, #TTB_RGN_WBWA|TTB_S @ mark PTWs shared, outer cacheable #endif mcr p15, 0, r4, c2, c0, 1 @ load TTB1 +#endif /* CONFIG_MMU */ #ifdef CONFIG_VFP mrc p15, 0, r0, c1, c0, 2 orr r0, r0, #(0xf << 20) mcr p15, 0, r0, c1, c0, 2 @ Enable full access to VFP #endif + adr r5, v6_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0, 0 @ read control register - ldr r5, v6_cr1_clear @ get mask for bits to clear bic r0, r0, r5 @ clear bits them - ldr r5, v6_cr1_set @ get mask for bits to set - orr r0, r0, r5 @ set them + orr r0, r0, r6 @ set them mov pc, lr @ return to head.S:__ret /* @@ -250,12 +225,9 @@ __v6_setup: * rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced * 0 110 0011 1.00 .111 1101 < we want */ - .type v6_cr1_clear, #object - .type v6_cr1_set, #object -v6_cr1_clear: - .word 0x01e0fb7f -v6_cr1_set: - .word 0x00c0387d + .type v6_crval, #object +v6_crval: + crval clear=0x01e0fb7f, mmuset=0x00c0387d, ucset=0x00c0187c .type v6_processor_functions, #object ENTRY(v6_processor_functions) @@ -294,6 +266,10 @@ __v6_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_XN | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __v6_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 8d32e21fe15..4ace2d8090c 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -426,23 +426,26 @@ __xsc3_setup: orr r0, r0, #(1 << 10) @ enable L2 for LLR cache #endif mcr p15, 0, r0, c1, c0, 1 @ set auxiliary control reg + + adr r5, xsc3_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0, 0 @ get control register - bic r0, r0, #0x0002 @ .... .... .... ..A. - orr r0, r0, #0x0005 @ .... .... .... .C.M + bic r0, r0, r5 @ .... .... .... ..A. + orr r0, r0, r6 @ .... .... .... .C.M #if BTB_ENABLE - bic r0, r0, #0x0200 @ .... ..R. .... .... - orr r0, r0, #0x3900 @ ..VI Z..S .... .... -#else - bic r0, r0, #0x0a00 @ .... Z.R. .... .... - orr r0, r0, #0x3100 @ ..VI ...S .... .... + orr r0, r0, #0x00000800 @ ..VI Z..S .... .... #endif #if L2_CACHE_ENABLE - orr r0, r0, #0x4000000 @ L2 enable + orr r0, r0, #0x04000000 @ L2 enable #endif mov pc, lr .size __xsc3_setup, . - __xsc3_setup + .type xsc3_crval, #object +xsc3_crval: + crval clear=0x04003b02, mmuset=0x00003105, ucset=0x00001100 + __INITDATA /* @@ -487,7 +490,14 @@ cpu_xsc3_name: __xsc3_proc_info: .long 0x69056000 .long 0xffffe000 - .long 0x00000c0e + .long PMD_TYPE_SECT | \ + PMD_SECT_BUFFERABLE | \ + PMD_SECT_CACHEABLE | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xsc3_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 29bcc4dd651..521538671f4 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -138,17 +138,23 @@ ENTRY(cpu_xscale_proc_fin) * to what would be the reset vector. * * loc: location to jump to for soft reset + * + * Beware PXA270 erratum E7. */ .align 5 ENTRY(cpu_xscale_reset) mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE msr cpsr_c, r1 @ reset CPSR + mcr p15, 0, r1, c10, c4, 1 @ unlock I-TLB + mcr p15, 0, r1, c8, c5, 0 @ invalidate I-TLB mrc p15, 0, r1, c1, c0, 0 @ ctrl register bic r1, r1, #0x0086 @ ........B....CA. bic r1, r1, #0x3900 @ ..VIZ..S........ + sub pc, pc, #4 @ flush pipeline + @ *** cache line aligned *** mcr p15, 0, r1, c1, c0, 0 @ ctrl register - mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB bic r1, r1, #0x0001 @ ...............M + mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB mcr p15, 0, r1, c1, c0, 0 @ ctrl register @ CAUTION: MMU turned off from this point. We count on the pipeline @ already containing those two last instructions to survive. @@ -475,11 +481,12 @@ __xscale_setup: orr r0, r0, #1 << 6 @ cp6 for IOP3xx and Bulverde orr r0, r0, #1 << 13 @ Its undefined whether this mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes + + adr r5, xscale_crval + ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0, 0 @ get control register - ldr r5, xscale_cr1_clear bic r0, r0, r5 - ldr r5, xscale_cr1_set - orr r0, r0, r5 + orr r0, r0, r6 mov pc, lr .size __xscale_setup, . - __xscale_setup @@ -489,12 +496,9 @@ __xscale_setup: * ..11 1.01 .... .101 * */ - .type xscale_cr1_clear, #object - .type xscale_cr1_set, #object -xscale_cr1_clear: - .word 0x3b07 -xscale_cr1_set: - .word 0x3905 + .type xscale_crval, #object +xscale_crval: + crval clear=0x00003b07, mmuset=0x00003905, ucset=0x00001900 __INITDATA @@ -595,6 +599,9 @@ __80200_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name @@ -615,6 +622,9 @@ __8032x_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name @@ -635,6 +645,9 @@ __8033x_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name @@ -655,6 +668,9 @@ __pxa250_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name @@ -675,6 +691,9 @@ __pxa210_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name @@ -695,6 +714,9 @@ __ixp2400_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name @@ -715,6 +737,9 @@ __ixp2800_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name @@ -735,6 +760,9 @@ __ixp42x_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name @@ -750,7 +778,14 @@ __ixp42x_proc_info: __ixp46x_proc_info: .long 0x69054200 .long 0xffffff00 - .long 0x00000c0e + .long PMD_TYPE_SECT | \ + PMD_SECT_BUFFERABLE | \ + PMD_SECT_CACHEABLE | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name @@ -771,6 +806,9 @@ __pxa255_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name @@ -791,6 +829,9 @@ __pxa270_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __xscale_setup .long cpu_arch_name .long cpu_elf_name diff --git a/arch/arm/nwfpe/entry26.S b/arch/arm/nwfpe/entry26.S index 51940a96d6a..3e6fb5d21d6 100644 --- a/arch/arm/nwfpe/entry26.S +++ b/arch/arm/nwfpe/entry26.S @@ -26,7 +26,7 @@ It is called from the kernel with code similar to this: mov fp, #0 - teqp pc, #PSR_I_BIT | MODE_SVC + teqp pc, #PSR_I_BIT | SVC_MODE ldr r4, .LC2 ldr pc, [r4] @ Call FP module USR entry point diff --git a/arch/arm/nwfpe/fpa11.c b/arch/arm/nwfpe/fpa11.c index 7b3d74d73c8..cc60acde84d 100644 --- a/arch/arm/nwfpe/fpa11.c +++ b/arch/arm/nwfpe/fpa11.c @@ -26,7 +26,6 @@ #include "fpmodule.h" #include "fpmodule.inl" -#include <linux/config.h> #include <linux/compiler.h> #include <linux/string.h> #include <asm/system.h> diff --git a/arch/arm/nwfpe/fpa11.h b/arch/arm/nwfpe/fpa11.h index 28cd79a451d..4a4d02c0911 100644 --- a/arch/arm/nwfpe/fpa11.h +++ b/arch/arm/nwfpe/fpa11.h @@ -31,7 +31,6 @@ */ #define GET_USERREG() ((struct pt_regs *)(THREAD_START_SP + (unsigned long)current_thread_info()) - 1) -#include <linux/config.h> #include <linux/thread_info.h> /* includes */ diff --git a/arch/arm/nwfpe/fpa11_cpdo.c b/arch/arm/nwfpe/fpa11_cpdo.c index 4a31dfd9406..2cebb152960 100644 --- a/arch/arm/nwfpe/fpa11_cpdo.c +++ b/arch/arm/nwfpe/fpa11_cpdo.c @@ -20,7 +20,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/config.h> #include "fpa11.h" #include "fpopcode.h" diff --git a/arch/arm/nwfpe/fpa11_cpdt.c b/arch/arm/nwfpe/fpa11_cpdt.c index 32859fa8dcf..79f8e67cc6c 100644 --- a/arch/arm/nwfpe/fpa11_cpdt.c +++ b/arch/arm/nwfpe/fpa11_cpdt.c @@ -20,7 +20,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/config.h> #include "fpa11.h" #include "softfloat.h" #include "fpopcode.h" diff --git a/arch/arm/nwfpe/fpa11_cprt.c b/arch/arm/nwfpe/fpa11_cprt.c index 7c67023655e..9843dc53304 100644 --- a/arch/arm/nwfpe/fpa11_cprt.c +++ b/arch/arm/nwfpe/fpa11_cprt.c @@ -20,7 +20,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/config.h> #include "fpa11.h" #include "fpopcode.h" #include "fpa11.inl" diff --git a/arch/arm/nwfpe/fpmodule.c b/arch/arm/nwfpe/fpmodule.c index 2dfe1ac42ee..4c0ab50f399 100644 --- a/arch/arm/nwfpe/fpmodule.c +++ b/arch/arm/nwfpe/fpmodule.c @@ -24,7 +24,6 @@ #include "fpa11.h" #include <linux/module.h> -#include <linux/config.h> /* XXX */ #include <linux/errno.h> @@ -33,7 +32,8 @@ #include <linux/signal.h> #include <linux/sched.h> #include <linux/init.h> -/* XXX */ + +#include <asm/thread_notify.h> #include "softfloat.h" #include "fpopcode.h" @@ -56,16 +56,28 @@ void fp_send_sig(unsigned long sig, struct task_struct *p, int priv); extern char fpe_type[]; #endif +static int nwfpe_notify(struct notifier_block *self, unsigned long cmd, void *v) +{ + struct thread_info *thread = v; + + if (cmd == THREAD_NOTIFY_FLUSH) + nwfpe_init_fpa(&thread->fpstate); + + return NOTIFY_DONE; +} + +static struct notifier_block nwfpe_notifier_block = { + .notifier_call = nwfpe_notify, +}; + /* kernel function prototypes required */ void fp_setup(void); /* external declarations for saved kernel symbols */ extern void (*kern_fp_enter)(void); -extern void (*fp_init)(union fp_state *); /* Original value of fp_enter from kernel before patched by fpe_init. */ static void (*orig_fp_enter)(void); -static void (*orig_fp_init)(union fp_state *); /* forward declarations */ extern void nwfpe_enter(void); @@ -88,20 +100,20 @@ static int __init fpe_init(void) printk(KERN_WARNING "NetWinder Floating Point Emulator V0.97 (" NWFPE_BITS " precision)\n"); + thread_register_notifier(&nwfpe_notifier_block); + /* Save pointer to the old FP handler and then patch ourselves in */ orig_fp_enter = kern_fp_enter; - orig_fp_init = fp_init; kern_fp_enter = nwfpe_enter; - fp_init = nwfpe_init_fpa; return 0; } static void __exit fpe_exit(void) { + thread_unregister_notifier(&nwfpe_notifier_block); /* Restore the values we saved earlier. */ kern_fp_enter = orig_fp_enter; - fp_init = orig_fp_init; } /* diff --git a/arch/arm/nwfpe/fpopcode.c b/arch/arm/nwfpe/fpopcode.c index 67ff2ab08ea..922b8110758 100644 --- a/arch/arm/nwfpe/fpopcode.c +++ b/arch/arm/nwfpe/fpopcode.c @@ -19,7 +19,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/config.h> #include "fpa11.h" #include "softfloat.h" #include "fpopcode.h" diff --git a/arch/arm/nwfpe/fpopcode.h b/arch/arm/nwfpe/fpopcode.h index 6528e081c83..ec78e3517fc 100644 --- a/arch/arm/nwfpe/fpopcode.h +++ b/arch/arm/nwfpe/fpopcode.h @@ -23,7 +23,6 @@ #ifndef __FPOPCODE_H__ #define __FPOPCODE_H__ -#include <linux/config.h> /* ARM Floating Point Instruction Classes diff --git a/arch/arm/nwfpe/softfloat.h b/arch/arm/nwfpe/softfloat.h index 978c699673c..e1125bc39ee 100644 --- a/arch/arm/nwfpe/softfloat.h +++ b/arch/arm/nwfpe/softfloat.h @@ -32,7 +32,6 @@ this code that are retained. #ifndef __SOFTFLOAT_H__ #define __SOFTFLOAT_H__ -#include <linux/config.h> /* ------------------------------------------------------------------------------- diff --git a/arch/arm/oprofile/op_model_xscale.c b/arch/arm/oprofile/op_model_xscale.c index e0f0b320d76..34fdc733743 100644 --- a/arch/arm/oprofile/op_model_xscale.c +++ b/arch/arm/oprofile/op_model_xscale.c @@ -384,7 +384,7 @@ static int xscale_pmu_start(void) int ret; u32 pmnc = read_pmnc(); - ret = request_irq(XSCALE_PMU_IRQ, xscale_pmu_interrupt, SA_INTERRUPT, + ret = request_irq(XSCALE_PMU_IRQ, xscale_pmu_interrupt, IRQF_DISABLED, "XScale PMU", (void *)results); if (ret < 0) { diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index ec49495e651..ec752e16d61 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -91,7 +91,7 @@ config OMAP_32K_TIMER_HZ config OMAP_DM_TIMER bool "Use dual-mode timer" - depends on ARCH_OMAP16XX + depends on ARCH_OMAP16XX || ARCH_OMAP24XX help Select this option if you want to use OMAP Dual-Mode timers. diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 32ec04c58bc..7f45c7c3e67 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c @@ -11,7 +11,6 @@ * published by the Free Software Foundation. */ #include <linux/version.h> -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/module.h> @@ -28,9 +27,9 @@ #include <asm/arch/clock.h> -LIST_HEAD(clocks); +static LIST_HEAD(clocks); static DEFINE_MUTEX(clocks_mutex); -DEFINE_SPINLOCK(clockfw_lock); +static DEFINE_SPINLOCK(clockfw_lock); static struct clk_functions *arch_clock; diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index adffc5a859e..57b7b93674a 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -7,7 +7,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c index 98edc9fdd6d..a0c71dca237 100644 --- a/arch/arm/plat-omap/cpu-omap.c +++ b/arch/arm/plat-omap/cpu-omap.c @@ -25,6 +25,14 @@ #include <asm/io.h> #include <asm/system.h> +#define VERY_HI_RATE 900000000 + +#ifdef CONFIG_ARCH_OMAP1 +#define MPU_CLK "mpu" +#else +#define MPU_CLK "virt_prcm_set" +#endif + /* TODO: Add support for SDRAM timing changes */ int omap_verify_speed(struct cpufreq_policy *policy) @@ -36,7 +44,7 @@ int omap_verify_speed(struct cpufreq_policy *policy) cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); - mpu_clk = clk_get(NULL, "mpu"); + mpu_clk = clk_get(NULL, MPU_CLK); if (IS_ERR(mpu_clk)) return PTR_ERR(mpu_clk); policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; @@ -56,7 +64,7 @@ unsigned int omap_getspeed(unsigned int cpu) if (cpu) return 0; - mpu_clk = clk_get(NULL, "mpu"); + mpu_clk = clk_get(NULL, MPU_CLK); if (IS_ERR(mpu_clk)) return 0; rate = clk_get_rate(mpu_clk) / 1000; @@ -73,7 +81,7 @@ static int omap_target(struct cpufreq_policy *policy, struct cpufreq_freqs freqs; int ret = 0; - mpu_clk = clk_get(NULL, "mpu"); + mpu_clk = clk_get(NULL, MPU_CLK); if (IS_ERR(mpu_clk)) return PTR_ERR(mpu_clk); @@ -93,7 +101,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy) { struct clk * mpu_clk; - mpu_clk = clk_get(NULL, "mpu"); + mpu_clk = clk_get(NULL, MPU_CLK); if (IS_ERR(mpu_clk)) return PTR_ERR(mpu_clk); @@ -102,7 +110,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy) policy->cur = policy->min = policy->max = omap_getspeed(0); policy->governor = CPUFREQ_DEFAULT_GOVERNOR; policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; - policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, 216000000) / 1000; + policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, VERY_HI_RATE) / 1000; policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; clk_put(mpu_clk); diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index 5d5d6eb222d..1812f237d12 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c @@ -9,7 +9,6 @@ * (at your option) any later version. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -105,7 +104,7 @@ static void omap_init_kp(void) omap_cfg_reg(E20_1610_KBR3); omap_cfg_reg(E19_1610_KBR4); omap_cfg_reg(N19_1610_KBR5); - } else if (machine_is_omap_perseus2()) { + } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { omap_cfg_reg(E2_730_KBR0); omap_cfg_reg(J7_730_KBR1); omap_cfg_reg(E1_730_KBR2); @@ -162,8 +161,8 @@ static u64 mmc1_dmamask = 0xffffffff; static struct resource mmc1_resources[] = { { - .start = IO_ADDRESS(OMAP_MMC1_BASE), - .end = IO_ADDRESS(OMAP_MMC1_BASE) + 0x7f, + .start = OMAP_MMC1_BASE, + .end = OMAP_MMC1_BASE + 0x7f, .flags = IORESOURCE_MEM, }, { @@ -191,8 +190,8 @@ static u64 mmc2_dmamask = 0xffffffff; static struct resource mmc2_resources[] = { { - .start = IO_ADDRESS(OMAP_MMC2_BASE), - .end = IO_ADDRESS(OMAP_MMC2_BASE) + 0x7f, + .start = OMAP_MMC2_BASE, + .end = OMAP_MMC2_BASE + 0x7f, .flags = IORESOURCE_MEM, }, { diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 5dac4230360..9eddc950714 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -24,9 +24,9 @@ #include <linux/spinlock.h> #include <linux/errno.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <asm/system.h> -#include <asm/irq.h> #include <asm/hardware.h> #include <asm/dma.h> #include <asm/io.h> @@ -43,6 +43,7 @@ #define OMAP_DMA_ACTIVE 0x01 #define OMAP_DMA_CCR_EN (1 << 7) +#define OMAP2_DMA_CSR_CLEAR_MASK 0xffe #define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec) @@ -166,18 +167,24 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, if (cpu_is_omap24xx() && dma_trigger) { u32 val = OMAP_DMA_CCR_REG(lch); + val &= ~(3 << 19); if (dma_trigger > 63) val |= 1 << 20; if (dma_trigger > 31) val |= 1 << 19; + val &= ~(0x1f); val |= (dma_trigger & 0x1f); if (sync_mode & OMAP_DMA_SYNC_FRAME) val |= 1 << 5; + else + val &= ~(1 << 5); if (sync_mode & OMAP_DMA_SYNC_BLOCK) val |= 1 << 18; + else + val &= ~(1 << 18); if (src_or_dst_synch) val |= 1 << 24; /* source synch */ @@ -286,22 +293,39 @@ void omap_set_dma_src_data_pack(int lch, int enable) void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) { + unsigned int burst = 0; OMAP_DMA_CSDP_REG(lch) &= ~(0x03 << 7); switch (burst_mode) { case OMAP_DMA_DATA_BURST_DIS: break; case OMAP_DMA_DATA_BURST_4: - OMAP_DMA_CSDP_REG(lch) |= (0x02 << 7); + if (cpu_is_omap24xx()) + burst = 0x1; + else + burst = 0x2; break; case OMAP_DMA_DATA_BURST_8: - /* not supported by current hardware + if (cpu_is_omap24xx()) { + burst = 0x2; + break; + } + /* not supported by current hardware on OMAP1 * w |= (0x03 << 7); * fall through */ + case OMAP_DMA_DATA_BURST_16: + if (cpu_is_omap24xx()) { + burst = 0x3; + break; + } + /* OMAP1 don't support burst 16 + * fall through + */ default: BUG(); } + OMAP_DMA_CSDP_REG(lch) |= (burst << 7); } /* Note that dest_port is only for OMAP1 */ @@ -348,30 +372,49 @@ void omap_set_dma_dest_data_pack(int lch, int enable) void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) { + unsigned int burst = 0; OMAP_DMA_CSDP_REG(lch) &= ~(0x03 << 14); switch (burst_mode) { case OMAP_DMA_DATA_BURST_DIS: break; case OMAP_DMA_DATA_BURST_4: - OMAP_DMA_CSDP_REG(lch) |= (0x02 << 14); + if (cpu_is_omap24xx()) + burst = 0x1; + else + burst = 0x2; break; case OMAP_DMA_DATA_BURST_8: - OMAP_DMA_CSDP_REG(lch) |= (0x03 << 14); + if (cpu_is_omap24xx()) + burst = 0x2; + else + burst = 0x3; break; + case OMAP_DMA_DATA_BURST_16: + if (cpu_is_omap24xx()) { + burst = 0x3; + break; + } + /* OMAP1 don't support burst 16 + * fall through + */ default: printk(KERN_ERR "Invalid DMA burst mode\n"); BUG(); return; } + OMAP_DMA_CSDP_REG(lch) |= (burst << 14); } static inline void omap_enable_channel_irq(int lch) { u32 status; - /* Read CSR to make sure it's cleared. */ - status = OMAP_DMA_CSR_REG(lch); + /* Clear CSR */ + if (cpu_class_is_omap1()) + status = OMAP_DMA_CSR_REG(lch); + else if (cpu_is_omap24xx()) + OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK; /* Enable some nice interrupts. */ OMAP_DMA_CICR_REG(lch) = dma_chan[lch].enabled_irqs; @@ -470,11 +513,13 @@ int omap_request_dma(int dev_id, const char *dev_name, chan->dev_name = dev_name; chan->callback = callback; chan->data = data; - chan->enabled_irqs = OMAP_DMA_TOUT_IRQ | OMAP_DMA_DROP_IRQ | - OMAP_DMA_BLOCK_IRQ; + chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; - if (cpu_is_omap24xx()) - chan->enabled_irqs |= OMAP2_DMA_TRANS_ERR_IRQ; + if (cpu_class_is_omap1()) + chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ; + else if (cpu_is_omap24xx()) + chan->enabled_irqs |= OMAP2_DMA_MISALIGNED_ERR_IRQ | + OMAP2_DMA_TRANS_ERR_IRQ; if (cpu_is_omap16xx()) { /* If the sync device is set, configure it dynamically. */ @@ -494,7 +539,7 @@ int omap_request_dma(int dev_id, const char *dev_name, omap_enable_channel_irq(free_ch); /* Clear the CSR register and IRQ status register */ - OMAP_DMA_CSR_REG(free_ch) = 0x0; + OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK; omap_writel(~0x0, OMAP_DMA4_IRQSTATUS_L0); } @@ -534,7 +579,7 @@ void omap_free_dma(int lch) omap_writel(val, OMAP_DMA4_IRQENABLE_L0); /* Clear the CSR register and IRQ status register */ - OMAP_DMA_CSR_REG(lch) = 0x0; + OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK; val = omap_readl(OMAP_DMA4_IRQSTATUS_L0); val |= 1 << lch; @@ -798,7 +843,7 @@ static int omap1_dma_handle_ch(int ch) "%d (CSR %04x)\n", ch, csr); return 0; } - if (unlikely(csr & OMAP_DMA_TOUT_IRQ)) + if (unlikely(csr & OMAP1_DMA_TOUT_IRQ)) printk(KERN_WARNING "DMA timeout with device %d\n", dma_chan[ch].dev_id); if (unlikely(csr & OMAP_DMA_DROP_IRQ)) @@ -846,20 +891,21 @@ static int omap2_dma_handle_ch(int ch) return 0; if (unlikely(dma_chan[ch].dev_id == -1)) return 0; - /* REVISIT: According to 24xx TRM, there's no TOUT_IE */ - if (unlikely(status & OMAP_DMA_TOUT_IRQ)) - printk(KERN_INFO "DMA timeout with device %d\n", - dma_chan[ch].dev_id); if (unlikely(status & OMAP_DMA_DROP_IRQ)) printk(KERN_INFO "DMA synchronization event drop occurred with device " "%d\n", dma_chan[ch].dev_id); - if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ)) printk(KERN_INFO "DMA transaction error with device %d\n", dma_chan[ch].dev_id); + if (unlikely(status & OMAP2_DMA_SECURE_ERR_IRQ)) + printk(KERN_INFO "DMA secure error with device %d\n", + dma_chan[ch].dev_id); + if (unlikely(status & OMAP2_DMA_MISALIGNED_ERR_IRQ)) + printk(KERN_INFO "DMA misaligned error with device %d\n", + dma_chan[ch].dev_id); - OMAP_DMA_CSR_REG(ch) = 0x20; + OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK; val = omap_readl(OMAP_DMA4_IRQSTATUS_L0); /* ch in this function is from 0-31 while in register it is 1-32 */ @@ -893,7 +939,7 @@ static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id, static struct irqaction omap24xx_dma_irq = { .name = "DMA", .handler = omap2_dma_irq_handler, - .flags = SA_INTERRUPT + .flags = IRQF_DISABLED }; #else diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index eba3cb52ad8..50524436de6 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -4,7 +4,8 @@ * OMAP Dual-Mode Timers * * Copyright (C) 2005 Nokia Corporation - * Author: Lauri Leukkunen <lauri.leukkunen@nokia.com> + * OMAP2 support by Juha Yrjola + * API improvements and OMAP2 clock framework support by Timo Teras * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -26,15 +27,17 @@ */ #include <linux/init.h> +#include <linux/spinlock.h> +#include <linux/errno.h> +#include <linux/list.h> +#include <linux/clk.h> +#include <linux/delay.h> #include <asm/hardware.h> #include <asm/arch/dmtimer.h> #include <asm/io.h> #include <asm/arch/irqs.h> -#include <linux/spinlock.h> -#include <linux/list.h> - -#define OMAP_TIMER_COUNT 8 +/* register offsets */ #define OMAP_TIMER_ID_REG 0x00 #define OMAP_TIMER_OCP_CFG_REG 0x10 #define OMAP_TIMER_SYS_STAT_REG 0x14 @@ -50,52 +53,196 @@ #define OMAP_TIMER_CAPTURE_REG 0x3c #define OMAP_TIMER_IF_CTRL_REG 0x40 +/* timer control reg bits */ +#define OMAP_TIMER_CTRL_GPOCFG (1 << 14) +#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) +#define OMAP_TIMER_CTRL_PT (1 << 12) +#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) +#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) +#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) +#define OMAP_TIMER_CTRL_SCPWM (1 << 7) +#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */ +#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */ +#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* how much to shift the prescaler value */ +#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */ +#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */ + +struct omap_dm_timer { + unsigned long phys_base; + int irq; +#ifdef CONFIG_ARCH_OMAP2 + struct clk *iclk, *fclk; +#endif + void __iomem *io_base; + unsigned reserved:1; +}; -static struct dmtimer_info_struct { - struct list_head unused_timers; - struct list_head reserved_timers; -} dm_timer_info; +#ifdef CONFIG_ARCH_OMAP1 static struct omap_dm_timer dm_timers[] = { - { .base=0xfffb1400, .irq=INT_1610_GPTIMER1 }, - { .base=0xfffb1c00, .irq=INT_1610_GPTIMER2 }, - { .base=0xfffb2400, .irq=INT_1610_GPTIMER3 }, - { .base=0xfffb2c00, .irq=INT_1610_GPTIMER4 }, - { .base=0xfffb3400, .irq=INT_1610_GPTIMER5 }, - { .base=0xfffb3c00, .irq=INT_1610_GPTIMER6 }, - { .base=0xfffb4400, .irq=INT_1610_GPTIMER7 }, - { .base=0xfffb4c00, .irq=INT_1610_GPTIMER8 }, - { .base=0x0 }, + { .phys_base = 0xfffb1400, .irq = INT_1610_GPTIMER1 }, + { .phys_base = 0xfffb1c00, .irq = INT_1610_GPTIMER2 }, + { .phys_base = 0xfffb2400, .irq = INT_1610_GPTIMER3 }, + { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 }, + { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 }, + { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 }, + { .phys_base = 0xfffb4400, .irq = INT_1610_GPTIMER7 }, + { .phys_base = 0xfffb4c00, .irq = INT_1610_GPTIMER8 }, }; +#elif defined(CONFIG_ARCH_OMAP2) + +static struct omap_dm_timer dm_timers[] = { + { .phys_base = 0x48028000, .irq = INT_24XX_GPTIMER1 }, + { .phys_base = 0x4802a000, .irq = INT_24XX_GPTIMER2 }, + { .phys_base = 0x48078000, .irq = INT_24XX_GPTIMER3 }, + { .phys_base = 0x4807a000, .irq = INT_24XX_GPTIMER4 }, + { .phys_base = 0x4807c000, .irq = INT_24XX_GPTIMER5 }, + { .phys_base = 0x4807e000, .irq = INT_24XX_GPTIMER6 }, + { .phys_base = 0x48080000, .irq = INT_24XX_GPTIMER7 }, + { .phys_base = 0x48082000, .irq = INT_24XX_GPTIMER8 }, + { .phys_base = 0x48084000, .irq = INT_24XX_GPTIMER9 }, + { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 }, + { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 }, + { .phys_base = 0x4808a000, .irq = INT_24XX_GPTIMER12 }, +}; + +static const char *dm_source_names[] = { + "sys_ck", + "func_32k_ck", + "alt_ck" +}; +static struct clk *dm_source_clocks[3]; + +#else + +#error OMAP architecture not supported! + +#endif + +static const int dm_timer_count = ARRAY_SIZE(dm_timers); static spinlock_t dm_timer_lock; +static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg) +{ + return readl(timer->io_base + reg); +} -inline void omap_dm_timer_write_reg(struct omap_dm_timer *timer, int reg, u32 value) +static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, int reg, u32 value) { - omap_writel(value, timer->base + reg); + writel(value, timer->io_base + reg); while (omap_dm_timer_read_reg(timer, OMAP_TIMER_WRITE_PEND_REG)) ; } -u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg) +static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) { - return omap_readl(timer->base + reg); + int c; + + c = 0; + while (!(omap_dm_timer_read_reg(timer, OMAP_TIMER_SYS_STAT_REG) & 1)) { + c++; + if (c > 100000) { + printk(KERN_ERR "Timer failed to reset\n"); + return; + } + } } -int omap_dm_timers_active(void) +static void omap_dm_timer_reset(struct omap_dm_timer *timer) +{ + u32 l; + + if (timer != &dm_timers[0]) { + omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); + omap_dm_timer_wait_for_reset(timer); + } + omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_SYS_CLK); + + /* Set to smart-idle mode */ + l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG); + l |= 0x02 << 3; + omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l); +} + +static void omap_dm_timer_prepare(struct omap_dm_timer *timer) +{ +#ifdef CONFIG_ARCH_OMAP2 + clk_enable(timer->iclk); + clk_enable(timer->fclk); +#endif + omap_dm_timer_reset(timer); +} + +struct omap_dm_timer *omap_dm_timer_request(void) +{ + struct omap_dm_timer *timer = NULL; + unsigned long flags; + int i; + + spin_lock_irqsave(&dm_timer_lock, flags); + for (i = 0; i < dm_timer_count; i++) { + if (dm_timers[i].reserved) + continue; + + timer = &dm_timers[i]; + timer->reserved = 1; + break; + } + spin_unlock_irqrestore(&dm_timer_lock, flags); + + if (timer != NULL) + omap_dm_timer_prepare(timer); + + return timer; +} + +struct omap_dm_timer *omap_dm_timer_request_specific(int id) { struct omap_dm_timer *timer; + unsigned long flags; - for (timer = &dm_timers[0]; timer->base; ++timer) - if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) & - OMAP_TIMER_CTRL_ST) - return 1; + spin_lock_irqsave(&dm_timer_lock, flags); + if (id <= 0 || id > dm_timer_count || dm_timers[id-1].reserved) { + spin_unlock_irqrestore(&dm_timer_lock, flags); + printk("BUG: warning at %s:%d/%s(): unable to get timer %d\n", + __FILE__, __LINE__, __FUNCTION__, id); + dump_stack(); + return NULL; + } - return 0; + timer = &dm_timers[id-1]; + timer->reserved = 1; + spin_unlock_irqrestore(&dm_timer_lock, flags); + + omap_dm_timer_prepare(timer); + + return timer; } +void omap_dm_timer_free(struct omap_dm_timer *timer) +{ + omap_dm_timer_reset(timer); +#ifdef CONFIG_ARCH_OMAP2 + clk_disable(timer->iclk); + clk_disable(timer->fclk); +#endif + WARN_ON(!timer->reserved); + timer->reserved = 0; +} + +int omap_dm_timer_get_irq(struct omap_dm_timer *timer) +{ + return timer->irq; +} + +#if defined(CONFIG_ARCH_OMAP1) + +struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) +{ + BUG(); +} /** * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR @@ -103,184 +250,229 @@ int omap_dm_timers_active(void) */ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) { - int n; + int i; /* If ARMXOR cannot be idled this function call is unnecessary */ if (!(inputmask & (1 << 1))) return inputmask; /* If any active timer is using ARMXOR return modified mask */ - for (n = 0; dm_timers[n].base; ++n) - if (omap_dm_timer_read_reg(&dm_timers[n], OMAP_TIMER_CTRL_REG)& - OMAP_TIMER_CTRL_ST) { - if (((omap_readl(MOD_CONF_CTRL_1)>>(n*2)) & 0x03) == 0) + for (i = 0; i < dm_timer_count; i++) { + u32 l; + + l = omap_dm_timer_read_reg(&dm_timers[i], OMAP_TIMER_CTRL_REG); + if (l & OMAP_TIMER_CTRL_ST) { + if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0) inputmask &= ~(1 << 1); else inputmask &= ~(1 << 2); } + } return inputmask; } +#elif defined(CONFIG_ARCH_OMAP2) -void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) +struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) { - int n = (timer - dm_timers) << 1; - u32 l; + return timer->fclk; +} - l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); - l |= source << n; - omap_writel(l, MOD_CONF_CTRL_1); +__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) +{ + BUG(); } +#endif -static void omap_dm_timer_reset(struct omap_dm_timer *timer) +void omap_dm_timer_trigger(struct omap_dm_timer *timer) { - /* Reset and set posted mode */ - omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); - omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, 0x02); - - omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_ARMXOR); + omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); } +void omap_dm_timer_start(struct omap_dm_timer *timer) +{ + u32 l; + l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); + if (!(l & OMAP_TIMER_CTRL_ST)) { + l |= OMAP_TIMER_CTRL_ST; + omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); + } +} -struct omap_dm_timer * omap_dm_timer_request(void) +void omap_dm_timer_stop(struct omap_dm_timer *timer) { - struct omap_dm_timer *timer = NULL; - unsigned long flags; + u32 l; - spin_lock_irqsave(&dm_timer_lock, flags); - if (!list_empty(&dm_timer_info.unused_timers)) { - timer = (struct omap_dm_timer *) - dm_timer_info.unused_timers.next; - list_move_tail((struct list_head *)timer, - &dm_timer_info.reserved_timers); + l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); + if (l & OMAP_TIMER_CTRL_ST) { + l &= ~0x1; + omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); } - spin_unlock_irqrestore(&dm_timer_lock, flags); - - return timer; } +#ifdef CONFIG_ARCH_OMAP1 -void omap_dm_timer_free(struct omap_dm_timer *timer) +void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) { - unsigned long flags; - - omap_dm_timer_reset(timer); + int n = (timer - dm_timers) << 1; + u32 l; - spin_lock_irqsave(&dm_timer_lock, flags); - list_move_tail((struct list_head *)timer, &dm_timer_info.unused_timers); - spin_unlock_irqrestore(&dm_timer_lock, flags); + l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); + l |= source << n; + omap_writel(l, MOD_CONF_CTRL_1); } -void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, - unsigned int value) -{ - omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value); -} +#else -unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) +void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) { - return omap_dm_timer_read_reg(timer, OMAP_TIMER_STAT_REG); -} + if (source < 0 || source >= 3) + return; -void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) -{ - omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value); + clk_disable(timer->fclk); + clk_set_parent(timer->fclk, dm_source_clocks[source]); + clk_enable(timer->fclk); + + /* When the functional clock disappears, too quick writes seem to + * cause an abort. */ + __delay(15000); } -void omap_dm_timer_enable_autoreload(struct omap_dm_timer *timer) +#endif + +void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, + unsigned int load) { u32 l; + l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); - l |= OMAP_TIMER_CTRL_AR; + if (autoreload) + l |= OMAP_TIMER_CTRL_AR; + else + l &= ~OMAP_TIMER_CTRL_AR; omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); + omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); + omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); } -void omap_dm_timer_trigger(struct omap_dm_timer *timer) -{ - omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 1); -} - -void omap_dm_timer_set_trigger(struct omap_dm_timer *timer, unsigned int value) +void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, + unsigned int match) { u32 l; l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); - l |= value & 0x3; + if (enable) + l |= OMAP_TIMER_CTRL_CE; + else + l &= ~OMAP_TIMER_CTRL_CE; omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); + omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match); } -void omap_dm_timer_start(struct omap_dm_timer *timer) + +void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, + int toggle, int trigger) { u32 l; l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); - l |= OMAP_TIMER_CTRL_ST; + l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM | + OMAP_TIMER_CTRL_PT | (0x03 << 10)); + if (def_on) + l |= OMAP_TIMER_CTRL_SCPWM; + if (toggle) + l |= OMAP_TIMER_CTRL_PT; + l |= trigger << 10; omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); } -void omap_dm_timer_stop(struct omap_dm_timer *timer) +void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) { u32 l; l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); - l &= ~0x1; + l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2)); + if (prescaler >= 0x00 && prescaler <= 0x07) { + l |= OMAP_TIMER_CTRL_PRE; + l |= prescaler << 2; + } omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); } -unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) +void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, + unsigned int value) { - return omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG); + omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value); } -void omap_dm_timer_reset_counter(struct omap_dm_timer *timer) +unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) { - omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, 0); + return omap_dm_timer_read_reg(timer, OMAP_TIMER_STAT_REG); } -void omap_dm_timer_set_load(struct omap_dm_timer *timer, unsigned int load) +void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) { - omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); + omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value); } -void omap_dm_timer_set_match(struct omap_dm_timer *timer, unsigned int match) +unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) { - omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match); + return omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG); } -void omap_dm_timer_enable_compare(struct omap_dm_timer *timer) +void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value) { - u32 l; - - l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); - l |= OMAP_TIMER_CTRL_CE; - omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); + return omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value); } +int omap_dm_timers_active(void) +{ + int i; + + for (i = 0; i < dm_timer_count; i++) { + struct omap_dm_timer *timer; + + timer = &dm_timers[i]; + if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) & + OMAP_TIMER_CTRL_ST) + return 1; + } + return 0; +} -static inline void __dm_timer_init(void) +int omap_dm_timer_init(void) { struct omap_dm_timer *timer; + int i; + + if (!(cpu_is_omap16xx() || cpu_is_omap24xx())) + return -ENODEV; spin_lock_init(&dm_timer_lock); - INIT_LIST_HEAD(&dm_timer_info.unused_timers); - INIT_LIST_HEAD(&dm_timer_info.reserved_timers); - - timer = &dm_timers[0]; - while (timer->base) { - list_add_tail((struct list_head *)timer, &dm_timer_info.unused_timers); - omap_dm_timer_reset(timer); - timer++; +#ifdef CONFIG_ARCH_OMAP2 + for (i = 0; i < ARRAY_SIZE(dm_source_names); i++) { + dm_source_clocks[i] = clk_get(NULL, dm_source_names[i]); + BUG_ON(dm_source_clocks[i] == NULL); + } +#endif + + for (i = 0; i < dm_timer_count; i++) { +#ifdef CONFIG_ARCH_OMAP2 + char clk_name[16]; +#endif + + timer = &dm_timers[i]; + timer->io_base = (void __iomem *) io_p2v(timer->phys_base); +#ifdef CONFIG_ARCH_OMAP2 + sprintf(clk_name, "gpt%d_ick", i + 1); + timer->iclk = clk_get(NULL, clk_name); + sprintf(clk_name, "gpt%d_fck", i + 1); + timer->fclk = clk_get(NULL, clk_name); +#endif } -} -static int __init omap_dm_timer_init(void) -{ - if (cpu_is_omap16xx()) - __dm_timer_init(); return 0; } - -arch_initcall(omap_dm_timer_init); diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c index 305e9b990b7..56acb8720f7 100644 --- a/arch/arm/plat-omap/fb.c +++ b/arch/arm/plat-omap/fb.c @@ -1,4 +1,3 @@ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index d3c8ea7eecf..fec7970e564 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -11,7 +11,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/module.h> #include <linux/sched.h> @@ -537,6 +536,49 @@ static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) _clear_gpio_irqbank(bank, 1 << get_gpio_index(gpio)); } +static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) +{ + void __iomem *reg = bank->base; + int inv = 0; + u32 l; + u32 mask; + + switch (bank->method) { + case METHOD_MPUIO: + reg += OMAP_MPUIO_GPIO_MASKIT; + mask = 0xffff; + inv = 1; + break; + case METHOD_GPIO_1510: + reg += OMAP1510_GPIO_INT_MASK; + mask = 0xffff; + inv = 1; + break; + case METHOD_GPIO_1610: + reg += OMAP1610_GPIO_IRQENABLE1; + mask = 0xffff; + break; + case METHOD_GPIO_730: + reg += OMAP730_GPIO_INT_MASK; + mask = 0xffffffff; + inv = 1; + break; + case METHOD_GPIO_24XX: + reg += OMAP24XX_GPIO_IRQENABLE1; + mask = 0xffffffff; + break; + default: + BUG(); + return 0; + } + + l = __raw_readl(reg); + if (inv) + l = ~l; + l &= mask; + return l; +} + static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enable) { void __iomem *reg = bank->base; @@ -736,10 +778,12 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc, u32 isr; unsigned int gpio_irq; struct gpio_bank *bank; + u32 retrigger = 0; + int unmasked = 0; desc->chip->ack(irq); - bank = (struct gpio_bank *) desc->data; + bank = get_irq_data(irq); if (bank->method == METHOD_MPUIO) isr_reg = bank->base + OMAP_MPUIO_GPIO_INT; #ifdef CONFIG_ARCH_OMAP15XX @@ -760,18 +804,22 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc, #endif while(1) { u32 isr_saved, level_mask = 0; + u32 enabled; - isr_saved = isr = __raw_readl(isr_reg); + enabled = _get_gpio_irqbank_mask(bank); + isr_saved = isr = __raw_readl(isr_reg) & enabled; if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO)) isr &= 0x0000ffff; - if (cpu_is_omap24xx()) + if (cpu_is_omap24xx()) { level_mask = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) | __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); + level_mask &= enabled; + } /* clear edge sensitive interrupts before handler(s) are called so that we don't miss any interrupt occurred while @@ -782,19 +830,55 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc, /* if there is only edge sensitive GPIO pin interrupts configured, we could unmask GPIO bank interrupt immediately */ - if (!level_mask) + if (!level_mask && !unmasked) { + unmasked = 1; desc->chip->unmask(irq); + } + isr |= retrigger; + retrigger = 0; if (!isr) break; gpio_irq = bank->virtual_irq_start; for (; isr != 0; isr >>= 1, gpio_irq++) { struct irqdesc *d; + int irq_mask; if (!(isr & 1)) continue; d = irq_desc + gpio_irq; + /* Don't run the handler if it's already running + * or was disabled lazely. + */ + if (unlikely((d->depth || + (d->status & IRQ_INPROGRESS)))) { + irq_mask = 1 << + (gpio_irq - bank->virtual_irq_start); + /* The unmasking will be done by + * enable_irq in case it is disabled or + * after returning from the handler if + * it's already running. + */ + _enable_gpio_irqbank(bank, irq_mask, 0); + if (!d->depth) { + /* Level triggered interrupts + * won't ever be reentered + */ + BUG_ON(level_mask & irq_mask); + d->status |= IRQ_PENDING; + } + continue; + } + desc_handle_irq(gpio_irq, d, regs); + + if (unlikely((d->status & IRQ_PENDING) && !d->depth)) { + irq_mask = 1 << + (gpio_irq - bank->virtual_irq_start); + d->status &= ~IRQ_PENDING; + _enable_gpio_irqbank(bank, irq_mask, 1); + retrigger |= irq_mask; + } } if (cpu_is_omap24xx()) { @@ -804,13 +888,14 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc, _enable_gpio_irqbank(bank, isr_saved & level_mask, 1); } - /* if bank has any level sensitive GPIO pin interrupt - configured, we must unmask the bank interrupt only after - handler(s) are executed in order to avoid spurious bank - interrupt */ - if (level_mask) - desc->chip->unmask(irq); } + /* if bank has any level sensitive GPIO pin interrupt + configured, we must unmask the bank interrupt only after + handler(s) are executed in order to avoid spurious bank + interrupt */ + if (!unmasked) + desc->chip->unmask(irq); + } static void gpio_ack_irq(unsigned int irq) diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c index 8c1c016aa68..042105ac30b 100644 --- a/arch/arm/plat-omap/mux.c +++ b/arch/arm/plat-omap/mux.c @@ -22,7 +22,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * */ -#include <linux/config.h> #include <linux/module.h> #include <linux/init.h> #include <linux/kernel.h> diff --git a/arch/arm/plat-omap/ocpi.c b/arch/arm/plat-omap/ocpi.c index 37792d43738..b5d307026c8 100644 --- a/arch/arm/plat-omap/ocpi.c +++ b/arch/arm/plat-omap/ocpi.c @@ -23,7 +23,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/config.h> #include <linux/module.h> #include <linux/types.h> #include <linux/errno.h> diff --git a/arch/arm/plat-omap/pm.c b/arch/arm/plat-omap/pm.c index 1a24e2c1071..04b4102727a 100644 --- a/arch/arm/plat-omap/pm.c +++ b/arch/arm/plat-omap/pm.c @@ -580,7 +580,7 @@ static irqreturn_t omap_wakeup_interrupt(int irq, void * dev, static struct irqaction omap_wakeup_irq = { .name = "peripheral wakeup", - .flags = SA_INTERRUPT, + .flags = IRQF_DISABLED, .handler = omap_wakeup_interrupt }; diff --git a/arch/arm/plat-omap/sram-fn.S b/arch/arm/plat-omap/sram-fn.S index 66414cc8e6e..85cffe2c626 100644 --- a/arch/arm/plat-omap/sram-fn.S +++ b/arch/arm/plat-omap/sram-fn.S @@ -8,7 +8,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/arch/io.h> diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index b7bf09b1b41..e75718301b0 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -11,7 +11,6 @@ * published by the Free Software Foundation. */ -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -158,14 +157,12 @@ static struct map_desc omap_sram_io_desc[] __initdata = { { /* .length gets filled in at runtime */ .virtual = OMAP1_SRAM_VA, .pfn = __phys_to_pfn(OMAP1_SRAM_PA), - .type = MT_DEVICE + .type = MT_MEMORY } }; /* - * In order to use last 2kB of SRAM on 1611b, we must round the size - * up to multiple of PAGE_SIZE. We cannot use ioremap for SRAM, as - * clock init needs SRAM early. + * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early. */ void __init omap_map_sram(void) { @@ -185,8 +182,7 @@ void __init omap_map_sram(void) omap_sram_io_desc[0].pfn = __phys_to_pfn(base); } - omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE; - omap_sram_io_desc[0].length *= PAGE_SIZE; + omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */ iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc)); printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n", diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c index b2a943bf11e..281ecc7fcdf 100644 --- a/arch/arm/plat-omap/timer32k.c +++ b/arch/arm/plat-omap/timer32k.c @@ -7,6 +7,7 @@ * Partial timer rewrite and additional dynamic tick timer support by * Tony Lindgen <tony@atomide.com> and * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> + * OMAP Dual-mode timer framework support by Timo Teras * * MPU timer code based on the older MPU timer code for OMAP * Copyright (C) 2000 RidgeRun, Inc. @@ -33,7 +34,6 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/delay.h> @@ -50,6 +50,7 @@ #include <asm/irq.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> +#include <asm/arch/dmtimer.h> struct sys_timer omap_timer; @@ -79,18 +80,6 @@ struct sys_timer omap_timer; #define OMAP1_32K_TIMER_TVR 0x00 #define OMAP1_32K_TIMER_TCR 0x04 -/* 24xx specific defines */ -#define OMAP2_GP_TIMER_BASE 0x48028000 -#define CM_CLKSEL_WKUP 0x48008440 -#define GP_TIMER_TIDR 0x00 -#define GP_TIMER_TISR 0x18 -#define GP_TIMER_TIER 0x1c -#define GP_TIMER_TCLR 0x24 -#define GP_TIMER_TCRR 0x28 -#define GP_TIMER_TLDR 0x2c -#define GP_TIMER_TTGR 0x30 -#define GP_TIMER_TSICR 0x40 - #define OMAP_32K_TICKS_PER_HZ (32768 / HZ) /* @@ -102,54 +91,62 @@ struct sys_timer omap_timer; #define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \ (((nr_jiffies) * (clock_rate)) / HZ) +#if defined(CONFIG_ARCH_OMAP1) + static inline void omap_32k_timer_write(int val, int reg) { - if (cpu_class_is_omap1()) - omap_writew(val, OMAP1_32K_TIMER_BASE + reg); - - if (cpu_is_omap24xx()) - omap_writel(val, OMAP2_GP_TIMER_BASE + reg); + omap_writew(val, OMAP1_32K_TIMER_BASE + reg); } static inline unsigned long omap_32k_timer_read(int reg) { - if (cpu_class_is_omap1()) - return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff; + return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff; +} - if (cpu_is_omap24xx()) - return omap_readl(OMAP2_GP_TIMER_BASE + reg); +static inline void omap_32k_timer_start(unsigned long load_val) +{ + omap_32k_timer_write(load_val, OMAP1_32K_TIMER_TVR); + omap_32k_timer_write(0x0f, OMAP1_32K_TIMER_CR); } -/* - * The 32KHz synchronized timer is an additional timer on 16xx. - * It is always running. - */ -static inline unsigned long omap_32k_sync_timer_read(void) +static inline void omap_32k_timer_stop(void) { - return omap_readl(TIMER_32K_SYNCHRONIZED); + omap_32k_timer_write(0x0, OMAP1_32K_TIMER_CR); } +#define omap_32k_timer_ack_irq() + +#elif defined(CONFIG_ARCH_OMAP2) + +static struct omap_dm_timer *gptimer; + static inline void omap_32k_timer_start(unsigned long load_val) { - if (cpu_class_is_omap1()) { - omap_32k_timer_write(load_val, OMAP1_32K_TIMER_TVR); - omap_32k_timer_write(0x0f, OMAP1_32K_TIMER_CR); - } - - if (cpu_is_omap24xx()) { - omap_32k_timer_write(0xffffffff - load_val, GP_TIMER_TCRR); - omap_32k_timer_write((1 << 1), GP_TIMER_TIER); - omap_32k_timer_write((1 << 1) | 1, GP_TIMER_TCLR); - } + omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val); + omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); + omap_dm_timer_start(gptimer); } static inline void omap_32k_timer_stop(void) { - if (cpu_class_is_omap1()) - omap_32k_timer_write(0x0, OMAP1_32K_TIMER_CR); + omap_dm_timer_stop(gptimer); +} - if (cpu_is_omap24xx()) - omap_32k_timer_write(0x0, GP_TIMER_TCLR); +static inline void omap_32k_timer_ack_irq(void) +{ + u32 status = omap_dm_timer_read_status(gptimer); + omap_dm_timer_write_status(gptimer, status); +} + +#endif + +/* + * The 32KHz synchronized timer is an additional timer on 16xx. + * It is always running. + */ +static inline unsigned long omap_32k_sync_timer_read(void) +{ + return omap_readl(TIMER_32K_SYNCHRONIZED); } /* @@ -203,14 +200,11 @@ static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id, write_seqlock_irqsave(&xtime_lock, flags); - if (cpu_is_omap24xx()) { - u32 status = omap_32k_timer_read(GP_TIMER_TISR); - omap_32k_timer_write(status, GP_TIMER_TISR); - } - + omap_32k_timer_ack_irq(); now = omap_32k_sync_timer_read(); - while (now - omap_32k_last_tick >= OMAP_32K_TICKS_PER_HZ) { + while ((signed long)(now - omap_32k_last_tick) + >= OMAP_32K_TICKS_PER_HZ) { omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ; timer_tick(regs); } @@ -264,13 +258,10 @@ static struct dyn_tick_timer omap_dyn_tick_timer = { static struct irqaction omap_32k_timer_irq = { .name = "32KHz timer", - .flags = SA_INTERRUPT | SA_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER, .handler = omap_32k_timer_interrupt, }; -static struct clk * gpt1_ick; -static struct clk * gpt1_fck; - static __init void omap_init_32k_timer(void) { #ifdef CONFIG_NO_IDLE_HZ @@ -279,32 +270,22 @@ static __init void omap_init_32k_timer(void) if (cpu_class_is_omap1()) setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); - if (cpu_is_omap24xx()) - setup_irq(37, &omap_32k_timer_irq); omap_timer.offset = omap_32k_timer_gettimeoffset; omap_32k_last_tick = omap_32k_sync_timer_read(); +#ifdef CONFIG_ARCH_OMAP2 /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */ if (cpu_is_omap24xx()) { - omap_32k_timer_write(0, GP_TIMER_TCLR); - omap_writel(0, CM_CLKSEL_WKUP); /* 32KHz clock source */ - - gpt1_ick = clk_get(NULL, "gpt1_ick"); - if (IS_ERR(gpt1_ick)) - printk(KERN_ERR "Could not get gpt1_ick\n"); - else - clk_enable(gpt1_ick); - - gpt1_fck = clk_get(NULL, "gpt1_fck"); - if (IS_ERR(gpt1_fck)) - printk(KERN_ERR "Could not get gpt1_fck\n"); - else - clk_enable(gpt1_fck); - - mdelay(100); /* Wait for clocks to stabilize */ - - omap_32k_timer_write(0x7, GP_TIMER_TISR); + gptimer = omap_dm_timer_request_specific(1); + BUG_ON(gptimer == NULL); + + omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ); + setup_irq(omap_dm_timer_get_irq(gptimer), &omap_32k_timer_irq); + omap_dm_timer_set_int_enable(gptimer, + OMAP_TIMER_INT_CAPTURE | OMAP_TIMER_INT_OVERFLOW | + OMAP_TIMER_INT_MATCH); } +#endif omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); } @@ -316,6 +297,9 @@ static __init void omap_init_32k_timer(void) */ static void __init omap_timer_init(void) { +#ifdef CONFIG_OMAP_DM_TIMER + omap_dm_timer_init(); +#endif omap_init_32k_timer(); } diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c index 00afc7a8c2a..9b815327b6a 100644 --- a/arch/arm/plat-omap/usb.c +++ b/arch/arm/plat-omap/usb.c @@ -20,7 +20,6 @@ #undef DEBUG -#include <linux/config.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/types.h> diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 6d7de9c0412..e1372a25311 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -12,7 +12,7 @@ # # http://www.arm.linux.org.uk/developer/machines/?action=new # -# Last update: Mon May 8 20:11:05 2006 +# Last update: Mon Jun 26 22:26:08 2006 # # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number # @@ -566,8 +566,8 @@ switchgrass MACH_SWITCHGRASS SWITCHGRASS 549 ens_cmu MACH_ENS_CMU ENS_CMU 550 mm6_sdb MACH_MM6_SDB MM6_SDB 551 saturn MACH_SATURN SATURN 552 -i30030evb MACH_ARGONPLUSEVB ARGONPLUSEVB 553 -mxc27530evb MACH_SCMA11EVB SCMA11EVB 554 +i30030evb MACH_I30030EVB I30030EVB 553 +mxc27530evb MACH_MXC27530EVB MXC27530EVB 554 smdk2800 MACH_SMDK2800 SMDK2800 555 mtwilson MACH_MTWILSON MTWILSON 556 ziti MACH_ZITI ZITI 557 @@ -647,7 +647,7 @@ sendt MACH_SENDT SENDT 630 mx2jazz MACH_MX2JAZZ MX2JAZZ 631 multiio MACH_MULTIIO MULTIIO 632 hrdisplay MACH_HRDISPLAY HRDISPLAY 633 -mxc27530ads MACH_SCMA11BB SCMA11BB 634 +mxc27530ads MACH_MXC27530ADS MXC27530ADS 634 trizeps3 MACH_TRIZEPS3 TRIZEPS3 635 zefeerdza MACH_ZEFEERDZA ZEFEERDZA 636 zefeerdzb MACH_ZEFEERDZB ZEFEERDZB 637 @@ -721,7 +721,7 @@ gp32 MACH_GP32 GP32 706 gem MACH_GEM GEM 707 i858 MACH_I858 I858 708 hx2750 MACH_HX2750 HX2750 709 -mxc91131evb MACH_ZEUSEVB ZEUSEVB 710 +mxc91131evb MACH_MXC91131EVB MXC91131EVB 710 p700 MACH_P700 P700 711 cpe MACH_CPE CPE 712 spitz MACH_SPITZ SPITZ 713 @@ -802,7 +802,7 @@ cpuat91 MACH_CPUAT91 CPUAT91 787 rea9200 MACH_REA9200 REA9200 788 acts_pune_sa1110 MACH_ACTS_PUNE_SA1110 ACTS_PUNE_SA1110 789 ixp425 MACH_IXP425 IXP425 790 -i30030ads MACH_ARGONPLUSODYSSEY ARGONPLUSODYSSEY 791 +i30030ads MACH_I30030ADS I30030ADS 791 perch MACH_PERCH PERCH 792 eis05r1 MACH_EIS05R1 EIS05R1 793 pepperpad MACH_PEPPERPAD PEPPERPAD 794 @@ -930,7 +930,7 @@ netclient MACH_NETCLIENT NETCLIENT 916 xscale_palmtt5 MACH_XSCALE_PALMTT5 XSCALE_PALMTT5 917 xscale_palmtc MACH_OMAP_PALMTC OMAP_PALMTC 918 omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919 -mxc30030evb MACH_ARGONLVEVB ARGONLVEVB 920 +mxc30030evb MACH_MXC30030EVB MXC30030EVB 920 rea_2d MACH_REA_2D REA_2D 921 eti3e524 MACH_TI3E524 TI3E524 922 ateb9200 MACH_ATEB9200 ATEB9200 923 @@ -986,7 +986,7 @@ redfox MACH_REDFOX REDFOX 972 mysh_ep9315_1 MACH_MYSH_EP9315_1 MYSH_EP9315_1 973 tpf106 MACH_TPF106 TPF106 974 at91rm9200kg MACH_AT91RM9200KG AT91RM9200KG 975 -racemt2 MACH_SLEDB SLEDB 976 +rcmt2 MACH_SLEDB SLEDB 976 ontrack MACH_ONTRACK ONTRACK 977 pm1200 MACH_PM1200 PM1200 978 ess24562 MACH_ESS24XXX ESS24XXX 979 @@ -1022,7 +1022,7 @@ smdk2440 MACH_SMDK2440 SMDK2440 1008 smdk2412 MACH_SMDK2412 SMDK2412 1009 webbox MACH_WEBBOX WEBBOX 1010 cwwndp MACH_CWWNDP CWWNDP 1011 -dragon MACH_DRAGON DRAGON 1012 +i839 MACH_DRAGON DRAGON 1012 opendo_cpu_board MACH_OPENDO_CPU_BOARD OPENDO_CPU_BOARD 1013 ccm2200 MACH_CCM2200 CCM2200 1014 etwarm MACH_ETWARM ETWARM 1015 @@ -1040,3 +1040,56 @@ edg79524 MACH_EDG79524 EDG79524 1026 ai2410 MACH_AI2410 AI2410 1027 ixp465 MACH_IXP465 IXP465 1028 balloon3 MACH_BALLOON3 BALLOON3 1029 +heins MACH_HEINS HEINS 1030 +mpluseva MACH_MPLUSEVA MPLUSEVA 1031 +rt042 MACH_RT042 RT042 1032 +cwiem MACH_CWIEM CWIEM 1033 +cm_x270 MACH_CM_X270 CM_X270 1034 +cm_x255 MACH_CM_X255 CM_X255 1035 +esh_at91 MACH_ESH_AT91 ESH_AT91 1036 +sandgate3 MACH_SANDGATE3 SANDGATE3 1037 +primo MACH_PRIMO PRIMO 1038 +gemstone MACH_GEMSTONE GEMSTONE 1039 +pronghorn_metro MACH_PRONGHORNMETRO PRONGHORNMETRO 1040 +sidewinder MACH_SIDEWINDER SIDEWINDER 1041 +picomod1 MACH_PICOMOD1 PICOMOD1 1042 +sg590 MACH_SG590 SG590 1043 +akai9307 MACH_AKAI9307 AKAI9307 1044 +fontaine MACH_FONTAINE FONTAINE 1045 +wombat MACH_WOMBAT WOMBAT 1046 +acq300 MACH_ACQ300 ACQ300 1047 +mod_270 MACH_MOD_270 MOD_270 1048 +vmc_vc0820 MACH_VC0820 VC0820 1049 +ani_aim MACH_ANI_AIM ANI_AIM 1050 +jellyfish MACH_JELLYFISH JELLYFISH 1051 +amanita MACH_AMANITA AMANITA 1052 +vlink MACH_VLINK VLINK 1053 +dexflex MACH_DEXFLEX DEXFLEX 1054 +eigen_ttq MACH_EIGEN_TTQ EIGEN_TTQ 1055 +arcom_titan MACH_ARCOM_TITAN ARCOM_TITAN 1056 +tabla MACH_TABLA TABLA 1057 +mdirac3 MACH_MDIRAC3 MDIRAC3 1058 +mrhfbp2 MACH_MRHFBP2 MRHFBP2 1059 +at91rm9200rb MACH_AT91RM9200RB AT91RM9200RB 1060 +ani_apm MACH_ANI_APM ANI_APM 1061 +ella1 MACH_ELLA1 ELLA1 1062 +inhand_pxa27x MACH_INHAND_PXA27X INHAND_PXA27X 1063 +inhand_pxa25x MACH_INHAND_PXA25X INHAND_PXA25X 1064 +empos_xm MACH_EMPOS_XM EMPOS_XM 1065 +empos MACH_EMPOS EMPOS 1066 +empos_tiny MACH_EMPOS_TINY EMPOS_TINY 1067 +empos_sm MACH_EMPOS_SM EMPOS_SM 1068 +egret MACH_EGRET EGRET 1069 +ostrich MACH_OSTRICH OSTRICH 1070 +n50 MACH_N50 N50 1071 +ecbat91 MACH_ECBAT91 ECBAT91 1072 +stareast MACH_STAREAST STAREAST 1073 +dspg_dw MACH_DSPG_DW DSPG_DW 1074 +onearm MACH_ONEARM ONEARM 1075 +mrg110_6 MACH_MRG110_6 MRG110_6 1076 +wrt300nv2 MACH_WRT300NV2 WRT300NV2 1077 +xm_bulverde MACH_XM_BULVERDE XM_BULVERDE 1078 +msm6100 MACH_MSM6100 MSM6100 1079 +eti_b1 MACH_ETI_B1 ETI_B1 1080 +za9l_series MACH_ZILOG_ZA9L ZILOG_ZA9L 1081 +bit2440 MACH_BIT2440 BIT2440 1082 diff --git a/arch/arm/vfp/Makefile b/arch/arm/vfp/Makefile index afabac31dd1..7e136e77971 100644 --- a/arch/arm/vfp/Makefile +++ b/arch/arm/vfp/Makefile @@ -7,6 +7,9 @@ # EXTRA_CFLAGS := -DDEBUG # EXTRA_AFLAGS := -DDEBUG +AFLAGS :=$(AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp) +LDFLAGS +=--no-warn-mismatch + obj-y += vfp.o -vfp-$(CONFIG_VFP) += entry.o vfpmodule.o vfphw.o vfpsingle.o vfpdouble.o +vfp-$(CONFIG_VFP) += vfpmodule.o entry.o vfphw.o vfpsingle.o vfpdouble.o diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index a3f65b47aea..eb683cd7716 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -192,7 +192,7 @@ vfp_get_double: add pc, pc, r0, lsl #3 mov r0, r0 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 - mrrc p11, 1, r0, r1, c\dr @ fmrrd r0, r1, d\dr + fmrrd r0, r1, d\dr mov pc, lr .endr @@ -206,6 +206,6 @@ vfp_put_double: add pc, pc, r0, lsl #3 mov r0, r0 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 - mcrr p11, 1, r1, r2, c\dr @ fmdrr r1, r2, d\dr + fmdrr d\dr, r1, r2 mov pc, lr .endr diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 03486be0419..9d265d5e748 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -9,12 +9,13 @@ * published by the Free Software Foundation. */ #include <linux/module.h> -#include <linux/config.h> #include <linux/types.h> #include <linux/kernel.h> #include <linux/signal.h> #include <linux/sched.h> #include <linux/init.h> + +#include <asm/thread_notify.h> #include <asm/vfp.h> #include "vfpinstr.h" @@ -36,38 +37,55 @@ union vfp_state *last_VFP_context; */ unsigned int VFP_arch; -/* - * Per-thread VFP initialisation. - */ -void vfp_flush_thread(union vfp_state *vfp) +static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) { - memset(vfp, 0, sizeof(union vfp_state)); + struct thread_info *thread = v; + union vfp_state *vfp = &thread->vfpstate; - vfp->hard.fpexc = FPEXC_ENABLE; - vfp->hard.fpscr = FPSCR_ROUND_NEAREST; + switch (cmd) { + case THREAD_NOTIFY_FLUSH: + /* + * Per-thread VFP initialisation. + */ + memset(vfp, 0, sizeof(union vfp_state)); - /* - * Disable VFP to ensure we initialise it first. - */ - fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); + vfp->hard.fpexc = FPEXC_ENABLE; + vfp->hard.fpscr = FPSCR_ROUND_NEAREST; - /* - * Ensure we don't try to overwrite our newly initialised - * state information on the first fault. - */ - if (last_VFP_context == vfp) - last_VFP_context = NULL; -} + /* + * Disable VFP to ensure we initialise it first. + */ + fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); -/* - * Per-thread VFP cleanup. - */ -void vfp_release_thread(union vfp_state *vfp) -{ - if (last_VFP_context == vfp) - last_VFP_context = NULL; + /* + * FALLTHROUGH: Ensure we don't try to overwrite our newly + * initialised state information on the first fault. + */ + + case THREAD_NOTIFY_RELEASE: + /* + * Per-thread VFP cleanup. + */ + if (last_VFP_context == vfp) + last_VFP_context = NULL; + break; + + case THREAD_NOTIFY_SWITCH: + /* + * Always disable VFP so we can lazily save/restore the + * old state. + */ + fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); + break; + } + + return NOTIFY_DONE; } +static struct notifier_block vfp_notifier_block = { + .notifier_call = vfp_notifier, +}; + /* * Raise a SIGFPE for the current process. * sicode describes the signal being raised. @@ -281,6 +299,8 @@ static int __init vfp_init(void) (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT, (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT); vfp_vector = vfp_support_entry; + + thread_register_notifier(&vfp_notifier_block); } return 0; } |