Orion: orion -> orion5x rename

Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e.
not the plat-orion bits.)

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Saeed Bishara <saeed@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>

19 files changed, 514 insertions, 509 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 845f96e9f0d..2f4fb773f3e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -377,7 +377,7 @@ config ARCH_MXC
 	help
 	  Support for Freescale MXC/iMX-based family of processors
 
-config ARCH_ORION
+config ARCH_ORION5X
 	bool "Marvell Orion"
 	depends on MMU
 	select PCI
@@ -386,7 +386,8 @@ config ARCH_ORION
 	select GENERIC_CLOCKEVENTS
 	select PLAT_ORION
 	help
-	  Support for Marvell Orion System on Chip family.
+	  Support for the following Marvell Orion 5x series SoCs:
+	  Orion-1 (5181), Orion-NAS (5182), Orion-2 (5281.)
 
 config ARCH_PNX4008
 	bool "Philips Nexperia PNX4008 Mobile"
@@ -517,7 +518,7 @@ source "arch/arm/mach-omap1/Kconfig"
 
 source "arch/arm/mach-omap2/Kconfig"
 
-source "arch/arm/mach-orion/Kconfig"
+source "arch/arm/mach-orion5x/Kconfig"
 
 source "arch/arm/plat-s3c24xx/Kconfig"
 source "arch/arm/plat-s3c/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 27866cf0c18..6f997505375 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -139,7 +139,7 @@ endif
  machine-$(CONFIG_ARCH_KS8695)     := ks8695
   incdir-$(CONFIG_ARCH_MXC)	   := mxc
  machine-$(CONFIG_ARCH_MX3)	   := mx3
- machine-$(CONFIG_ARCH_ORION)	   := orion
+ machine-$(CONFIG_ARCH_ORION5X)	   := orion5x
  machine-$(CONFIG_ARCH_MSM7X00A)   := msm
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
diff --git a/arch/arm/configs/orion_defconfig b/arch/arm/configs/orion5x_defconfig
index 1e5aaa645fc..52cd99bd52f 100644
--- a/arch/arm/configs/orion_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -140,7 +140,7 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_MXC is not set
-CONFIG_ARCH_ORION=y
+CONFIG_ARCH_ORION5X=y
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_RPC is not set
diff --git a/arch/arm/mach-orion/common.h b/arch/arm/mach-orion/common.h
deleted file mode 100644
index bcc31adaca1..00000000000
--- a/arch/arm/mach-orion/common.h
+++ /dev/null
@@ -1,72 +0,0 @@
-#ifndef __ARCH_ORION_COMMON_H
-#define __ARCH_ORION_COMMON_H
-
-/*
- * Basic Orion init functions used early by machine-setup.
- */
-
-void orion_map_io(void);
-void orion_init_irq(void);
-void orion_init(void);
-extern struct sys_timer orion_timer;
-
-/*
- * Enumerations and functions for Orion windows mapping. Used by Orion core
- * functions to map its interfaces and by the machine-setup to map its on-
- * board devices. Details in /mach-orion/addr-map.c
- */
-extern struct mbus_dram_target_info orion_mbus_dram_info;
-void orion_setup_cpu_mbus_bridge(void);
-void orion_setup_dev_boot_win(u32 base, u32 size);
-void orion_setup_dev0_win(u32 base, u32 size);
-void orion_setup_dev1_win(u32 base, u32 size);
-void orion_setup_dev2_win(u32 base, u32 size);
-void orion_setup_pcie_wa_win(u32 base, u32 size);
-void orion_setup_eth_wins(void);
-
-/*
- * Shared code used internally by other Orion core functions.
- * (/mach-orion/pci.c)
- */
-
-struct pci_sys_data;
-struct pci_bus;
-
-void orion_pcie_id(u32 *dev, u32 *rev);
-int orion_pcie_local_bus_nr(void);
-int orion_pci_local_bus_nr(void);
-int orion_pci_sys_setup(int nr, struct pci_sys_data *sys);
-struct pci_bus *orion_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
-
-/*
- * Valid GPIO pins according to MPP setup, used by machine-setup.
- * (/mach-orion/gpio.c).
- */
-
-void orion_gpio_set_valid_pins(u32 pins);
-void gpio_display(void);	/* debug */
-
-/*
- * Pull in Orion Ethernet platform_data, used by machine-setup
- */
-
-struct mv643xx_eth_platform_data;
-
-void orion_eth_init(struct mv643xx_eth_platform_data *eth_data);
-
-/*
- * Orion Sata platform_data, used by machine-setup
- */
-
-struct mv_sata_platform_data;
-
-void orion_sata_init(struct mv_sata_platform_data *sata_data);
-
-struct machine_desc;
-struct meminfo;
-struct tag;
-extern void __init tag_fixup_mem32(struct machine_desc *, struct tag *,
-				   char **, struct meminfo *);
-
-
-#endif
diff --git a/arch/arm/mach-orion/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 1dcbb6ac5a3..01c66957d8f 100644
--- a/arch/arm/mach-orion/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -1,4 +1,4 @@
-if ARCH_ORION
+if ARCH_ORION5X
 
 menu "Orion Implementations"
 
diff --git a/arch/arm/mach-orion/Makefile b/arch/arm/mach-orion5x/Makefile
index d894caa5060..d894caa5060 100644
--- a/arch/arm/mach-orion/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
diff --git a/arch/arm/mach-orion/Makefile.boot b/arch/arm/mach-orion5x/Makefile.boot
index 67039c3e0c4..67039c3e0c4 100644
--- a/arch/arm/mach-orion/Makefile.boot
+++ b/arch/arm/mach-orion5x/Makefile.boot
diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 738de617e3c..6b179371e0a 100644
--- a/arch/arm/mach-orion/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -1,7 +1,7 @@
 /*
- * arch/arm/mach-orion/addr-map.c
+ * arch/arm/mach-orion5x/addr-map.c
  *
- * Address map functions for Marvell Orion System On Chip
+ * Address map functions for Marvell Orion 5x SoCs
  *
  * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
  *
@@ -29,7 +29,7 @@
  * Setup access to PCI and PCI-E IO/MEM space is issued by this file.
  * Setup access to various devices located on the device bus interface (e.g.
  * flashes, RTC, etc) should be issued by machine-setup.c according to
- * specific board population (by using orion_setup_*_win()).
+ * specific board population (by using orion5x_setup_*_win()).
  *
  * Non-CPU Masters address decoding --
  * Unlike the CPU, we setup the access from Orion's master interfaces to DDR
@@ -66,8 +66,8 @@
 /*
  * Helpers to get DDR bank info
  */
-#define DDR_BASE_CS(n)		ORION_DDR_REG(0x1500 + ((n) * 8))
-#define DDR_SIZE_CS(n)		ORION_DDR_REG(0x1504 + ((n) * 8))
+#define DDR_BASE_CS(n)		ORION5X_DDR_REG(0x1500 + ((n) * 8))
+#define DDR_SIZE_CS(n)		ORION5X_DDR_REG(0x1504 + ((n) * 8))
 #define DDR_MAX_CS		4
 #define DDR_REG_TO_SIZE(reg)	(((reg) | 0xffffff) + 1)
 #define DDR_REG_TO_BASE(reg)	((reg) & 0xff000000)
@@ -76,30 +76,30 @@
 /*
  * CPU Address Decode Windows registers
  */
-#define CPU_WIN_CTRL(n)		ORION_BRIDGE_REG(0x000 | ((n) << 4))
-#define CPU_WIN_BASE(n)		ORION_BRIDGE_REG(0x004 | ((n) << 4))
-#define CPU_WIN_REMAP_LO(n)	ORION_BRIDGE_REG(0x008 | ((n) << 4))
-#define CPU_WIN_REMAP_HI(n)	ORION_BRIDGE_REG(0x00c | ((n) << 4))
+#define CPU_WIN_CTRL(n)		ORION5X_BRIDGE_REG(0x000 | ((n) << 4))
+#define CPU_WIN_BASE(n)		ORION5X_BRIDGE_REG(0x004 | ((n) << 4))
+#define CPU_WIN_REMAP_LO(n)	ORION5X_BRIDGE_REG(0x008 | ((n) << 4))
+#define CPU_WIN_REMAP_HI(n)	ORION5X_BRIDGE_REG(0x00c | ((n) << 4))
 
 /*
  * Gigabit Ethernet Address Decode Windows registers
  */
-#define ETH_WIN_BASE(win)	ORION_ETH_REG(0x200 + ((win) * 8))
-#define ETH_WIN_SIZE(win)	ORION_ETH_REG(0x204 + ((win) * 8))
-#define ETH_WIN_REMAP(win)	ORION_ETH_REG(0x280 + ((win) * 4))
-#define ETH_WIN_EN		ORION_ETH_REG(0x290)
-#define ETH_WIN_PROT		ORION_ETH_REG(0x294)
+#define ETH_WIN_BASE(win)	ORION5X_ETH_REG(0x200 + ((win) * 8))
+#define ETH_WIN_SIZE(win)	ORION5X_ETH_REG(0x204 + ((win) * 8))
+#define ETH_WIN_REMAP(win)	ORION5X_ETH_REG(0x280 + ((win) * 4))
+#define ETH_WIN_EN		ORION5X_ETH_REG(0x290)
+#define ETH_WIN_PROT		ORION5X_ETH_REG(0x294)
 #define ETH_MAX_WIN		6
 #define ETH_MAX_REMAP_WIN	4
 
 
-struct mbus_dram_target_info orion_mbus_dram_info;
+struct mbus_dram_target_info orion5x_mbus_dram_info;
 
-static int __init orion_cpu_win_can_remap(int win)
+static int __init orion5x_cpu_win_can_remap(int win)
 {
 	u32 dev, rev;
 
-	orion_pcie_id(&dev, &rev);
+	orion5x_pcie_id(&dev, &rev);
 	if ((dev == MV88F5281_DEV_ID && win < 4)
 	    || (dev == MV88F5182_DEV_ID && win < 2)
 	    || (dev == MV88F5181_DEV_ID && win < 2))
@@ -111,20 +111,20 @@ static int __init orion_cpu_win_can_remap(int win)
 static void __init setup_cpu_win(int win, u32 base, u32 size,
 				 u8 target, u8 attr, int remap)
 {
-	orion_write(CPU_WIN_BASE(win), base & 0xffff0000);
-	orion_write(CPU_WIN_CTRL(win),
+	orion5x_write(CPU_WIN_BASE(win), base & 0xffff0000);
+	orion5x_write(CPU_WIN_CTRL(win),
 		((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1);
 
-	if (orion_cpu_win_can_remap(win)) {
+	if (orion5x_cpu_win_can_remap(win)) {
 		if (remap < 0)
 			remap = base;
 
-		orion_write(CPU_WIN_REMAP_LO(win), remap & 0xffff0000);
-		orion_write(CPU_WIN_REMAP_HI(win), 0);
+		orion5x_write(CPU_WIN_REMAP_LO(win), remap & 0xffff0000);
+		orion5x_write(CPU_WIN_REMAP_HI(win), 0);
 	}
 }
 
-void __init orion_setup_cpu_mbus_bridge(void)
+void __init orion5x_setup_cpu_mbus_bridge(void)
 {
 	int i;
 	int cs;
@@ -133,30 +133,30 @@ void __init orion_setup_cpu_mbus_bridge(void)
 	 * First, disable and clear windows.
 	 */
 	for (i = 0; i < 8; i++) {
-		orion_write(CPU_WIN_BASE(i), 0);
-		orion_write(CPU_WIN_CTRL(i), 0);
-		if (orion_cpu_win_can_remap(i)) {
-			orion_write(CPU_WIN_REMAP_LO(i), 0);
-			orion_write(CPU_WIN_REMAP_HI(i), 0);
+		orion5x_write(CPU_WIN_BASE(i), 0);
+		orion5x_write(CPU_WIN_CTRL(i), 0);
+		if (orion5x_cpu_win_can_remap(i)) {
+			orion5x_write(CPU_WIN_REMAP_LO(i), 0);
+			orion5x_write(CPU_WIN_REMAP_HI(i), 0);
 		}
 	}
 
 	/*
 	 * Setup windows for PCI+PCIe IO+MEM space.
 	 */
-	setup_cpu_win(0, ORION_PCIE_IO_PHYS_BASE, ORION_PCIE_IO_SIZE,
-		TARGET_PCIE, ATTR_PCIE_IO, ORION_PCIE_IO_BUS_BASE);
-	setup_cpu_win(1, ORION_PCI_IO_PHYS_BASE, ORION_PCI_IO_SIZE,
-		TARGET_PCI, ATTR_PCI_IO, ORION_PCI_IO_BUS_BASE);
-	setup_cpu_win(2, ORION_PCIE_MEM_PHYS_BASE, ORION_PCIE_MEM_SIZE,
+	setup_cpu_win(0, ORION5X_PCIE_IO_PHYS_BASE, ORION5X_PCIE_IO_SIZE,
+		TARGET_PCIE, ATTR_PCIE_IO, ORION5X_PCIE_IO_BUS_BASE);
+	setup_cpu_win(1, ORION5X_PCI_IO_PHYS_BASE, ORION5X_PCI_IO_SIZE,
+		TARGET_PCI, ATTR_PCI_IO, ORION5X_PCI_IO_BUS_BASE);
+	setup_cpu_win(2, ORION5X_PCIE_MEM_PHYS_BASE, ORION5X_PCIE_MEM_SIZE,
 		TARGET_PCIE, ATTR_PCIE_MEM, -1);
-	setup_cpu_win(3, ORION_PCI_MEM_PHYS_BASE, ORION_PCI_MEM_SIZE,
+	setup_cpu_win(3, ORION5X_PCI_MEM_PHYS_BASE, ORION5X_PCI_MEM_SIZE,
 		TARGET_PCI, ATTR_PCI_MEM, -1);
 
 	/*
 	 * Setup MBUS dram target info.
 	 */
-	orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
+	orion5x_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
 
 	for (i = 0, cs = 0; i < 4; i++) {
 		u32 base = readl(DDR_BASE_CS(i));
@@ -168,42 +168,42 @@ void __init orion_setup_cpu_mbus_bridge(void)
 		if (size & 1) {
 			struct mbus_dram_window *w;
 
-			w = &orion_mbus_dram_info.cs[cs++];
+			w = &orion5x_mbus_dram_info.cs[cs++];
 			w->cs_index = i;
 			w->mbus_attr = 0xf & ~(1 << i);
 			w->base = base & 0xff000000;
 			w->size = (size | 0x00ffffff) + 1;
 		}
 	}
-	orion_mbus_dram_info.num_cs = cs;
+	orion5x_mbus_dram_info.num_cs = cs;
 }
 
-void __init orion_setup_dev_boot_win(u32 base, u32 size)
+void __init orion5x_setup_dev_boot_win(u32 base, u32 size)
 {
 	setup_cpu_win(4, base, size, TARGET_DEV_BUS, ATTR_DEV_BOOT, -1);
 }
 
-void __init orion_setup_dev0_win(u32 base, u32 size)
+void __init orion5x_setup_dev0_win(u32 base, u32 size)
 {
 	setup_cpu_win(5, base, size, TARGET_DEV_BUS, ATTR_DEV_CS0, -1);
 }
 
-void __init orion_setup_dev1_win(u32 base, u32 size)
+void __init orion5x_setup_dev1_win(u32 base, u32 size)
 {
 	setup_cpu_win(6, base, size, TARGET_DEV_BUS, ATTR_DEV_CS1, -1);
 }
 
-void __init orion_setup_dev2_win(u32 base, u32 size)
+void __init orion5x_setup_dev2_win(u32 base, u32 size)
 {
 	setup_cpu_win(7, base, size, TARGET_DEV_BUS, ATTR_DEV_CS2, -1);
 }
 
-void __init orion_setup_pcie_wa_win(u32 base, u32 size)
+void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
 {
 	setup_cpu_win(7, base, size, TARGET_PCIE, ATTR_PCIE_WA, -1);
 }
 
-void __init orion_setup_eth_wins(void)
+void __init orion5x_setup_eth_wins(void)
 {
 	int i;
 
@@ -211,12 +211,12 @@ void __init orion_setup_eth_wins(void)
 	 * First, disable and clear windows
 	 */
 	for (i = 0; i < ETH_MAX_WIN; i++) {
-		orion_write(ETH_WIN_BASE(i), 0);
-		orion_write(ETH_WIN_SIZE(i), 0);
-		orion_setbits(ETH_WIN_EN, 1 << i);
-		orion_clrbits(ETH_WIN_PROT, 0x3 << (i * 2));
+		orion5x_write(ETH_WIN_BASE(i), 0);
+		orion5x_write(ETH_WIN_SIZE(i), 0);
+		orion5x_setbits(ETH_WIN_EN, 1 << i);
+		orion5x_clrbits(ETH_WIN_PROT, 0x3 << (i * 2));
 		if (i < ETH_MAX_REMAP_WIN)
-			orion_write(ETH_WIN_REMAP(i), 0);
+			orion5x_write(ETH_WIN_REMAP(i), 0);
 	}
 
 	/*
@@ -224,17 +224,17 @@ void __init orion_setup_eth_wins(void)
 	 */
 	for (i = 0; i < DDR_MAX_CS; i++) {
 		u32 base, size;
-		size = orion_read(DDR_SIZE_CS(i));
-		base = orion_read(DDR_BASE_CS(i));
+		size = orion5x_read(DDR_SIZE_CS(i));
+		base = orion5x_read(DDR_BASE_CS(i));
 		if (size & DDR_BANK_EN) {
 			base = DDR_REG_TO_BASE(base);
 			size = DDR_REG_TO_SIZE(size);
-			orion_write(ETH_WIN_SIZE(i), (size-1) & 0xffff0000);
-			orion_write(ETH_WIN_BASE(i), (base & 0xffff0000) |
+			orion5x_write(ETH_WIN_SIZE(i), (size-1) & 0xffff0000);
+			orion5x_write(ETH_WIN_BASE(i), (base & 0xffff0000) |
 					(ATTR_DDR_CS(i) << 8) |
 					TARGET_DDR);
-			orion_clrbits(ETH_WIN_EN, 1 << i);
-			orion_setbits(ETH_WIN_PROT, 0x3 << (i * 2));
+			orion5x_clrbits(ETH_WIN_EN, 1 << i);
+			orion5x_setbits(ETH_WIN_PROT, 0x3 << (i * 2));
 		}
 	}
 }
diff --git a/arch/arm/mach-orion/common.c b/arch/arm/mach-orion5x/common.c
index 85c8f18268a..439c7784af0 100644
--- a/arch/arm/mach-orion/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -1,7 +1,7 @@
 /*
- * arch/arm/mach-orion/common.c
+ * arch/arm/mach-orion5x/common.c
  *
- * Core functions for Marvell Orion System On Chip
+ * Core functions for Marvell Orion 5x SoCs
  *
  * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
  *
@@ -25,7 +25,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/orion.h>
+#include <asm/arch/orion5x.h>
 #include <asm/plat-orion/ehci-orion.h>
 #include <asm/plat-orion/orion_nand.h>
 #include <asm/plat-orion/time.h>
@@ -34,51 +34,51 @@
 /*****************************************************************************
  * I/O Address Mapping
  ****************************************************************************/
-static struct map_desc orion_io_desc[] __initdata = {
+static struct map_desc orion5x_io_desc[] __initdata = {
 	{
-		.virtual	= ORION_REGS_VIRT_BASE,
-		.pfn		= __phys_to_pfn(ORION_REGS_PHYS_BASE),
-		.length		= ORION_REGS_SIZE,
+		.virtual	= ORION5X_REGS_VIRT_BASE,
+		.pfn		= __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
+		.length		= ORION5X_REGS_SIZE,
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= ORION_PCIE_IO_VIRT_BASE,
-		.pfn		= __phys_to_pfn(ORION_PCIE_IO_PHYS_BASE),
-		.length		= ORION_PCIE_IO_SIZE,
+		.virtual	= ORION5X_PCIE_IO_VIRT_BASE,
+		.pfn		= __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
+		.length		= ORION5X_PCIE_IO_SIZE,
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= ORION_PCI_IO_VIRT_BASE,
-		.pfn		= __phys_to_pfn(ORION_PCI_IO_PHYS_BASE),
-		.length		= ORION_PCI_IO_SIZE,
+		.virtual	= ORION5X_PCI_IO_VIRT_BASE,
+		.pfn		= __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
+		.length		= ORION5X_PCI_IO_SIZE,
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= ORION_PCIE_WA_VIRT_BASE,
-		.pfn		= __phys_to_pfn(ORION_PCIE_WA_PHYS_BASE),
-		.length		= ORION_PCIE_WA_SIZE,
+		.virtual	= ORION5X_PCIE_WA_VIRT_BASE,
+		.pfn		= __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
+		.length		= ORION5X_PCIE_WA_SIZE,
 		.type		= MT_DEVICE
 	},
 };
 
-void __init orion_map_io(void)
+void __init orion5x_map_io(void)
 {
-	iotable_init(orion_io_desc, ARRAY_SIZE(orion_io_desc));
+	iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
 }
 
 /*****************************************************************************
  * UART
  ****************************************************************************/
 
-static struct resource orion_uart_resources[] = {
+static struct resource orion5x_uart_resources[] = {
 	{
 		.start		= UART0_PHYS_BASE,
 		.end		= UART0_PHYS_BASE + 0xff,
 		.flags		= IORESOURCE_MEM,
 	},
 	{
-		.start		= IRQ_ORION_UART0,
-		.end		= IRQ_ORION_UART0,
+		.start		= IRQ_ORION5X_UART0,
+		.end		= IRQ_ORION5X_UART0,
 		.flags		= IORESOURCE_IRQ,
 	},
 	{
@@ -87,102 +87,102 @@ static struct resource orion_uart_resources[] = {
 		.flags		= IORESOURCE_MEM,
 	},
 	{
-		.start		= IRQ_ORION_UART1,
-		.end		= IRQ_ORION_UART1,
+		.start		= IRQ_ORION5X_UART1,
+		.end		= IRQ_ORION5X_UART1,
 		.flags		= IORESOURCE_IRQ,
 	},
 };
 
-static struct plat_serial8250_port orion_uart_data[] = {
+static struct plat_serial8250_port orion5x_uart_data[] = {
 	{
 		.mapbase	= UART0_PHYS_BASE,
 		.membase	= (char *)UART0_VIRT_BASE,
-		.irq		= IRQ_ORION_UART0,
+		.irq		= IRQ_ORION5X_UART0,
 		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 		.iotype		= UPIO_MEM,
 		.regshift	= 2,
-		.uartclk	= ORION_TCLK,
+		.uartclk	= ORION5X_TCLK,
 	},
 	{
 		.mapbase	= UART1_PHYS_BASE,
 		.membase	= (char *)UART1_VIRT_BASE,
-		.irq		= IRQ_ORION_UART1,
+		.irq		= IRQ_ORION5X_UART1,
 		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 		.iotype		= UPIO_MEM,
 		.regshift	= 2,
-		.uartclk	= ORION_TCLK,
+		.uartclk	= ORION5X_TCLK,
 	},
 	{ },
 };
 
-static struct platform_device orion_uart = {
+static struct platform_device orion5x_uart = {
 	.name			= "serial8250",
 	.id			= PLAT8250_DEV_PLATFORM,
 	.dev			= {
-		.platform_data	= orion_uart_data,
+		.platform_data	= orion5x_uart_data,
 	},
-	.resource		= orion_uart_resources,
-	.num_resources		= ARRAY_SIZE(orion_uart_resources),
+	.resource		= orion5x_uart_resources,
+	.num_resources		= ARRAY_SIZE(orion5x_uart_resources),
 };
 
 /*******************************************************************************
  * USB Controller - 2 interfaces
  ******************************************************************************/
 
-static struct resource orion_ehci0_resources[] = {
+static struct resource orion5x_ehci0_resources[] = {
 	{
-		.start	= ORION_USB0_PHYS_BASE,
-		.end	= ORION_USB0_PHYS_BASE + SZ_4K,
+		.start	= ORION5X_USB0_PHYS_BASE,
+		.end	= ORION5X_USB0_PHYS_BASE + SZ_4K,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
-		.start	= IRQ_ORION_USB0_CTRL,
-		.end	= IRQ_ORION_USB0_CTRL,
+		.start	= IRQ_ORION5X_USB0_CTRL,
+		.end	= IRQ_ORION5X_USB0_CTRL,
 		.flags	= IORESOURCE_IRQ,
 	},
 };
 
-static struct resource orion_ehci1_resources[] = {
+static struct resource orion5x_ehci1_resources[] = {
 	{
-		.start	= ORION_USB1_PHYS_BASE,
-		.end	= ORION_USB1_PHYS_BASE + SZ_4K,
+		.start	= ORION5X_USB1_PHYS_BASE,
+		.end	= ORION5X_USB1_PHYS_BASE + SZ_4K,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
-		.start	= IRQ_ORION_USB1_CTRL,
-		.end	= IRQ_ORION_USB1_CTRL,
+		.start	= IRQ_ORION5X_USB1_CTRL,
+		.end	= IRQ_ORION5X_USB1_CTRL,
 		.flags	= IORESOURCE_IRQ,
 	},
 };
 
-static struct orion_ehci_data orion_ehci_data = {
-	.dram		= &orion_mbus_dram_info,
+static struct orion_ehci_data orion5x_ehci_data = {
+	.dram		= &orion5x_mbus_dram_info,
 };
 
 static u64 ehci_dmamask = 0xffffffffUL;
 
-static struct platform_device orion_ehci0 = {
+static struct platform_device orion5x_ehci0 = {
 	.name		= "orion-ehci",
 	.id		= 0,
 	.dev		= {
 		.dma_mask		= &ehci_dmamask,
 		.coherent_dma_mask	= 0xffffffff,
-		.platform_data		= &orion_ehci_data,
+		.platform_data		= &orion5x_ehci_data,
 	},
-	.resource	= orion_ehci0_resources,
-	.num_resources	= ARRAY_SIZE(orion_ehci0_resources),
+	.resource	= orion5x_ehci0_resources,
+	.num_resources	= ARRAY_SIZE(orion5x_ehci0_resources),
 };
 
-static struct platform_device orion_ehci1 = {
+static struct platform_device orion5x_ehci1 = {
 	.name		= "orion-ehci",
 	.id		= 1,
 	.dev		= {
 		.dma_mask		= &ehci_dmamask,
 		.coherent_dma_mask	= 0xffffffff,
-		.platform_data		= &orion_ehci_data,
+		.platform_data		= &orion5x_ehci_data,
 	},
-	.resource	= orion_ehci1_resources,
-	.num_resources	= ARRAY_SIZE(orion_ehci1_resources),
+	.resource	= orion5x_ehci1_resources,
+	.num_resources	= ARRAY_SIZE(orion5x_ehci1_resources),
 };
 
 /*****************************************************************************
@@ -190,42 +190,42 @@ static struct platform_device orion_ehci1 = {
  * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
  ****************************************************************************/
 
-static struct resource orion_eth_shared_resources[] = {
+static struct resource orion5x_eth_shared_resources[] = {
 	{
-		.start	= ORION_ETH_PHYS_BASE + 0x2000,
-		.end	= ORION_ETH_PHYS_BASE + 0x3fff,
+		.start	= ORION5X_ETH_PHYS_BASE + 0x2000,
+		.end	= ORION5X_ETH_PHYS_BASE + 0x3fff,
 		.flags	= IORESOURCE_MEM,
 	},
 };
 
-static struct platform_device orion_eth_shared = {
+static struct platform_device orion5x_eth_shared = {
 	.name		= MV643XX_ETH_SHARED_NAME,
 	.id		= 0,
 	.num_resources	= 1,
-	.resource	= orion_eth_shared_resources,
+	.resource	= orion5x_eth_shared_resources,
 };
 
-static struct resource orion_eth_resources[] = {
+static struct resource orion5x_eth_resources[] = {
 	{
 		.name	= "eth irq",
-		.start	= IRQ_ORION_ETH_SUM,
-		.end	= IRQ_ORION_ETH_SUM,
+		.start	= IRQ_ORION5X_ETH_SUM,
+		.end	= IRQ_ORION5X_ETH_SUM,
 		.flags	= IORESOURCE_IRQ,
 	}
 };
 
-static struct platform_device orion_eth = {
+static struct platform_device orion5x_eth = {
 	.name		= MV643XX_ETH_NAME,
 	.id		= 0,
 	.num_resources	= 1,
-	.resource	= orion_eth_resources,
+	.resource	= orion5x_eth_resources,
 };
 
-void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data)
+void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 {
-	orion_eth.dev.platform_data = eth_data;
-	platform_device_register(&orion_eth_shared);
-	platform_device_register(&orion_eth);
+	orion5x_eth.dev.platform_data = eth_data;
+	platform_device_register(&orion5x_eth_shared);
+	platform_device_register(&orion5x_eth);
 }
 
 /*****************************************************************************
@@ -233,13 +233,13 @@ void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data)
  * (The Orion and Discovery (MV643xx) families share the same I2C controller)
  ****************************************************************************/
 
-static struct mv64xxx_i2c_pdata orion_i2c_pdata = {
+static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
 	.freq_m		= 8, /* assumes 166 MHz TCLK */
 	.freq_n		= 3,
 	.timeout	= 1000, /* Default timeout of 1 second */
 };
 
-static struct resource orion_i2c_resources[] = {
+static struct resource orion5x_i2c_resources[] = {
 	{
 		.name   = "i2c base",
 		.start  = I2C_PHYS_BASE,
@@ -248,68 +248,68 @@ static struct resource orion_i2c_resources[] = {
 	},
 	{
 		.name   = "i2c irq",
-		.start  = IRQ_ORION_I2C,
-		.end    = IRQ_ORION_I2C,
+		.start  = IRQ_ORION5X_I2C,
+		.end    = IRQ_ORION5X_I2C,
 		.flags  = IORESOURCE_IRQ,
 	},
 };
 
-static struct platform_device orion_i2c = {
+static struct platform_device orion5x_i2c = {
 	.name		= MV64XXX_I2C_CTLR_NAME,
 	.id		= 0,
-	.num_resources	= ARRAY_SIZE(orion_i2c_resources),
-	.resource	= orion_i2c_resources,
+	.num_resources	= ARRAY_SIZE(orion5x_i2c_resources),
+	.resource	= orion5x_i2c_resources,
 	.dev		= {
-		.platform_data = &orion_i2c_pdata,
+		.platform_data = &orion5x_i2c_pdata,
 	},
 };
 
 /*****************************************************************************
  * Sata port
  ****************************************************************************/
-static struct resource orion_sata_resources[] = {
+static struct resource orion5x_sata_resources[] = {
         {
                 .name   = "sata base",
-                .start  = ORION_SATA_PHYS_BASE,
-                .end    = ORION_SATA_PHYS_BASE + 0x5000 - 1,
+                .start  = ORION5X_SATA_PHYS_BASE,
+                .end    = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
                 .flags  = IORESOURCE_MEM,
         },
 	{
                 .name   = "sata irq",
-                .start  = IRQ_ORION_SATA,
-                .end    = IRQ_ORION_SATA,
+                .start  = IRQ_ORION5X_SATA,
+                .end    = IRQ_ORION5X_SATA,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
-static struct platform_device orion_sata = {
+static struct platform_device orion5x_sata = {
 	.name           = "sata_mv",
 	.id             = 0,
 	.dev		= {
 		.coherent_dma_mask	= 0xffffffff,
 	},
-	.num_resources  = ARRAY_SIZE(orion_sata_resources),
-	.resource       = orion_sata_resources,
+	.num_resources  = ARRAY_SIZE(orion5x_sata_resources),
+	.resource       = orion5x_sata_resources,
 };
 
-void __init orion_sata_init(struct mv_sata_platform_data *sata_data)
+void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 {
-	sata_data->dram = &orion_mbus_dram_info;
-	orion_sata.dev.platform_data = sata_data;
-	platform_device_register(&orion_sata);
+	sata_data->dram = &orion5x_mbus_dram_info;
+	orion5x_sata.dev.platform_data = sata_data;
+	platform_device_register(&orion5x_sata);
 }
 
 /*****************************************************************************
  * Time handling
  ****************************************************************************/
 
-static void orion_timer_init(void)
+static void orion5x_timer_init(void)
 {
-	orion_time_init(IRQ_ORION_BRIDGE, ORION_TCLK);
+	orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK);
 }
 
-struct sys_timer orion_timer = {
-        .init = orion_timer_init,
+struct sys_timer orion5x_timer = {
+        .init = orion5x_timer_init,
 };
 
 /*****************************************************************************
@@ -319,9 +319,9 @@ struct sys_timer orion_timer = {
 /*
  * Identify device ID and rev from PCIE configuration header space '0'.
  */
-static void __init orion_id(u32 *dev, u32 *rev, char **dev_name)
+static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
 {
-	orion_pcie_id(dev, rev);
+	orion5x_pcie_id(dev, rev);
 
 	if (*dev == MV88F5281_DEV_ID) {
 		if (*rev == MV88F5281_REV_D2) {
@@ -348,28 +348,28 @@ static void __init orion_id(u32 *dev, u32 *rev, char **dev_name)
 	}
 }
 
-void __init orion_init(void)
+void __init orion5x_init(void)
 {
 	char *dev_name;
 	u32 dev, rev;
 
-	orion_id(&dev, &rev, &dev_name);
-	printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION_TCLK);
+	orion5x_id(&dev, &rev, &dev_name);
+	printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK);
 
 	/*
 	 * Setup Orion address map
 	 */
-	orion_setup_cpu_mbus_bridge();
-	orion_setup_eth_wins();
+	orion5x_setup_cpu_mbus_bridge();
+	orion5x_setup_eth_wins();
 
 	/*
 	 * Register devices.
 	 */
-	platform_device_register(&orion_uart);
-	platform_device_register(&orion_ehci0);
+	platform_device_register(&orion5x_uart);
+	platform_device_register(&orion5x_ehci0);
 	if (dev == MV88F5182_DEV_ID)
-		platform_device_register(&orion_ehci1);
-	platform_device_register(&orion_i2c);
+		platform_device_register(&orion5x_ehci1);
+	platform_device_register(&orion5x_i2c);
 }
 
 /*
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
new file mode 100644
index 00000000000..f4c4c9a72a7
--- /dev/null
+++ b/arch/arm/mach-orion5x/common.h
@@ -0,0 +1,72 @@
+#ifndef __ARCH_ORION5X_COMMON_H
+#define __ARCH_ORION5X_COMMON_H
+
+/*
+ * Basic Orion init functions used early by machine-setup.
+ */
+
+void orion5x_map_io(void);
+void orion5x_init_irq(void);
+void orion5x_init(void);
+extern struct sys_timer orion5x_timer;
+
+/*
+ * Enumerations and functions for Orion windows mapping. Used by Orion core
+ * functions to map its interfaces and by the machine-setup to map its on-
+ * board devices. Details in /mach-orion/addr-map.c
+ */
+extern struct mbus_dram_target_info orion5x_mbus_dram_info;
+void orion5x_setup_cpu_mbus_bridge(void);
+void orion5x_setup_dev_boot_win(u32 base, u32 size);
+void orion5x_setup_dev0_win(u32 base, u32 size);
+void orion5x_setup_dev1_win(u32 base, u32 size);
+void orion5x_setup_dev2_win(u32 base, u32 size);
+void orion5x_setup_pcie_wa_win(u32 base, u32 size);
+void orion5x_setup_eth_wins(void);
+
+/*
+ * Shared code used internally by other Orion core functions.
+ * (/mach-orion/pci.c)
+ */
+
+struct pci_sys_data;
+struct pci_bus;
+
+void orion5x_pcie_id(u32 *dev, u32 *rev);
+int orion5x_pcie_local_bus_nr(void);
+int orion5x_pci_local_bus_nr(void);
+int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
+struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
+
+/*
+ * Valid GPIO pins according to MPP setup, used by machine-setup.
+ * (/mach-orion/gpio.c).
+ */
+
+void orion5x_gpio_set_valid_pins(u32 pins);
+void gpio_display(void);	/* debug */
+
+/*
+ * Pull in Orion Ethernet platform_data, used by machine-setup
+ */
+
+struct mv643xx_eth_platform_data;
+
+void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
+
+/*
+ * Orion Sata platform_data, used by machine-setup
+ */
+
+struct mv_sata_platform_data;
+
+void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
+
+struct machine_desc;