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authorMaurus Cuelenaere <mcuelenaere@gmail.com>2009-11-20 13:04:13 +0100
committerBen Dooks <ben-linux@fluff.org>2009-12-01 01:35:40 +0000
commit6a88e9838fdc9ede136e3bb76a5c19413bd6cddb (patch)
treed2cc683914b23841b6da2d17c041c2fe87f8f3e9 /arch/arm/plat-s3c64xx/gpiolib.c
parent23196a42a691012ac9710677f711bb6dca0a1cde (diff)
ARM: S3C64XX: add support for all group 0 external interrupts
Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx/gpiolib.c')
-rw-r--r--arch/arm/plat-s3c64xx/gpiolib.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/plat-s3c64xx/gpiolib.c
index 92859290ea3..77856045727 100644
--- a/arch/arm/plat-s3c64xx/gpiolib.c
+++ b/arch/arm/plat-s3c64xx/gpiolib.c
@@ -213,6 +213,11 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = {
.get_pull = s3c_gpio_getpull_updown,
};
+int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin)
+{
+ return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO;
+}
+
static struct s3c_gpio_chip gpio_4bit[] = {
{
.base = S3C64XX_GPA_BASE,
@@ -269,10 +274,16 @@ static struct s3c_gpio_chip gpio_4bit[] = {
.base = S3C64XX_GPM(0),
.ngpio = S3C64XX_GPIO_M_NR,
.label = "GPM",
+ .to_irq = s3c64xx_gpio2int_gpm,
},
},
};
+int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin)
+{
+ return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO;
+}
+
static struct s3c_gpio_chip gpio_4bit2[] = {
{
.base = S3C64XX_GPH_BASE + 0x4,
@@ -297,6 +308,7 @@ static struct s3c_gpio_chip gpio_4bit2[] = {
.base = S3C64XX_GPL(0),
.ngpio = S3C64XX_GPIO_L_NR,
.label = "GPL",
+ .to_irq = s3c64xx_gpio2int_gpl,
},
},
};