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authorIngo Molnar <mingo@elte.hu>2010-01-29 09:24:57 +0100
committerIngo Molnar <mingo@elte.hu>2010-01-29 10:36:22 +0100
commitae7f6711d6231c9ba54feb5ba9856c3775e482f8 (patch)
tree89070c82204b2503348e4fd6c51d25a169375545 /arch/arm/mm/proc-v7.S
parent64abebf731df87e6f4ae7d9ffc340bdf0c033e44 (diff)
parentb23ff0e9330e4b11e18af984d50573598e10e7f9 (diff)
Merge branch 'perf/urgent' into perf/core
Merge reason: We want to queue up a dependent patch. Also update to later -rc's. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mm/proc-v7.S')
-rw-r--r--arch/arm/mm/proc-v7.S11
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 3a285218fd1..7aaf88a3b7a 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -45,7 +45,14 @@ ENTRY(cpu_v7_proc_init)
ENDPROC(cpu_v7_proc_init)
ENTRY(cpu_v7_proc_fin)
- mov pc, lr
+ stmfd sp!, {lr}
+ cpsid if @ disable interrupts
+ bl v7_flush_kern_cache_all
+ mrc p15, 0, r0, c1, c0, 0 @ ctrl register
+ bic r0, r0, #0x1000 @ ...i............
+ bic r0, r0, #0x0006 @ .............ca.
+ mcr p15, 0, r0, c1, c0, 0 @ disable caches
+ ldmfd sp!, {pc}
ENDPROC(cpu_v7_proc_fin)
/*
@@ -56,8 +63,6 @@ ENDPROC(cpu_v7_proc_fin)
* to what would be the reset vector.
*
* - loc - location to jump to for soft reset
- *
- * It is assumed that:
*/
.align 5
ENTRY(cpu_v7_reset)