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| author | Jiri Kosina <jkosina@suse.cz> | 2010-04-23 02:08:44 +0200 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2010-04-23 02:08:44 +0200 |
| commit | 6c9468e9eb1252eaefd94ce7f06e1be9b0b641b1 (patch) | |
| tree | 797676a336b050bfa1ef879377c07e541b9075d6 /arch/arm/mm/Kconfig | |
| parent | 4cb3ca7cd7e2cae8d1daf5345ec99a1e8502cf3f (diff) | |
| parent | c81eddb0e3728661d1585fbc564449c94165cc36 (diff) | |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index c4ed9f93f64..5bd7c89a604 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -736,6 +736,12 @@ config NEEDS_SYSCALL_FOR_CMPXCHG config OUTER_CACHE bool +config OUTER_CACHE_SYNC + bool + help + The outer cache has a outer_cache_fns.sync function pointer + that can be used to drain the write buffer of the outer cache. + config CACHE_FEROCEON_L2 bool "Enable the Feroceon L2 cache controller" depends on ARCH_KIRKWOOD || ARCH_MV78XX0 @@ -757,6 +763,7 @@ config CACHE_L2X0 REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4 default y select OUTER_CACHE + select OUTER_CACHE_SYNC help This option enables the L2x0 PrimeCell. @@ -781,3 +788,9 @@ config ARM_L1_CACHE_SHIFT int default 6 if ARM_L1_CACHE_SHIFT_6 default 5 + +config ARCH_HAS_BARRIERS + bool + help + This option allows the use of custom mandatory barriers + included via the mach/barriers.h file. |