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authorPeter De Schrijver <pdeschrijver@nvidia.com>2012-01-09 05:35:11 +0000
committerOlof Johansson <olof@lixom.net>2012-02-06 09:16:15 -0800
commit4fccf75ba3bee0bb3be7828caa03625d4ac100a2 (patch)
treeac2445c017187a1f68fbf642c1712706c0903c0b /arch/arm/mach-tegra/include/mach/clk.h
parentcaa4868ee07029e60450909960652b96a50ebfbd (diff)
ARM: tegra: add support for new clock framework features
Add support for new clock framework features implemented in tegra30. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/clk.h')
-rw-r--r--arch/arm/mach-tegra/include/mach/clk.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h
index fc3ecb66de0..d97e403303a 100644
--- a/arch/arm/mach-tegra/include/mach/clk.h
+++ b/arch/arm/mach-tegra/include/mach/clk.h
@@ -22,10 +22,20 @@
struct clk;
+enum tegra_clk_ex_param {
+ TEGRA_CLK_VI_INP_SEL,
+ TEGRA_CLK_DTV_INVERT,
+ TEGRA_CLK_NAND_PAD_DIV2_ENB,
+ TEGRA_CLK_PLLD_CSI_OUT_ENB,
+ TEGRA_CLK_PLLD_DSI_OUT_ENB,
+ TEGRA_CLK_PLLD_MIPI_MUX_SEL,
+};
+
void tegra_periph_reset_deassert(struct clk *c);
void tegra_periph_reset_assert(struct clk *c);
unsigned long clk_get_rate_all_locked(struct clk *c);
void tegra2_sdmmc_tap_delay(struct clk *c, int delay);
+int tegra_clk_cfg_ex(struct clk *c, enum tegra_clk_ex_param p, u32 setting);
#endif