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authorJames Bottomley <jejb@mulgrave.il.steeleye.com>2007-05-30 23:57:05 -0500
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2007-05-30 23:57:05 -0500
commit5bc65793cbf8da0d35f19ef025dda22887e79e80 (patch)
tree8291998abd73055de6f487fafa174ee2a5d3afee /arch/arm/mach-sa1100/time.c
parent6edae708bf77e012d855a7e2c7766f211d234f4f (diff)
parent3f0a6766e0cc5a577805732e5adb50a585c58175 (diff)
[SCSI] Merge up to linux-2.6 head
Conflicts: drivers/scsi/jazz_esp.c Same changes made by both SCSI and SPARC trees: problem with UTF-8 conversion in the copyright. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'arch/arm/mach-sa1100/time.c')
-rw-r--r--arch/arm/mach-sa1100/time.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 416e277054c..29cb0c1604a 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -25,7 +25,7 @@ static unsigned long __init sa1100_get_rtc_time(void)
{
/*
* According to the manual we should be able to let RTTR be zero
- * and then a default diviser for a 32.768KHz clock is used.
+ * and then a default divisor for a 32.768KHz clock is used.
* Apparently this doesn't work, at least for my SA1110 rev 5.
* If the clock divider is uninitialized then reset it to the
* default value to get the 1Hz clock.