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authorKukjin Kim <kgene.kim@samsung.com>2011-01-05 09:39:23 +0900
committerKukjin Kim <kgene.kim@samsung.com>2011-01-05 09:39:23 +0900
commitab10f1dd914ad87e0370bd8b82f77dcd32b6d941 (patch)
tree3879eaf6d7ede69d2757a5db2bf0de5e6bd3c367 /arch/arm/mach-s3c64xx
parentf56d463423b825ff5bf4b63e0dc443557934165c (diff)
parent957c461e82f7a8ddcd7fb25c01c43917f64fde33 (diff)
Merge branch 'dev/cleanup-clocks' into for-next
Diffstat (limited to 'arch/arm/mach-s3c64xx')
-rw-r--r--arch/arm/mach-s3c64xx/clock.c19
1 files changed, 3 insertions, 16 deletions
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 1c98d2ff2ed..dd378206450 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -127,7 +127,7 @@ int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
}
-static struct clk init_clocks_disable[] = {
+static struct clk init_clocks_off[] = {
{
.name = "nand",
.id = -1,
@@ -834,10 +834,6 @@ static struct clk *clks[] __initdata = {
void __init s3c64xx_register_clocks(unsigned long xtal,
unsigned armclk_divlimit)
{
- struct clk *clkp;
- int ret;
- int ptr;
-
armclk_mask = armclk_divlimit;
s3c24xx_register_baseclocks(xtal);
@@ -845,17 +841,8 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
- clkp = init_clocks_disable;
- for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
-
- ret = s3c24xx_register_clock(clkp);
- if (ret < 0) {
- printk(KERN_ERR "Failed to register clock %s (%d)\n",
- clkp->name, ret);
- }
-
- (clkp->enable)(clkp, 0);
- }
+ s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
+ s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));