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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-02-10 14:09:44 -0800 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-02-10 14:09:44 -0800 |
commit | 0eccf60bfa9190d1588b2bf07d23d7b9b3a19d9e (patch) | |
tree | 6198378343c1856ecbf1d41e52683112f940bbc2 /arch/arm/mach-pxa/pxa3xx.c | |
parent | b6ce068a1285a24185b01be8a49021827516b3e1 (diff) | |
parent | f9166e736e516a4b1de16577b5428afd0cffe325 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (30 commits)
[ARM] constify function pointer tables
[ARM] 4823/1: AT91 section fix
[ARM] 4824/1: pxa: clear RDH bit after any reset
[ARM] pxa: remove debugging PM: printk
ARM: OMAP1: Misc clean-up
ARM: OMAP1: Update defconfigs for omap1
ARM: OMAP1: Palm Tungsten E board clean-up
ARM: OMAP1: Use I2C bus registration helper for omap1
ARM: OMAP1: Remove omap_sram_idle()
ARM: OMAP1: PM fixes for OMAP1
ARM: OMAP1: Use MMC multislot structures for Siemens SX1 board
ARM: OMAP1: Make omap1 use MMC multislot structures
ARM: OMAP1: Change the comments to C style
ARM: OMAP1: Make omap1 boards to use omap_nand_platform_data
ARM: OMAP: Add helper module for board specific I2C bus registration
ARM: OMAP: Add dmtimer support for OMAP3
ARM: OMAP: Pre-3430 clean-up for dmtimer.c
ARM: OMAP: Add DMA support for chaining and 3430
ARM: OMAP: Add 24xx GPIO debounce support
ARM: OMAP: Get rid of unnecessary ifdefs in GPIO code
...
Diffstat (limited to 'arch/arm/mach-pxa/pxa3xx.c')
-rw-r--r-- | arch/arm/mach-pxa/pxa3xx.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index e47e67c11af..7cd9ef8deb0 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -266,8 +266,6 @@ static void pxa3xx_cpu_standby(unsigned int pwrmode) AD2D0ER = 0; AD2D1ER = 0; - - printk("PM: AD2D0SR=%08x ASCR=%08x\n", AD2D0SR, ASCR); } /* @@ -515,6 +513,14 @@ static int __init pxa3xx_init(void) int i, ret = 0; if (cpu_is_pxa3xx()) { + /* + * clear RDH bit every time after reset + * + * Note: the last 3 bits DxS are write-1-to-clear so carefully + * preserve them here in case they will be referenced later + */ + ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); + clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks)); if ((ret = pxa_init_dma(32))) |