diff options
author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2011-04-08 20:15:38 +0800 |
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committer | Eric Miao <eric.y.miao@gmail.com> | 2011-07-12 19:45:19 +0800 |
commit | 52585ccd93d75e368382af09ae336ed8f231642c (patch) | |
tree | 34104e267dc7e219285f2c48c190c05f2f02a69e /arch/arm/mach-pxa/clock.c | |
parent | 4e234cc0ee9db31d5b16b58d7c09af17246b2466 (diff) |
ARM: pxa: add clk_set_rate()
Since there're mulitple clock rates in some device controllers, enable
clk_set_rate() for this usage.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa/clock.c')
-rw-r--r-- | arch/arm/mach-pxa/clock.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c index d5152220ce9..4d466102a02 100644 --- a/arch/arm/mach-pxa/clock.c +++ b/arch/arm/mach-pxa/clock.c @@ -53,6 +53,21 @@ unsigned long clk_get_rate(struct clk *clk) } EXPORT_SYMBOL(clk_get_rate); +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long flags; + int ret = -EINVAL; + + if (clk->ops->setrate) { + spin_lock_irqsave(&clocks_lock, flags); + ret = clk->ops->setrate(clk, rate); + spin_unlock_irqrestore(&clocks_lock, flags); + } + + return ret; +} +EXPORT_SYMBOL(clk_set_rate); + void clk_dummy_enable(struct clk *clk) { } |