diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-02 10:34:25 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-02 10:34:25 -0800 |
| commit | 5057bfaff82e12f01a2ffd58f55535cbd7c5c3a2 (patch) | |
| tree | 0397253173308317480ed82f0b75af46cd3f6cb1 /arch/arm/mach-omap2/prm-regbits-44xx.h | |
| parent | 6c0ad5dfd3d5ad6def89b485ee52834547da239b (diff) | |
| parent | d702d12167a2c05a346f49aac7a311d597762495 (diff) | |
Merge branch 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (214 commits)
omap2: Initialize Menelaus and MMC for N8X0
AM3517 EVM: correct typo - tca6416 mispelt as tca6516
AM3517 EVM: Enable I2C support
AM35x: Enable OMAP_MUX in defconfig
AM35x: Add missing GPIO mux config for EHCI port
Zoom3: Defconfig update
omap: i2c: Fix muxing for command line enabled bus
OMAP4: clock: Remove clock hacks from timer-gp.c
OMAP4: clock: Add dummy clock nodes for interface clocks
OMAP4: clock: Rename leaf clock nodes to end with a _ick or _fck
OMAP2+ clock: revise omap2_clk_{disable,enable}()
OMAP2/3 clock: combine OMAP2 & 3 boot-time MPU rate change code
OMAP clockdomain: if no autodeps exist, don't try to add or remove them
OMAP hwmod: add hwmod class support
OMAP hwmod: convert header files with static allocations into C files
OMAP hwmod: convert hwmod to use hardware clock names rather than clkdev dev+con
OMAP clock: add omap_clk_get_by_name() for use by OMAP hwmod core code
OMAP3: clock: add capability to change rate of dpll4_m5_ck_3630
OMAP4 clock: drop the ALWAYS_ENABLED clock flag
OMAP clock: drop RATE_FIXED clock flag
...
Diffstat (limited to 'arch/arm/mach-omap2/prm-regbits-44xx.h')
| -rw-r--r-- | arch/arm/mach-omap2/prm-regbits-44xx.h | 1010 |
1 files changed, 505 insertions, 505 deletions
diff --git a/arch/arm/mach-omap2/prm-regbits-44xx.h b/arch/arm/mach-omap2/prm-regbits-44xx.h index 301c810fb26..597be4a2b9f 100644 --- a/arch/arm/mach-omap2/prm-regbits-44xx.h +++ b/arch/arm/mach-omap2/prm-regbits-44xx.h @@ -29,412 +29,412 @@ * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP, * PRM_LDO_SRAM_MPU_SETUP */ -#define OMAP4430_ABBOFF_ACT_EXPORT_SHIFT (1 << 1) +#define OMAP4430_ABBOFF_ACT_EXPORT_SHIFT 1 #define OMAP4430_ABBOFF_ACT_EXPORT_MASK BITFIELD(1, 1) /* * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP, * PRM_LDO_SRAM_MPU_SETUP */ -#define OMAP4430_ABBOFF_SLEEP_EXPORT_SHIFT (1 << 2) +#define OMAP4430_ABBOFF_SLEEP_EXPORT_SHIFT 2 #define OMAP4430_ABBOFF_SLEEP_EXPORT_MASK BITFIELD(2, 2) /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */ -#define OMAP4430_ABB_IVA_DONE_EN_SHIFT (1 << 31) +#define OMAP4430_ABB_IVA_DONE_EN_SHIFT 31 #define OMAP4430_ABB_IVA_DONE_EN_MASK BITFIELD(31, 31) /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */ -#define OMAP4430_ABB_IVA_DONE_ST_SHIFT (1 << 31) +#define OMAP4430_ABB_IVA_DONE_ST_SHIFT 31 #define OMAP4430_ABB_IVA_DONE_ST_MASK BITFIELD(31, 31) /* Used by PRM_IRQENABLE_MPU_2 */ -#define OMAP4430_ABB_MPU_DONE_EN_SHIFT (1 << 7) +#define OMAP4430_ABB_MPU_DONE_EN_SHIFT 7 #define OMAP4430_ABB_MPU_DONE_EN_MASK BITFIELD(7, 7) /* Used by PRM_IRQSTATUS_MPU_2 */ -#define OMAP4430_ABB_MPU_DONE_ST_SHIFT (1 << 7) +#define OMAP4430_ABB_MPU_DONE_ST_SHIFT 7 #define OMAP4430_ABB_MPU_DONE_ST_MASK BITFIELD(7, 7) /* Used by PRM_LDO_ABB_IVA_SETUP, PRM_LDO_ABB_MPU_SETUP */ -#define OMAP4430_ACTIVE_FBB_SEL_SHIFT (1 << 2) +#define OMAP4430_ACTIVE_FBB_SEL_SHIFT 2 #define OMAP4430_ACTIVE_FBB_SEL_MASK BITFIELD(2, 2) /* Used by PRM_LDO_ABB_IVA_SETUP, PRM_LDO_ABB_MPU_SETUP */ -#define OMAP4430_ACTIVE_RBB_SEL_SHIFT (1 << 1) +#define OMAP4430_ACTIVE_RBB_SEL_SHIFT 1 #define OMAP4430_ACTIVE_RBB_SEL_MASK BITFIELD(1, 1) /* Used by PM_ABE_PWRSTCTRL */ -#define OMAP4430_AESSMEM_ONSTATE_SHIFT (1 << 16) +#define OMAP4430_AESSMEM_ONSTATE_SHIFT 16 #define OMAP4430_AESSMEM_ONSTATE_MASK BITFIELD(16, 17) /* Used by PM_ABE_PWRSTCTRL */ -#define OMAP4430_AESSMEM_RETSTATE_SHIFT (1 << 8) +#define OMAP4430_AESSMEM_RETSTATE_SHIFT 8 #define OMAP4430_AESSMEM_RETSTATE_MASK BITFIELD(8, 8) /* Used by PM_ABE_PWRSTST */ -#define OMAP4430_AESSMEM_STATEST_SHIFT (1 << 4) +#define OMAP4430_AESSMEM_STATEST_SHIFT 4 #define OMAP4430_AESSMEM_STATEST_MASK BITFIELD(4, 5) /* * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP, * PRM_LDO_SRAM_MPU_SETUP */ -#define OMAP4430_AIPOFF_SHIFT (1 << 8) +#define OMAP4430_AIPOFF_SHIFT 8 #define OMAP4430_AIPOFF_MASK BITFIELD(8, 8) /* Used by PRM_VOLTCTRL */ -#define OMAP4430_AUTO_CTRL_VDD_CORE_L_SHIFT (1 << 0) +#define OMAP4430_AUTO_CTRL_VDD_CORE_L_SHIFT 0 #define OMAP4430_AUTO_CTRL_VDD_CORE_L_MASK BITFIELD(0, 1) /* Used by PRM_VOLTCTRL */ -#define OMAP4430_AUTO_CTRL_VDD_IVA_L_SHIFT (1 << 4) +#define OMAP4430_AUTO_CTRL_VDD_IVA_L_SHIFT 4 #define OMAP4430_AUTO_CTRL_VDD_IVA_L_MASK BITFIELD(4, 5) /* Used by PRM_VOLTCTRL */ -#define OMAP4430_AUTO_CTRL_VDD_MPU_L_SHIFT (1 << 2) +#define OMAP4430_AUTO_CTRL_VDD_MPU_L_SHIFT 2 #define OMAP4430_AUTO_CTRL_VDD_MPU_L_MASK BITFIELD(2, 3) /* Used by PM_CAM_PWRSTCTRL */ -#define OMAP4430_CAM_MEM_ONSTATE_SHIFT (1 << 16) +#define OMAP4430_CAM_MEM_ONSTATE_SHIFT 16 #define OMAP4430_CAM_MEM_ONSTATE_MASK BITFIELD(16, 17) /* Used by PM_CAM_PWRSTST */ -#define OMAP4430_CAM_MEM_STATEST_SHIFT (1 << 4) +#define OMAP4430_CAM_MEM_STATEST_SHIFT 4 #define OMAP4430_CAM_MEM_STATEST_MASK BITFIELD(4, 5) /* Used by PRM_CLKREQCTRL */ -#define OMAP4430_CLKREQ_COND_SHIFT (1 << 0) +#define OMAP4430_CLKREQ_COND_SHIFT 0 #define OMAP4430_CLKREQ_COND_MASK BITFIELD(0, 2) /* Used by PRM_VC_VAL_SMPS_RA_CMD */ -#define OMAP4430_CMDRA_VDD_CORE_L_SHIFT (1 << 0) +#define OMAP4430_CMDRA_VDD_CORE_L_SHIFT 0 #define OMAP4430_CMDRA_VDD_CORE_L_MASK BITFIELD(0, 7) /* Used by PRM_VC_VAL_SMPS_RA_CMD */ -#define OMAP4430_CMDRA_VDD_IVA_L_SHIFT (1 << 8) +#define OMAP4430_CMDRA_VDD_IVA_L_SHIFT 8 #define OMAP4430_CMDRA_VDD_IVA_L_MASK BITFIELD(8, 15) /* Used by PRM_VC_VAL_SMPS_RA_CMD */ -#define OMAP4430_CMDRA_VDD_MPU_L_SHIFT (1 << 16) +#define OMAP4430_CMDRA_VDD_MPU_L_SHIFT 16 #define OMAP4430_CMDRA_VDD_MPU_L_MASK BITFIELD(16, 23) /* Used by PRM_VC_CFG_CHANNEL */ -#define OMAP4430_CMD_VDD_CORE_L_SHIFT (1 << 4) +#define OMAP4430_CMD_VDD_CORE_L_SHIFT 4 #define OMAP4430_CMD_VDD_CORE_L_MASK BITFIELD(4, 4) /* Used by PRM_VC_CFG_CHANNEL */ -#define OMAP4430_CMD_VDD_IVA_L_SHIFT (1 << 12) +#define OMAP4430_CMD_VDD_IVA_L_SHIFT 12 #define OMAP4430_CMD_VDD_IVA_L_MASK BITFIELD(12, 12) /* Used by PRM_VC_CFG_CHANNEL */ -#define OMAP4430_CMD_VDD_MPU_L_SHIFT (1 << 17) +#define OMAP4430_CMD_VDD_MPU_L_SHIFT 17 #define OMAP4430_CMD_VDD_MPU_L_MASK BITFIELD(17, 17) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_CORE_OCMRAM_ONSTATE_SHIFT (1 << 18) +#define OMAP4430_CORE_OCMRAM_ONSTATE_SHIFT 18 #define OMAP4430_CORE_OCMRAM_ONSTATE_MASK BITFIELD(18, 19) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_CORE_OCMRAM_RETSTATE_SHIFT (1 << 9) +#define OMAP4430_CORE_OCMRAM_RETSTATE_SHIFT 9 #define OMAP4430_CORE_OCMRAM_RETSTATE_MASK BITFIELD(9, 9) /* Used by PM_CORE_PWRSTST */ -#define OMAP4430_CORE_OCMRAM_STATEST_SHIFT (1 << 6) +#define OMAP4430_CORE_OCMRAM_STATEST_SHIFT 6 #define OMAP4430_CORE_OCMRAM_STATEST_MASK BITFIELD(6, 7) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_CORE_OTHER_BANK_ONSTATE_SHIFT (1 << 16) +#define OMAP4430_CORE_OTHER_BANK_ONSTATE_SHIFT 16 #define OMAP4430_CORE_OTHER_BANK_ONSTATE_MASK BITFIELD(16, 17) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_CORE_OTHER_BANK_RETSTATE_SHIFT (1 << 8) +#define OMAP4430_CORE_OTHER_BANK_RETSTATE_SHIFT 8 #define OMAP4430_CORE_OTHER_BANK_RETSTATE_MASK BITFIELD(8, 8) /* Used by PM_CORE_PWRSTST */ -#define OMAP4430_CORE_OTHER_BANK_STATEST_SHIFT (1 << 4) +#define OMAP4430_CORE_OTHER_BANK_STATEST_SHIFT 4 #define OMAP4430_CORE_OTHER_BANK_STATEST_MASK BITFIELD(4, 5) /* Used by PRM_VC_VAL_BYPASS */ -#define OMAP4430_DATA_SHIFT (1 << 16) +#define OMAP4430_DATA_SHIFT 16 #define OMAP4430_DATA_MASK BITFIELD(16, 23) /* Used by PRM_DEVICE_OFF_CTRL */ -#define OMAP4430_DEVICE_OFF_ENABLE_SHIFT (1 << 0) +#define OMAP4430_DEVICE_OFF_ENABLE_SHIFT 0 #define OMAP4430_DEVICE_OFF_ENABLE_MASK BITFIELD(0, 0) /* Used by PRM_VC_CFG_I2C_MODE */ -#define OMAP4430_DFILTEREN_SHIFT (1 << 6) +#define OMAP4430_DFILTEREN_SHIFT 6 #define OMAP4430_DFILTEREN_MASK BITFIELD(6, 6) /* Used by PRM_IRQENABLE_MPU, PRM_IRQENABLE_TESLA */ -#define OMAP4430_DPLL_ABE_RECAL_EN_SHIFT (1 << 4) +#define OMAP4430_DPLL_ABE_RECAL_EN_SHIFT 4 #define OMAP4430_DPLL_ABE_RECAL_EN_MASK BITFIELD(4, 4) /* Used by PRM_IRQSTATUS_MPU, PRM_IRQSTATUS_TESLA */ -#define OMAP4430_DPLL_ABE_RECAL_ST_SHIFT (1 << 4) +#define OMAP4430_DPLL_ABE_RECAL_ST_SHIFT 4 #define OMAP4430_DPLL_ABE_RECAL_ST_MASK BITFIELD(4, 4) /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */ -#define OMAP4430_DPLL_CORE_RECAL_EN_SHIFT (1 << 0) +#define OMAP4430_DPLL_CORE_RECAL_EN_SHIFT 0 #define OMAP4430_DPLL_CORE_RECAL_EN_MASK BITFIELD(0, 0) /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */ -#define OMAP4430_DPLL_CORE_RECAL_ST_SHIFT (1 << 0) +#define OMAP4430_DPLL_CORE_RECAL_ST_SHIFT 0 #define OMAP4430_DPLL_CORE_RECAL_ST_MASK BITFIELD(0, 0) /* Used by PRM_IRQENABLE_MPU */ -#define OMAP4430_DPLL_DDRPHY_RECAL_EN_SHIFT (1 << 6) +#define OMAP4430_DPLL_DDRPHY_RECAL_EN_SHIFT 6 #define OMAP4430_DPLL_DDRPHY_RECAL_EN_MASK BITFIELD(6, 6) /* Used by PRM_IRQSTATUS_MPU */ -#define OMAP4430_DPLL_DDRPHY_RECAL_ST_SHIFT (1 << 6) +#define OMAP4430_DPLL_DDRPHY_RECAL_ST_SHIFT 6 #define OMAP4430_DPLL_DDRPHY_RECAL_ST_MASK BITFIELD(6, 6) /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU, PRM_IRQENABLE_TESLA */ -#define OMAP4430_DPLL_IVA_RECAL_EN_SHIFT (1 << 2) +#define OMAP4430_DPLL_IVA_RECAL_EN_SHIFT 2 #define OMAP4430_DPLL_IVA_RECAL_EN_MASK BITFIELD(2, 2) /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU, PRM_IRQSTATUS_TESLA */ -#define OMAP4430_DPLL_IVA_RECAL_ST_SHIFT (1 << 2) +#define OMAP4430_DPLL_IVA_RECAL_ST_SHIFT 2 #define OMAP4430_DPLL_IVA_RECAL_ST_MASK BITFIELD(2, 2) /* Used by PRM_IRQENABLE_MPU */ -#define OMAP4430_DPLL_MPU_RECAL_EN_SHIFT (1 << 1) +#define OMAP4430_DPLL_MPU_RECAL_EN_SHIFT 1 #define OMAP4430_DPLL_MPU_RECAL_EN_MASK BITFIELD(1, 1) /* Used by PRM_IRQSTATUS_MPU */ -#define OMAP4430_DPLL_MPU_RECAL_ST_SHIFT (1 << 1) +#define OMAP4430_DPLL_MPU_RECAL_ST_SHIFT 1 #define OMAP4430_DPLL_MPU_RECAL_ST_MASK BITFIELD(1, 1) /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */ -#define OMAP4430_DPLL_PER_RECAL_EN_SHIFT (1 << 3) +#define OMAP4430_DPLL_PER_RECAL_EN_SHIFT 3 #define OMAP4430_DPLL_PER_RECAL_EN_MASK BITFIELD(3, 3) /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */ -#define OMAP4430_DPLL_PER_RECAL_ST_SHIFT (1 << 3) +#define OMAP4430_DPLL_PER_RECAL_ST_SHIFT 3 #define OMAP4430_DPLL_PER_RECAL_ST_MASK BITFIELD(3, 3) /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */ -#define OMAP4430_DPLL_UNIPRO_RECAL_EN_SHIFT (1 << 7) +#define OMAP4430_DPLL_UNIPRO_RECAL_EN_SHIFT 7 #define OMAP4430_DPLL_UNIPRO_RECAL_EN_MASK BITFIELD(7, 7) /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */ -#define OMAP4430_DPLL_UNIPRO_RECAL_ST_SHIFT (1 << 7) +#define OMAP4430_DPLL_UNIPRO_RECAL_ST_SHIFT 7 #define OMAP4430_DPLL_UNIPRO_RECAL_ST_MASK BITFIELD(7, 7) /* Used by PRM_IRQENABLE_MPU */ -#define OMAP4430_DPLL_USB_RECAL_EN_SHIFT (1 << 5) +#define OMAP4430_DPLL_USB_RECAL_EN_SHIFT 5 #define OMAP4430_DPLL_USB_RECAL_EN_MASK BITFIELD(5, 5) /* Used by PRM_IRQSTATUS_MPU */ -#define OMAP4430_DPLL_USB_RECAL_ST_SHIFT (1 << 5) +#define OMAP4430_DPLL_USB_RECAL_ST_SHIFT 5 #define OMAP4430_DPLL_USB_RECAL_ST_MASK BITFIELD(5, 5) /* Used by PM_DSS_PWRSTCTRL */ -#define OMAP4430_DSS_MEM_ONSTATE_SHIFT (1 << 16) +#define OMAP4430_DSS_MEM_ONSTATE_SHIFT 16 #define OMAP4430_DSS_MEM_ONSTATE_MASK BITFIELD(16, 17) /* Used by PM_DSS_PWRSTCTRL */ -#define OMAP4430_DSS_MEM_RETSTATE_SHIFT (1 << 8) +#define OMAP4430_DSS_MEM_RETSTATE_SHIFT 8 #define OMAP4430_DSS_MEM_RETSTATE_MASK BITFIELD(8, 8) /* Used by PM_DSS_PWRSTST */ -#define OMAP4430_DSS_MEM_STATEST_SHIFT (1 << 4) +#define OMAP4430_DSS_MEM_STATEST_SHIFT 4 #define OMAP4430_DSS_MEM_STATEST_MASK BITFIELD(4, 5) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_DUCATI_L2RAM_ONSTATE_SHIFT (1 << 20) +#define OMAP4430_DUCATI_L2RAM_ONSTATE_SHIFT 20 #define OMAP4430_DUCATI_L2RAM_ONSTATE_MASK BITFIELD(20, 21) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_DUCATI_L2RAM_RETSTATE_SHIFT (1 << 10) +#define OMAP4430_DUCATI_L2RAM_RETSTATE_SHIFT 10 #define OMAP4430_DUCATI_L2RAM_RETSTATE_MASK BITFIELD(10, 10) /* Used by PM_CORE_PWRSTST */ -#define OMAP4430_DUCATI_L2RAM_STATEST_SHIFT (1 << 8) +#define OMAP4430_DUCATI_L2RAM_STATEST_SHIFT 8 #define OMAP4430_DUCATI_L2RAM_STATEST_MASK BITFIELD(8, 9) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_DUCATI_UNICACHE_ONSTATE_SHIFT (1 << 22) +#define OMAP4430_DUCATI_UNICACHE_ONSTATE_SHIFT 22 #define OMAP4430_DUCATI_UNICACHE_ONSTATE_MASK BITFIELD(22, 23) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_DUCATI_UNICACHE_RETSTATE_SHIFT (1 << 11) +#define OMAP4430_DUCATI_UNICACHE_RETSTATE_SHIFT 11 #define OMAP4430_DUCATI_UNICACHE_RETSTATE_MASK BITFIELD(11, 11) /* Used by PM_CORE_PWRSTST */ -#define OMAP4430_DUCATI_UNICACHE_STATEST_SHIFT (1 << 10) +#define OMAP4430_DUCATI_UNICACHE_STATEST_SHIFT 10 #define OMAP4430_DUCATI_UNICACHE_STATEST_MASK BITFIELD(10, 11) /* Used by RM_MPU_RSTST */ -#define OMAP4430_EMULATION_RST_SHIFT (1 << 0) +#define OMAP4430_EMULATION_RST_SHIFT 0 #define OMAP4430_EMULATION_RST_MASK BITFIELD(0, 0) /* Used by RM_DUCATI_RSTST */ -#define OMAP4430_EMULATION_RST1ST_SHIFT (1 << 3) +#define OMAP4430_EMULATION_RST1ST_SHIFT 3 #define OMAP4430_EMULATION_RST1ST_MASK BITFIELD(3, 3) /* Used by RM_DUCATI_RSTST */ -#define OMAP4430_EMULATION_RST2ST_SHIFT (1 << 4) +#define OMAP4430_EMULATION_RST2ST_SHIFT 4 #define OMAP4430_EMULATION_RST2ST_MASK BITFIELD(4, 4) /* Used by RM_IVAHD_RSTST */ -#define OMAP4430_EMULATION_SEQ1_RST1ST_SHIFT (1 << 3) +#define OMAP4430_EMULATION_SEQ1_RST1ST_SHIFT 3 #define OMAP4430_EMULATION_SEQ1_RST1ST_MASK BITFIELD(3, 3) /* Used by RM_IVAHD_RSTST */ -#define OMAP4430_EMULATION_SEQ2_RST2ST_SHIFT (1 << 4) +#define OMAP4430_EMULATION_SEQ2_RST2ST_SHIFT 4 #define OMAP4430_EMULATION_SEQ2_RST2ST_MASK BITFIELD(4, 4) /* Used by PM_EMU_PWRSTCTRL */ -#define OMAP4430_EMU_BANK_ONSTATE_SHIFT (1 << 16) +#define OMAP4430_EMU_BANK_ONSTATE_SHIFT 16 #define OMAP4430_EMU_BANK_ONSTATE_MASK BITFIELD(16, 17) /* Used by PM_EMU_PWRSTST */ -#define OMAP4430_EMU_BANK_STATEST_SHIFT (1 << 4) +#define OMAP4430_EMU_BANK_STATEST_SHIFT 4 #define OMAP4430_EMU_BANK_STATEST_MASK BITFIELD(4, 5) /* * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP, * PRM_LDO_SRAM_MPU_SETUP, PRM_SRAM_WKUP_SETUP */ -#define OMAP4430_ENABLE_RTA_EXPORT_SHIFT (1 << 0) +#define OMAP4430_ENABLE_RTA_EXPORT_SHIFT 0 #define OMAP4430_ENABLE_RTA_EXPORT_MASK BITFIELD(0, 0) /* * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP, * PRM_LDO_SRAM_MPU_SETUP */ -#define OMAP4430_ENFUNC1_SHIFT (1 << 3) +#define OMAP4430_ENFUNC1_SHIFT 3 #define OMAP4430_ENFUNC1_MASK BITFIELD(3, 3) /* * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP, * PRM_LDO_SRAM_MPU_SETUP */ -#define OMAP4430_ENFUNC3_SHIFT (1 << 5) +#define OMAP4430_ENFUNC3_SHIFT 5 #define OMAP4430_ENFUNC3_MASK BITFIELD(5, 5) /* * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP, * PRM_LDO_SRAM_MPU_SETUP */ -#define OMAP4430_ENFUNC4_SHIFT (1 << 6) +#define OMAP4430_ENFUNC4_SHIFT 6 #define OMAP4430_ENFUNC4_MASK BITFIELD(6, 6) /* * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP, * PRM_LDO_SRAM_MPU_SETUP */ -#define OMAP4430_ENFUNC5_SHIFT (1 << 7) +#define OMAP4430_ENFUNC5_SHIFT 7 #define OMAP4430_ENFUNC5_MASK BITFIELD(7, 7) /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */ -#define OMAP4430_ERRORGAIN_SHIFT (1 << 16) +#define OMAP4430_ERRORGAIN_SHIFT 16 #define OMAP4430_ERRORGAIN_MASK BITFIELD(16, 23) /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */ -#define OMAP4430_ERROROFFSET_SHIFT (1 << 24) +#define OMAP4430_ERROROFFSET_SHIFT 24 #define OMAP4430_ERROROFFSET_MASK BITFIELD(24, 31) /* Used by PRM_RSTST */ -#define OMAP4430_EXTERNAL_WARM_RST_SHIFT (1 << 5) +#define OMAP4430_EXTERNAL_WARM_RST_SHIFT 5 #define OMAP4430_EXTERNAL_WARM_RST_MASK BITFIELD(5, 5) /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */ -#define OMAP4430_FORCEUPDATE_SHIFT (1 << 1) +#define OMAP4430_FORCEUPDATE_SHIFT 1 #define OMAP4430_FORCEUPDATE_MASK BITFIELD(1, 1) /* Used by PRM_VP_CORE_VOLTAGE, PRM_VP_IVA_VOLTAGE, PRM_VP_MPU_VOLTAGE */ -#define OMAP4430_FORCEUPDATEWAIT_SHIFT (1 << 8) +#define OMAP4430_FORCEUPDATEWAIT_SHIFT 8 #define OMAP4430_FORCEUPDATEWAIT_MASK BITFIELD(8, 31) /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_TESLA */ -#define OMAP4430_FORCEWKUP_EN_SHIFT (1 << 10) +#define OMAP4430_FORCEWKUP_EN_SHIFT 10 #define OMAP4430_FORCEWKUP_EN_MASK BITFIELD(10, 10) /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_TESLA */ -#define OMAP4430_FORCEWKUP_ST_SHIFT (1 << 10) +#define OMAP4430_FORCEWKUP_ST_SHIFT 10 #define OMAP4430_FORCEWKUP_ST_MASK BITFIELD(10, 10) /* Used by PM_GFX_PWRSTCTRL */ -#define OMAP4430_GFX_MEM_ONSTATE_SHIFT (1 << 16) +#define OMAP4430_GFX_MEM_ONSTATE_SHIFT 16 #define OMAP4430_GFX_MEM_ONSTATE_MASK BITFIELD(16, 17) /* Used by PM_GFX_PWRSTST */ -#define OMAP4430_GFX_MEM_STATEST_SHIFT (1 << 4) +#define OMAP4430_GFX_MEM_STATEST_SHIFT 4 #define OMAP4430_GFX_MEM_STATEST_MASK BITFIELD(4, 5) /* Used by PRM_RSTST */ -#define OMAP4430_GLOBAL_COLD_RST_SHIFT (1 << 0) +#define OMAP4430_GLOBAL_COLD_RST_SHIFT 0 #define OMAP4430_GLOBAL_COLD_RST_MASK BITFIELD(0, 0) /* Used by PRM_RSTST */ -#define OMAP4430_GLOBAL_WARM_SW_RST_SHIFT (1 << 1) +#define OMAP4430_GLOBAL_WARM_SW_RST_SHIFT 1 #define OMAP4430_GLOBAL_WARM_SW_RST_MASK BITFIELD(1, 1) /* Used by PRM_IO_PMCTRL */ -#define OMAP4430_GLOBAL_WUEN_SHIFT (1 << 16) +#define OMAP4430_GLOBAL_WUEN_SHIFT 16 #define OMAP4430_GLOBAL_WUEN_MASK BITFIELD(16, 16) /* Used by PRM_VC_CFG_I2C_MODE */ -#define OMAP4430_HSMCODE_SHIFT (1 << 0) +#define OMAP4430_HSMCODE_SHIFT 0 #define OMAP4430_HSMCODE_MASK BITFIELD(0, 2) /* Used by PRM_VC_CFG_I2C_MODE */ -#define OMAP4430_HSMODEEN_SHIFT (1 << 3) +#define OMAP4430_HSMODEEN_SHIFT 3 #define OMAP4430_HSMODEEN_MASK BITFIELD(3, 3) /* Used by PRM_VC_CFG_I2C_CLK */ -#define OMAP4430_HSSCLH_SHIFT (1 << 16) +#define OMAP4430_HSSCLH_SHIFT 16 #define OMAP4430_HSSCLH_MASK BITFIELD(16, 23) /* Used by PRM_VC_CFG_I2C_CLK */ -#define OMAP4430_HSSCLL_SHIFT (1 << 24) +#define OMAP4430_HSSCLL_SHIFT 24 #define OMAP4430_HSSCLL_MASK BITFIELD(24, 31) /* Used by PM_IVAHD_PWRSTCTRL */ -#define OMAP4430_HWA_MEM_ONSTATE_SHIFT (1 << 16) +#define OMAP4430_HWA_MEM_ONSTATE_SHIFT 16 #define OMAP4430_HWA_MEM_ONSTATE_MASK BITFIELD(16, 17) /* Used by PM_IVAHD_PWRSTCTRL */ -#define OMAP4430_HWA_MEM_RETSTATE_SHIFT (1 << 8) +#define OMAP4430_HWA_MEM_RETSTATE_SHIFT 8 #define OMAP4430_HWA_MEM_RETSTATE_MASK BITFIELD(8, 8) /* Used by PM_IVAHD_PWRSTST */ -#define OMAP4430_HWA_MEM_STATEST_SHIFT (1 << 4) +#define OMAP4430_HWA_MEM_STATEST_SHIFT 4 #define OMAP4430_HWA_MEM_STATEST_MASK BITFIELD(4, 5) /* Used by RM_MPU_RSTST */ -#define OMAP4430_ICECRUSHER_MPU_RST_SHIFT (1 << 1) +#define OMAP4430_ICECRUSHER_MPU_RST_SHIFT 1 #define OMAP4430_ICECRUSHER_MPU_RST_MASK BITFIELD(1, 1) /* Used by RM_DUCATI_RSTST */ -#define OMAP4430_ICECRUSHER_RST1ST_SHIFT (1 << 5) +#define OMAP4430_ICECRUSHER_RST1ST_SHIFT 5 #define OMAP4430_ICECRUSHER_RST1ST_MASK BITFIELD(5, 5) /* Used by RM_DUCATI_RSTST */ -#define OMAP4430_ICECRUSHER_RST2ST_SHIFT (1 << 6) +#define OMAP4430_ICECRUSHER_RST2ST_SHIFT 6 #define OMAP4430_ICECRUSHER_RST2ST_MASK BITFIELD(6, 6) /* Used by RM_IVAHD_RSTST */ -#define OMAP4430_ICECRUSHER_SEQ1_RST1ST_SHIFT (1 << 5) +#define OMAP4430_ICECRUSHER_SEQ1_RST1ST_SHIFT 5 #define OMAP4430_ICECRUSHER_SEQ1_RST1ST_MASK BITFIELD(5, 5) /* Used by RM_IVAHD_RSTST */ -#define OMAP4430_ICECRUSHER_SEQ2_RST2ST_SHIFT (1 << 6) +#define OMAP4430_ICECRUSHER_SEQ2_RST2ST_SHIFT 6 #define OMAP4430_ICECRUSHER_SEQ2_RST2ST_MASK BITFIELD(6, 6) /* Used by PRM_RSTST */ -#define OMAP4430_ICEPICK_RST_SHIFT (1 << 9) +#define OMAP4430_ICEPICK_RST_SHIFT 9 #define OMAP4430_ICEPICK_RST_MASK BITFIELD(9, 9) /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */ -#define OMAP4430_INITVDD_SHIFT (1 << 2) +#define OMAP4430_INITVDD_SHIFT 2 #define OMAP4430_INITVDD_MASK BITFIELD(2, 2) /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */ -#define OMAP4430_INITVOLTAGE_SHIFT (1 << 8) +#define OMAP4430_INITVOLTAGE_SHIFT 8 #define OMAP4430_INITVOLTAGE_MASK BITFIELD(8, 15) /* @@ -442,47 +442,47 @@ * PM_ABE_PWRSTST, PM_GFX_PWRSTST, PM_MPU_PWRSTST, PM_CEFUSE_PWRSTST, * PM_DSS_PWRSTST, PM_L4PER_PWRSTST, PM_TESLA_PWRSTST, PM_IVAHD_PWRSTST */ -#define OMAP4430_INTRANSITION_SHIFT (1 << 20) +#define OMAP4430_INTRANSITION_SHIFT 20 #define OMAP4430_INTRANSITION_MASK BITFIELD(20, 20) /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */ -#define OMAP4430_IO_EN_SHIFT (1 << 9) +#define OMAP4430_IO_EN_SHIFT 9 #define OMAP4430_IO_EN_MASK BITFIELD(9, 9) /* Used by PRM_IO_PMCTRL */ -#define OMAP4430_IO_ON_STATUS_SHIFT (1 << 5) +#define OMAP4430_IO_ON_STATUS_SHIFT 5 #define OMAP4430_IO_ON_STATUS_MASK BITFIELD(5, 5) /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */ -#define OMAP4430_IO_ST_SHIFT (1 << 9) +#define OMAP4430_IO_ST_SHIFT 9 #define OMAP4430_IO_ST_MASK BITFIELD(9, 9) /* Used by PRM_IO_PMCTRL */ -#define OMAP4430_ISOCLK_OVERRIDE_SHIFT (1 << 0) +#define OMAP4430_ISOCLK_OVERRIDE_SHIFT 0 #define OMAP4430_ISOCLK_OVERRIDE_MASK BITFIELD(0, 0) /* Used by PRM_IO_PMCTRL */ -#define OMAP4430_ISOCLK_STATUS_SHIFT (1 << 1) +#define OMAP4430_ISOCLK_STATUS_SHIFT 1 #define OMAP4430_ISOCLK_STATUS_MASK BITFIELD(1, 1) /* Used by PRM_IO_PMCTRL */ -#define OMAP4430_ISOOVR_EXTEND_SHIFT (1 << 4) +#define OMAP4430_ISOOVR_EXTEND_SHIFT 4 #define OMAP4430_ISOOVR_EXTEND_MASK BITFIELD(4, 4) /* Used by PRM_IO_COUNT */ -#define OMAP4430_ISO_2_ON_TIME_SHIFT (1 << 0) +#define OMAP4430_ISO_2_ON_TIME_SHIFT 0 #define OMAP4430_ISO_2_ON_TIME_MASK BITFIELD(0, 7) /* Used by PM_L3INIT_PWRSTCTRL */ -#define OMAP4430_L3INIT_BANK1_ONSTATE_SHIFT (1 << 16) +#define OMAP4430_L3INIT_BANK1_ONSTATE_SHIFT 16 #define OMAP4430_L3INIT_BANK1_ONSTATE_MASK BITFIELD(16, 17) /* Used by PM_L3INIT_PWRSTCTRL */ -#define OMAP4430_L3INIT_BANK1_RETSTATE_SHIFT (1 << 8) +#define OMAP4430_L3INIT_BANK1_RETSTATE_SHIFT 8 #define OMAP4430_L3INIT_BANK1_RETSTATE_MASK BITFIELD(8, 8) /* Used by PM_L3INIT_PWRSTST */ -#define OMAP4430_L3INIT_BANK1_STATEST_SHIFT (1 << 4) +#define OMAP4430_L3INIT_BANK1_STATEST_SHIFT 4 #define OMAP4430_L3INIT_BANK1_STATEST_MASK BITFIELD(4, 5) /* @@ -490,7 +490,7 @@ * PM_MPU_PWRSTCTRL, PM_DSS_PWRSTCTRL, PM_L4PER_PWRSTCTRL, PM_TESLA_PWRSTCTRL, * PM_IVAHD_PWRSTCTRL */ -#define OMAP4430_LOGICRETSTATE_SHIFT (1 << 2) +#define OMAP4430_LOGICRETSTATE_SHIFT 2 #define OMAP4430_LOGICRETSTATE_MASK BITFIELD(2, 2) /* @@ -498,7 +498,7 @@ * PM_ABE_PWRSTST, PM_GFX_PWRSTST, PM_MPU_PWRSTST, PM_CEFUSE_PWRSTST, * PM_DSS_PWRSTST, PM_L4PER_PWRSTST, PM_TESLA_PWRSTST, PM_IVAHD_PWRSTST */ -#define OMAP4430_LOGICSTATEST_SHIFT (1 << 2) +#define OMAP4430_LOGICSTATEST_SHIFT 2 #define OMAP4430_LOGICSTATEST_MASK BITFIELD(2, 2) /* @@ -537,7 +537,7 @@ * RM_L4PER_SLIMBUS2_CONTEXT, RM_L4SEC_PKAEIP29_CONTEXT, * RM_TESLA_TESLA_CONTEXT, RM_IVAHD_IVAHD_CONTEXT, RM_IVAHD_SL2_CONTEXT */ -#define OMAP4430_LOSTCONTEXT_DFF_SHIFT (1 << 0) +#define OMAP4430_LOSTCONTEXT_DFF_SHIFT 0 #define OMAP4430_LOSTCONTEXT_DFF_MASK BITFIELD(0, 0) /* @@ -558,58 +558,58 @@ * RM_L4SEC_AES2_CONTEXT, RM_L4SEC_CRYPTODMA_CONTEXT, RM_L4SEC_DES3DES_CONTEXT, * RM_L4SEC_RNG_CONTEXT, RM_L4SEC_SHA2MD51_CONTEXT, RM_TESLA_TESLA_CONTEXT */ -#define OMAP4430_LOSTCONTEXT_RFF_SHIFT (1 << 1) +#define OMAP4430_LOSTCONTEXT_RFF_SHIFT 1 #define OMAP4430_LOSTCONTEXT_RFF_MASK BITFIELD(1, 1) /* Used by RM_ABE_AESS_CONTEXT */ -#define OMAP4430_LOSTMEM_AESSMEM_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_AESSMEM_SHIFT 8 #define OMAP4430_LOSTMEM_AESSMEM_MASK BITFIELD(8, 8) /* Used by RM_CAM_FDIF_CONTEXT, RM_CAM_ISS_CONTEXT */ -#define OMAP4430_LOSTMEM_CAM_MEM_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_CAM_MEM_SHIFT 8 #define OMAP4430_LOSTMEM_CAM_MEM_MASK BITFIELD(8, 8) /* Used by RM_L3INSTR_OCP_WP1_CONTEXT */ -#define OMAP4430_LOSTMEM_CORE_NRET_BANK_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_CORE_NRET_BANK_SHIFT 8 #define OMAP4430_LOSTMEM_CORE_NRET_BANK_MASK BITFIELD(8, 8) /* Renamed from LOSTMEM_CORE_NRET_BANK Used by RM_MEMIF_DMM_CONTEXT */ -#define OMAP4430_LOSTMEM_CORE_NRET_BANK_9_9_SHIFT (1 << 9) +#define OMAP4430_LOSTMEM_CORE_NRET_BANK_9_9_SHIFT 9 #define OMAP4430_LOSTMEM_CORE_NRET_BANK_9_9_MASK BITFIELD(9, 9) /* Used by RM_L3_2_OCMC_RAM_CONTEXT */ -#define OMAP4430_LOSTMEM_CORE_OCMRAM_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_CORE_OCMRAM_SHIFT 8 #define OMAP4430_LOSTMEM_CORE_OCMRAM_MASK BITFIELD(8, 8) /* * Used by RM_D2D_MODEM_ICR_CONTEXT, RM_MEMIF_DMM_CONTEXT, * RM_SDMA_SDMA_CONTEXT */ -#define OMAP4430_LOSTMEM_CORE_OTHER_BANK_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_CORE_OTHER_BANK_SHIFT 8 #define OMAP4430_LOSTMEM_CORE_OTHER_BANK_MASK BITFIELD(8, 8) /* Used by RM_DSS_DEISS_CONTEXT, RM_DSS_DSS_CONTEXT */ -#define OMAP4430_LOSTMEM_DSS_MEM_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_DSS_MEM_SHIFT 8 #define OMAP4430_LOSTMEM_DSS_MEM_MASK BITFIELD(8, 8) /* Used by RM_DUCATI_DUCATI_CONTEXT */ -#define OMAP4430_LOSTMEM_DUCATI_L2RAM_SHIFT (1 << 9) +#define OMAP4430_LOSTMEM_DUCATI_L2RAM_SHIFT 9 #define OMAP4430_LOSTMEM_DUCATI_L2RAM_MASK BITFIELD(9, 9) /* Used by RM_DUCATI_DUCATI_CONTEXT */ -#define OMAP4430_LOSTMEM_DUCATI_UNICACHE_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_DUCATI_UNICACHE_SHIFT 8 #define OMAP4430_LOSTMEM_DUCATI_UNICACHE_MASK BITFIELD(8, 8) /* Used by RM_EMU_DEBUGSS_CONTEXT */ -#define OMAP4430_LOSTMEM_EMU_BANK_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_EMU_BANK_SHIFT 8 #define OMAP4430_LOSTMEM_EMU_BANK_MASK BITFIELD(8, 8) /* Used by RM_GFX_GFX_CONTEXT */ -#define OMAP4430_LOSTMEM_GFX_MEM_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_GFX_MEM_SHIFT 8 #define OMAP4430_LOSTMEM_GFX_MEM_MASK BITFIELD(8, 8) /* Used by RM_IVAHD_IVAHD_CONTEXT */ -#define OMAP4430_LOSTMEM_HWA_MEM_SHIFT (1 << 10) +#define OMAP4430_LOSTMEM_HWA_MEM_SHIFT 10 #define OMAP4430_LOSTMEM_HWA_MEM_MASK BITFIELD(10, 10) /* @@ -619,19 +619,19 @@ * RM_L3INIT_TPPSS_CONTEXT, RM_L3INIT_UNIPRO1_CONTEXT, * RM_L3INIT_USB_OTG_CONTEXT, RM_L3INIT_XHPI_CONTEXT */ -#define OMAP4430_LOSTMEM_L3INIT_BANK1_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_L3INIT_BANK1_SHIFT 8 #define OMAP4430_LOSTMEM_L3INIT_BANK1_MASK BITFIELD(8, 8) /* Used by RM_MPU_MPU_CONTEXT */ -#define OMAP4430_LOSTMEM_MPU_L1_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_MPU_L1_SHIFT 8 #define OMAP4430_LOSTMEM_MPU_L1_MASK BITFIELD(8, 8) /* Used by RM_MPU_MPU_CONTEXT */ -#define OMAP4430_LOSTMEM_MPU_L2_SHIFT (1 << 9) +#define OMAP4430_LOSTMEM_MPU_L2_SHIFT 9 #define OMAP4430_LOSTMEM_MPU_L2_MASK BITFIELD(9, 9) /* Used by RM_MPU_MPU_CONTEXT */ -#define OMAP4430_LOSTMEM_MPU_RAM_SHIFT (1 << 10) +#define OMAP4430_LOSTMEM_MPU_RAM_SHIFT 10 #define OMAP4430_LOSTMEM_MPU_RAM_MASK BITFIELD(10, 10) /* @@ -639,14 +639,14 @@ * RM_L4PER_MCBSP4_CONTEXT, RM_L4PER_MMCSD3_CONTEXT, RM_L4PER_MMCSD4_CONTEXT, * RM_L4PER_MMCSD5_CONTEXT, RM_L4PER_SLIMBUS2_CONTEXT, RM_L4SEC_PKAEIP29_CONTEXT */ -#define OMAP4430_LOSTMEM_NONRETAINED_BANK_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_NONRETAINED_BANK_SHIFT 8 #define OMAP4430_LOSTMEM_NONRETAINED_BANK_MASK BITFIELD(8, 8) /* * Used by RM_ABE_DMIC_CONTEXT, RM_ABE_MCBSP1_CONTEXT, RM_ABE_MCBSP2_CONTEXT, * RM_ABE_MCBSP3_CONTEXT, RM_ABE_PDM_CONTEXT, RM_ABE_SLIMBUS_CONTEXT */ -#define OMAP4430_LOSTMEM_PERIHPMEM_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_PERIHPMEM_SHIFT 8 #define OMAP4430_LOSTMEM_PERIHPMEM_MASK BITFIELD(8, 8) /* @@ -654,35 +654,35 @@ * RM_L4PER_UART2_CONTEXT, RM_L4PER_UART3_CONTEXT, RM_L4PER_UART4_CONTEXT, * RM_L4SEC_CRYPTODMA_CONTEXT */ -#define OMAP4430_LOSTMEM_RETAINED_BANK_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_RETAINED_BANK_SHIFT 8 #define OMAP4430_LOSTMEM_RETAINED_BANK_MASK BITFIELD(8, 8) /* Used by RM_IVAHD_SL2_CONTEXT */ -#define OMAP4430_LOSTMEM_SL2_MEM_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_SL2_MEM_SHIFT 8 #define OMAP4430_LOSTMEM_SL2_MEM_MASK BITFIELD(8, 8) /* Used by RM_IVAHD_IVAHD_CONTEXT */ -#define OMAP4430_LOSTMEM_TCM1_MEM_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_TCM1_MEM_SHIFT 8 #define OMAP4430_LOSTMEM_TCM1_MEM_MASK BITFIELD(8, 8) /* Used by RM_IVAHD_IVAHD_CONTEXT */ -#define OMAP4430_LOSTMEM_TCM2_MEM_SHIFT (1 << 9) +#define OMAP4430_LOSTMEM_TCM2_MEM_SHIFT 9 #define OMAP4430_LOSTMEM_TCM2_MEM_MASK BITFIELD(9, 9) /* Used by RM_TESLA_TESLA_CONTEXT */ -#define OMAP4430_LOSTMEM_TESLA_EDMA_SHIFT (1 << 10) +#define OMAP4430_LOSTMEM_TESLA_EDMA_SHIFT 10 #define OMAP4430_LOSTMEM_TESLA_EDMA_MASK BITFIELD(10, 10) /* Used by RM_TESLA_TESLA_CONTEXT */ -#define OMAP4430_LOSTMEM_TESLA_L1_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_TESLA_L1_SHIFT 8 #define OMAP4430_LOSTMEM_TESLA_L1_MASK BITFIELD(8, 8) /* Used by RM_TESLA_TESLA_CONTEXT */ -#define OMAP4430_LOSTMEM_TESLA_L2_SHIFT (1 << 9) +#define OMAP4430_LOSTMEM_TESLA_L2_SHIFT 9 #define OMAP4430_LOSTMEM_TESLA_L2_MASK BITFIELD(9, 9) /* Used by RM_WKUP_SARRAM_CONTEXT */ -#define OMAP4430_LOSTMEM_WKUP_BANK_SHIFT (1 << 8) +#define OMAP4430_LOSTMEM_WKUP_BANK_SHIFT 8 #define OMAP4430_LOSTMEM_WKUP_BANK_MASK BITFIELD(8, 8) /* @@ -690,164 +690,164 @@ * PM_ABE_PWRSTCTRL, PM_GFX_PWRSTCTRL, PM_MPU_PWRSTCTRL, PM_CEFUSE_PWRSTCTRL, * PM_DSS_PWRSTCTRL, PM_L4PER_PWRSTCTRL, PM_TESLA_PWRSTCTRL, PM_IVAHD_PWRSTCTRL */ -#define OMAP4430_LOWPOWERSTATECHANGE_SHIFT (1 << 4) +#define OMAP4430_LOWPOWERSTATECHANGE_SHIFT 4 #define OMAP4430_LOWPOWERSTATECHANGE_MASK BITFIELD(4, 4) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_MEMORYCHANGE_SHIFT (1 << 3) +#define OMAP4430_MEMORYCHANGE_SHIFT 3 #define OMAP4430_MEMORYCHANGE_MASK BITFIELD(3, 3) /* Used by PRM_MODEM_IF_CTRL */ -#define OMAP4430_MODEM_READY_SHIFT (1 << 1) +#define OMAP4430_MODEM_READY_SHIFT 1 #define OMAP4430_MODEM_READY_MASK BITFIELD(1, 1) /* Used by PRM_MODEM_IF_CTRL */ -#define OMAP4430_MODEM_SHUTDOWN_IRQ_SHIFT (1 << 9) +#define OMAP4430_MODEM_SHUTDOWN_IRQ_SHIFT 9 #define OMAP4430_MODEM_SHUTDOWN_IRQ_MASK BITFIELD(9, 9) /* Used by PRM_MODEM_IF_CTRL */ -#define OMAP4430_MODEM_SLEEP_ST_SHIFT (1 << 16) +#define OMAP4430_MODEM_SLEEP_ST_SHIFT 16 #define OMAP4430_MODEM_SLEEP_ST_MASK BITFIELD(16, 16) /* Used by PRM_MODEM_IF_CTRL */ -#define OMAP4430_MODEM_WAKE_IRQ_SHIFT (1 << 8) +#define OMAP4430_MODEM_WAKE_IRQ_SHIFT 8 #define OMAP4430_MODEM_WAKE_IRQ_MASK BITFIELD(8, 8) /* Used by PM_MPU_PWRSTCTRL */ -#define OMAP4430_MPU_L1_ONSTATE_SHIFT (1 << 16) +#define OMAP4430_MPU_L1_ONSTATE_SHIFT 16 #define OMAP4430_MPU_L1_ONSTATE_MASK BITFIELD(16, 17) /* Used by PM_MPU_PWRSTCTRL */ -#define OMAP4430_MPU_L1_RETSTATE_SHIFT (1 << 8) +#define OMAP4430_MPU_L1_RETSTATE_SHIFT 8 #define OMAP4430_MPU_L1_RETSTATE_MASK BITFIELD(8, 8) /* Used by PM_MPU_PWRSTST */ -#define OMAP4430_MPU_L1_STATEST_SHIFT (1 << 4) +#define OMAP4430_MPU_L1_STATEST_SHIFT 4 #define OMAP4430_MPU_L1_STATEST_MASK BITFIELD(4, 5) /* Used by PM_MPU_PWRSTCTRL */ -#define OMAP4430_MPU_L2_ONSTATE_SHIFT (1 << 18) +#define OMAP4430_MPU_L2_ONSTATE_SHIFT 18 #define OMAP4430_MPU_L2_ONSTATE_MASK BITFIELD(18, 19) /* Used by PM_MPU_PWRSTCTRL */ -#define OMAP4430_MPU_L2_RETSTATE_SHIFT (1 << 9) +#define OMAP4430_MPU_L2_RETSTATE_SHIFT 9 #define OMAP4430_MPU_L2_RETSTATE_MASK BITFIELD(9, 9) /* Used by PM_MPU_PWRSTST */ -#define OMAP4430_MPU_L2_STATEST_SHIFT (1 << 6) +#define OMAP4430_MPU_L2_STATEST_SHIFT 6 #define OMAP4430_MPU_L2_STATEST_MASK BITFIELD(6, 7) /* Used by PM_MPU_PWRSTCTRL */ -#define OMAP4430_MPU_RAM_ONSTATE_SHIFT (1 << 20) +#define OMAP4430_MPU_RAM_ONSTATE_SHIFT 20 #define OMAP4430_MPU_RAM_ONSTATE_MASK BITFIELD(20, 21) /* Used by PM_MPU_PWRSTCTRL */ -#define OMAP4430_MPU_RAM_RETSTATE_SHIFT (1 << 10) +#define OMAP4430_MPU_RAM_RETSTATE_SHIFT 10 #define OMAP4430_MPU_RAM_RETSTATE_MASK BITFIELD(10, 10) /* Used by PM_MPU_PWRSTST */ -#define OMAP4430_MPU_RAM_STATEST_SHIFT (1 << 8) +#define OMAP4430_MPU_RAM_STATEST_SHIFT 8 #define OMAP4430_MPU_RAM_STATEST_MASK BITFIELD(8, 9) /* Used by PRM_RSTST */ -#define OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT (1 << 2) +#define OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT 2 #define OMAP4430_MPU_SECURITY_VIOL_RST_MASK BITFIELD(2, 2) /* Used by PRM_RSTST */ -#define OMAP4430_MPU_WDT_RST_SHIFT (1 << 3) +#define OMAP4430_MPU_WDT_RST_SHIFT 3 #define OMAP4430_MPU_WDT_RST_MASK BITFIELD(3, 3) /* Used by PM_L4PER_PWRSTCTRL */ -#define OMAP4430_NONRETAINED_BANK_ONSTATE_SHIFT (1 << 18) +#define OMAP4430_NONRETAINED_BANK_ONSTATE_SHIFT 18 #define OMAP4430_NONRETAINED_BANK_ONSTATE_MASK BITFIELD(18, 19) /* Used by PM_L4PER_PWRSTCTRL */ -#define OMAP4430_NONRETAINED_BANK_RETSTATE_SHIFT (1 << 9) +#define OMAP4430_NONRETAINED_BANK_RETSTATE_SHIFT 9 #define OMAP4430_NONRETAINED_BANK_RETSTATE_MASK BITFIELD(9, 9) /* Used by PM_L4PER_PWRSTST */ -#define OMAP4430_NONRETAINED_BANK_STATEST_SHIFT (1 << 6) +#define OMAP4430_NONRETAINED_BANK_STATEST_SHIFT 6 #define OMAP4430_NONRETAINED_BANK_STATEST_MASK BITFIELD(6, 7) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_OCP_NRET_BANK_ONSTATE_SHIFT (1 << 24) +#define OMAP4430_OCP_NRET_BANK_ONSTATE_SHIFT 24 #define OMAP4430_OCP_NRET_BANK_ONSTATE_MASK BITFIELD(24, 25) /* Used by PM_CORE_PWRSTCTRL */ -#define OMAP4430_OCP_NRET_BANK_RETSTATE_SHIFT (1 << 12) +#define OMAP4430_OCP_NRET_BANK_RETSTATE_SHIFT 12 #define OMAP4430_OCP_NRET_BANK_RETSTATE_MASK BITFIELD(12, 12) /* Used by PM_CORE_PWRSTST */ -#define OMAP4430_OCP_NRET_BANK_STATEST_SHIFT (1 << 12) +#define OMAP4430_OCP_NRET_BANK_STATEST_SHIFT 12 #define OMAP4430_OCP_NRET_BANK_STATEST_MASK BITFIELD(12, 13) /* * Used by PRM_VC_VAL_CMD_VDD_CORE_L, PRM_VC_VAL_CMD_VDD_IVA_L, * PRM_VC_VAL_CMD_VDD_MPU_L */ -#define OMAP4430_OFF_SHIFT (1 << 0) +#define OMAP4430_OFF_SHIFT 0 #define OMAP4430_OFF_MASK BITFIELD(0, 7) /* Used by PRM_LDO_BANDGAP_CTRL */ -#define OMAP4430_OFF_ENABLE_SHIFT (1 << 0) +#define OMAP4430_OFF_ENABLE_SHIFT 0 #define OMAP4430_OFF_ENABLE_MASK BITFIELD(0, 0) /* * Used by PRM_VC_VAL_CMD_VDD_CORE_L, PRM_VC_VAL_CMD_VDD_IVA_L, * PRM_VC_VAL_CMD_VDD_MPU_L */ -#define OMAP4430_ON_SHIFT (1 << 24) +#define OMAP4430_ON_SHIFT 24 #define OMAP4430_ON_MASK BITFIELD(24, 31) /* * Used by PRM_VC_VAL_CMD_VDD_CORE_L, PRM_VC_VAL_CMD_VDD_IVA_L, * PRM_VC_VAL_CMD_VDD_MPU_L */ -#define OMAP4430_ONLP_SHIFT (1 << 16) +#define OMAP4430_ONLP_SHIFT 16 #define OMAP4430_ONLP_MASK BITFIELD(16, 23) /* Used by PRM_LDO_ABB_IVA_CTRL, PRM_LDO_ABB_MPU_CTRL */ -#define OMAP4430_OPP_CHANGE_SHIFT (1 << 2) +#define OMAP4430_OPP_CHANGE_SHIFT 2 #define OMAP4430_OPP_CHANGE_MASK BITFIELD(2, 2) /* Used by PRM_LDO_ABB_IVA_CTRL, PRM_LDO_ABB_MPU_CTRL */ -#define OMAP4430_OPP_SEL_SHIFT (1 << 0) +#define OMAP4430_OPP_SEL_SHIFT 0 #define OMAP4430_OPP_SEL_MASK BITFIELD(0, 1) /* Us |