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authorDavid S. Miller <davem@davemloft.net>2010-04-21 00:50:39 -0700
committerDavid S. Miller <davem@davemloft.net>2010-04-21 00:50:39 -0700
commite04997b13a2c2fc93af970fe95fd29a74db113e8 (patch)
treea84ec3368edc3c2568a0d6acdfa0d0e50d8cacf7 /arch/arm/mach-mx5/cpu.c
parent6651ffc8e8bdd5fb4b7d1867c6cfebb4f309512c (diff)
parent05ce7bfe547c9fa967d9cab6c37867a9cb6fb3fa (diff)
Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
Diffstat (limited to 'arch/arm/mach-mx5/cpu.c')
-rw-r--r--arch/arm/mach-mx5/cpu.c53
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 41c769f08c4..2d37785e385 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -14,9 +14,62 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/module.h>
#include <mach/hardware.h>
#include <asm/io.h>
+static int cpu_silicon_rev = -1;
+
+#define SI_REV 0x48
+
+static void query_silicon_parameter(void)
+{
+ void __iomem *rom = ioremap(MX51_IROM_BASE_ADDR, MX51_IROM_SIZE);
+ u32 rev;
+
+ if (!rom) {
+ cpu_silicon_rev = -EINVAL;
+ return;
+ }
+
+ rev = readl(rom + SI_REV);
+ switch (rev) {
+ case 0x1:
+ cpu_silicon_rev = MX51_CHIP_REV_1_0;
+ break;
+ case 0x2:
+ cpu_silicon_rev = MX51_CHIP_REV_1_1;
+ break;
+ case 0x10:
+ cpu_silicon_rev = MX51_CHIP_REV_2_0;
+ break;
+ case 0x20:
+ cpu_silicon_rev = MX51_CHIP_REV_3_0;
+ break;
+ default:
+ cpu_silicon_rev = 0;
+ }
+
+ iounmap(rom);
+}
+
+/*
+ * Returns:
+ * the silicon revision of the cpu
+ * -EINVAL - not a mx51
+ */
+int mx51_revision(void)
+{
+ if (!cpu_is_mx51())
+ return -EINVAL;
+
+ if (cpu_silicon_rev == -1)
+ query_silicon_parameter();
+
+ return cpu_silicon_rev;
+}
+EXPORT_SYMBOL(mx51_revision);
+
static int __init post_cpu_init(void)
{
unsigned int reg;