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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2009-12-16 17:30:27 +0100
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-01-08 16:41:25 +0100
commitbc9ea6c7f5352f8857525b054bc3df784be1b8d5 (patch)
treec79ae8cd7f61b80c36cc9509a8cf95fc0bef19d8 /arch/arm/mach-mx2
parenta3f5ac7838a93977f71288310336a725eb6e62db (diff)
imx27: define and use MX27_IO_ADDRESS
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Rabin Vincent <rabin@rab.in> Cc: Javier Martin <javier.martin@vista-silicon.com> Cc: Valentin Longchamp <valentin.longchamp@epfl.ch> Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Diffstat (limited to 'arch/arm/mach-mx2')
-rw-r--r--arch/arm/mach-mx2/clock_imx27.c4
-rw-r--r--arch/arm/mach-mx2/cpu_imx27.c3
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 6db98566a72..bb9f60318fd 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -29,7 +29,7 @@
#include <mach/common.h>
#include <mach/hardware.h>
-#define IO_ADDR_CCM(off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))
+#define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))
/* Register offsets */
#define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -757,7 +757,7 @@ int __init mx27_clocks_init(unsigned long fref)
clk_enable(&uart1_clk);
#endif
- mxc_timer_init(&gpt1_clk, IO_ADDRESS(MX27_GPT1_BASE_ADDR),
+ mxc_timer_init(&gpt1_clk, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR),
MX27_INT_GPT1);
return 0;
diff --git a/arch/arm/mach-mx2/cpu_imx27.c b/arch/arm/mach-mx2/cpu_imx27.c
index 8c50c5e7c03..d8d3b2d84dc 100644
--- a/arch/arm/mach-mx2/cpu_imx27.c
+++ b/arch/arm/mach-mx2/cpu_imx27.c
@@ -39,7 +39,8 @@ static void query_silicon_parameter(void)
* the silicon revision very early we read it here to
* avoid any further hooks
*/
- val = __raw_readl(IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR) + SYS_CHIP_ID);
+ val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
+ + SYS_CHIP_ID));
cpu_silicon_rev = (int)(val >> 28);
cpu_partnumber = (int)((val >> 12) & 0xFFFF);