diff options
| author | Will Deacon <will.deacon@arm.com> | 2012-02-03 14:46:01 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-03-24 09:38:53 +0000 |
| commit | d33c88c659d708e7c5d518a05ef9349a36217bb2 (patch) | |
| tree | e5914979c7e9049b3841fa16ec50338ec54c8bda /arch/arm/kernel/perf_event.c | |
| parent | f153d017ab70d2954f5456278f3cbc39e6e060f3 (diff) | |
ARM: 7315/1: perf: add support for the Cortex-A7 PMU
Cortex-A7 implements an ARMv7-compatible PMU compliant with the PMUv2
architecture specification.
This patch adds support for the PMU to the ARM perf backend.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/perf_event.c')
| -rw-r--r-- | arch/arm/kernel/perf_event.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 5bb91bf3d47..ab59c3bae5e 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -712,6 +712,9 @@ init_hw_perf_events(void) case 0xC0F0: /* Cortex-A15 */ cpu_pmu = armv7_a15_pmu_init(); break; + case 0xC070: /* Cortex-A7 */ + cpu_pmu = armv7_a7_pmu_init(); + break; } /* Intel CPUs [xscale]. */ } else if (0x69 == implementor) { |