diff options
author | Arnd Bergmann <arnd@arndb.de> | 2011-10-20 14:51:38 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-20 14:51:38 +0200 |
commit | 1faca4ced8594d3586302e8d1788a60932f2bbca (patch) | |
tree | 5130aaa4803a322f3d1f0ff6406f047ed0dba475 /arch/arm/Kconfig | |
parent | 112d17d6f75b93e1dcaec2e2232a411148b3bf71 (diff) | |
parent | 6b6844dd54e4196dd9818bc63b319f93c37a08be (diff) |
Merge branch 'samsung/devel' of git+ssh://git.linaro.org/home/arndbergmann/public_git/arm-soc into next/devel2
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r-- | arch/arm/Kconfig | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3c47745c7f7..bd220b85c55 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -725,9 +725,6 @@ config ARCH_S3C64XX select SAMSUNG_IRQ_VIC_TIMER select SAMSUNG_IRQ_UART select S3C_GPIO_TRACK - select S3C_GPIO_PULL_UPDOWN - select S3C_GPIO_CFG_S3C24XX - select S3C_GPIO_CFG_S3C64XX select S3C_DEV_NAND select USB_ARCH_HAS_OHCI select SAMSUNG_GPIOLIB_4BIT @@ -1284,6 +1281,20 @@ config ARM_ERRATA_364296 processor into full low interrupt latency mode. ARM11MPCore is not affected. +config ARM_ERRATA_764369 + bool "ARM errata: Data cache line maintenance operation by MVA may not succeed" + depends on CPU_V7 && SMP + help + This option enables the workaround for erratum 764369 + affecting Cortex-A9 MPCore with two or more processors (all + current revisions). Under certain timing circumstances, a data + cache line maintenance operation by MVA targeting an Inner + Shareable memory region may fail to proceed up to either the + Point of Coherency or to the Point of Unification of the + system. This workaround adds a DSB instruction before the + relevant cache maintenance functions and sets a specific bit + in the diagnostic control register of the SCU. + endmenu source "arch/arm/common/Kconfig" @@ -2083,7 +2094,7 @@ menu "Power management options" source "kernel/power/Kconfig" config ARCH_SUSPEND_POSSIBLE - depends on !ARCH_S5P64X0 && !ARCH_S5PC100 + depends on !ARCH_S5PC100 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE def_bool y |