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authorSenthil Balasubramanian <senthilkumar@atheros.com>2011-04-22 11:32:09 +0530
committerJohn W. Linville <linville@tuxdriver.com>2011-04-25 14:50:17 -0400
commitd1c038d620c45fbbc65bcadf813a86bca686dd31 (patch)
tree7041ac78c80e58f43fb507c209608d8a3bab7756 /REPORTING-BUGS
parent353e5019e048562dc8f434c6237d41ef5e758922 (diff)
ath9k_hw: Fix incorrect baseband PLL phase shift for AR9485
we should program the AR9485 baseband PLL phase shift to 6 and a redundant setting overwrites the correct value. Remove the incorrect and unwnated register setting. Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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