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| author | Brice Goglin <brice@myri.com> | 2007-04-10 21:21:39 +0200 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2007-04-11 11:54:44 -0400 |
| commit | f19baaeaadf9d77bcc6c122500c70b27c5bbc7a4 (patch) | |
| tree | 24c927e32a7d9c33098ac84aa9718917835d9e35 /Documentation/specialix.txt | |
| parent | ae8509b1876e6e1074edc9846296e80983e30502 (diff) | |
myri10ge: more Intel chipsets providing aligned PCIe completions
Add the Intel 5000 southbridge (aka Intel 6310/6311/6321ESB) PCIe ports
and the Intel E30x0 chipsets to the whitelist of aligned PCIe completion.
Signed-off-by: Brice Goglin <brice@myri.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'Documentation/specialix.txt')
0 files changed, 0 insertions, 0 deletions