diff options
author | Grant Likely <grant.likely@secretlab.ca> | 2011-10-05 10:52:27 -0600 |
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committer | Grant Likely <grant.likely@secretlab.ca> | 2011-10-05 10:52:27 -0600 |
commit | 9514a56753a8d379db36bed424588e1842f2bfcc (patch) | |
tree | d13cdfcd9473f521c3b108770dba57e81e557a30 /Documentation/devicetree | |
parent | 4cd7f7a31178ff8a15ad2bc1258b9b2bf2cf51a4 (diff) | |
parent | 6add6967a4a57e2156b96e62f28bcbe1901d16c1 (diff) |
Merge branch 'for-grant' of git://git.jdl.com/software/linux-3.0 into devicetree/next
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/gpio/pl061-gpio.txt | 10 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi_pl022.txt | 12 |
2 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/pl061-gpio.txt b/Documentation/devicetree/bindings/gpio/pl061-gpio.txt new file mode 100644 index 00000000000..a2c416bcbcc --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/pl061-gpio.txt @@ -0,0 +1,10 @@ +ARM PL061 GPIO controller + +Required properties: +- compatible : "arm,pl061", "arm,primecell" +- #gpio-cells : Should be two. The first cell is the pin number and the + second cell is used to specify optional parameters: + - bit 0 specifies polarity (0 for normal, 1 for inverted) +- gpio-controller : Marks the device node as a GPIO controller. +- interrupts : Interrupt mapping for GPIO IRQ. + diff --git a/Documentation/devicetree/bindings/spi/spi_pl022.txt b/Documentation/devicetree/bindings/spi/spi_pl022.txt new file mode 100644 index 00000000000..306ec3ff3c0 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi_pl022.txt @@ -0,0 +1,12 @@ +ARM PL022 SPI controller + +Required properties: +- compatible : "arm,pl022", "arm,primecell" +- reg : Offset and length of the register set for the device +- interrupts : Should contain SPI controller interrupt + +Optional properties: +- cs-gpios : should specify GPIOs used for chipselects. + The gpios will be referred to as reg = <index> in the SPI child nodes. + If unspecified, a single SPI device without a chip select can be used. + |