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authorMark Brown <broonie@opensource.wolfsonmicro.com>2011-04-18 17:12:14 +0100
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-04-18 17:12:14 +0100
commitfac56c2df51bc29b07b3c2dcfabf32a015a0522c (patch)
tree1ff5d84ecf4ea0bcbd42e2ef9624b5ade3810890 /Documentation/PCI
parent6caa15d0b84d2ea688fd31f4f172c8353463e109 (diff)
parenta6360dd37e1a144ed11e6548371bade559a1e4df (diff)
Merge commit 'v2.6.39-rc3' into for-2.6.39
Diffstat (limited to 'Documentation/PCI')
-rw-r--r--Documentation/PCI/MSI-HOWTO.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/PCI/MSI-HOWTO.txt b/Documentation/PCI/MSI-HOWTO.txt
index dcf7acc720e..3f5e0b09bed 100644
--- a/Documentation/PCI/MSI-HOWTO.txt
+++ b/Documentation/PCI/MSI-HOWTO.txt
@@ -253,8 +253,8 @@ In constrast, MSI is restricted to a maximum of 32 interrupts (and
must be a power of two). In addition, the MSI interrupt vectors must
be allocated consecutively, so the system may not be able to allocate
as many vectors for MSI as it could for MSI-X. On some platforms, MSI
-interrupts must all be targetted at the same set of CPUs whereas MSI-X
-interrupts can all be targetted at different CPUs.
+interrupts must all be targeted at the same set of CPUs whereas MSI-X
+interrupts can all be targeted at different CPUs.
4.5.2 Spinlocks