diff options
| author | Borislav Petkov <borislav.petkov@amd.com> | 2012-09-12 18:06:00 +0200 |
|---|---|---|
| committer | Borislav Petkov <bp@alien8.de> | 2012-11-28 11:45:46 +0100 |
| commit | bb89f5a0547a56cf2406f1c3d6cd44f8fa62256d (patch) | |
| tree | ab3801986b88f2f435a014684f4b802ac6779659 | |
| parent | 33ca0643c9a0ea50d0dc9bf0e9e9044502c7038c (diff) | |
amd64_edac: Fix K8 chip select reporting
This basically reverts 603adaf6b3e3 ("amd64_edac: fix K8 chip select
reporting") because it was a clumsy workaround for DIMM sizes reporting
on K8 which got superceded by a much more correct one with 41d8bfaba70
("amd64_edac: Improve DRAM address mapping") without removing the prior
one. Remove it now finally.
Reported-by: Josh Hunt <johunt@akamai.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| -rw-r--r-- | drivers/edac/amd64_edac.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index d21efb246d4..cfb7e57786d 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1596,14 +1596,11 @@ static void f1x_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr, */ static void amd64_debug_display_dimm_sizes(struct amd64_pvt *pvt, u8 ctrl) { - int dimm, size0, size1, factor = 0; + int dimm, size0, size1; u32 *dcsb = ctrl ? pvt->csels[1].csbases : pvt->csels[0].csbases; u32 dbam = ctrl ? pvt->dbam1 : pvt->dbam0; if (boot_cpu_data.x86 == 0xf) { - if (pvt->dclr0 & WIDTH_128) - factor = 1; - /* K8 families < revF not supported yet */ if (pvt->ext_model < K8_REV_F) return; @@ -1634,8 +1631,8 @@ static void amd64_debug_display_dimm_sizes(struct amd64_pvt *pvt, u8 ctrl) DBAM_DIMM(dimm, dbam)); amd64_info(EDAC_MC ": %d: %5dMB %d: %5dMB\n", - dimm * 2, size0 << factor, - dimm * 2 + 1, size1 << factor); + dimm * 2, size0, + dimm * 2 + 1, size1); } } |