aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSri Deevi <Srinivasa.Deevi@conexant.com>2009-03-21 22:00:20 -0300
committerMauro Carvalho Chehab <mchehab@redhat.com>2009-04-06 21:44:07 -0300
commitecc67d108d6ade14d79c8546f5db36613c780d59 (patch)
tree638c133624821d7f409fce13c1a71524d4ce6215
parentb1196126b016d0f28a99c16b27c403d0ecac501a (diff)
V4L/DVB (11129): cx231xx: Use generic names for each device block
Signed-off-by: Srinivasa Deevi <srinivasa.deevi@conexant.com> Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r--drivers/media/video/cx231xx/cx231xx-avcore.c1171
-rw-r--r--drivers/media/video/cx231xx/cx231xx-core.c16
-rw-r--r--drivers/media/video/cx231xx/cx231xx-pcb-cfg.h8
-rw-r--r--drivers/media/video/cx231xx/cx231xx-video.c48
-rw-r--r--drivers/media/video/cx231xx/cx231xx.h36
5 files changed, 538 insertions, 741 deletions
diff --git a/drivers/media/video/cx231xx/cx231xx-avcore.c b/drivers/media/video/cx231xx/cx231xx-avcore.c
index 226299d62d7..1be3881be99 100644
--- a/drivers/media/video/cx231xx/cx231xx-avcore.c
+++ b/drivers/media/video/cx231xx/cx231xx-avcore.c
@@ -40,54 +40,77 @@
#include "cx231xx.h"
/******************************************************************************
- * C O L I B R I - B L O C K C O N T R O L functions *
+ -: BLOCK ARRANGEMENT :-
+ I2S block ----------------------|
+ [I2S audio] |
+ |
+ Analog Front End --> Direct IF -|-> Cx25840 --> Audio
+ [video & audio] | [Audio]
+ |
+ |-> Cx25840 --> Video
+ [Video]
+
+*******************************************************************************/
+
+/******************************************************************************
+ * A F E - B L O C K C O N T R O L functions *
+ * [ANALOG FRONT END] *
******************************************************************************/
-int cx231xx_colibri_init_super_block(struct cx231xx *dev, u32 ref_count)
+static int afe_write_byte(struct cx231xx *dev, u16 saddr, u8 data)
+{
+ return cx231xx_write_i2c_data(dev, AFE_DEVICE_ADDRESS,
+ saddr, 2, data, 1);
+}
+
+static int afe_read_byte(struct cx231xx *dev, u16 saddr, u8 *data)
+{
+ int status;
+ u32 temp = 0;
+
+ status = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS,
+ saddr, 2, &temp, 1);
+ *data = (u8) temp;
+ return status;
+}
+
+int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count)
{
int status = 0;
u8 temp = 0;
- u32 colibri_power_status = 0;
+ u8 afe_power_status = 0;
int i = 0;
/* super block initialize */
temp = (u8) (ref_count & 0xff);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- SUP_BLK_TUNE2, 2, temp, 1);
+ status = afe_write_byte(dev, SUP_BLK_TUNE2, temp);
if (status < 0)
return status;
- status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- SUP_BLK_TUNE2, 2,
- &colibri_power_status, 1);
+ status = afe_read_byte(dev, SUP_BLK_TUNE2, &afe_power_status);
if (status < 0)
return status;
temp = (u8) ((ref_count & 0x300) >> 8);
temp |= 0x40;
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- SUP_BLK_TUNE1, 2, temp, 1);
+ status = afe_write_byte(dev, SUP_BLK_TUNE1, temp);
if (status < 0)
return status;
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- SUP_BLK_PLL2, 2, 0x0f, 1);
+ status = afe_write_byte(dev, SUP_BLK_PLL2, 0x0f);
if (status < 0)
return status;
/* enable pll */
- while (colibri_power_status != 0x18) {
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2, 0x18, 1);
+ while (afe_power_status != 0x18) {
+ status = afe_write_byte(dev, SUP_BLK_PWRDN, 0x18);
if (status < 0) {
cx231xx_info(
": Init Super Block failed in send cmd\n");
break;
}
- status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
- &colibri_power_status, 1);
- colibri_power_status &= 0xff;
+ status = afe_read_byte(dev, SUP_BLK_PWRDN, &afe_power_status);
+ afe_power_status &= 0xff;
if (status < 0) {
cx231xx_info(
": Init Super Block failed in receive cmd\n");
@@ -106,101 +129,75 @@ int cx231xx_colibri_init_super_block(struct cx231xx *dev, u32 ref_count)
return status;
/* start tuning filter */
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- SUP_BLK_TUNE3, 2, 0x40, 1);
+ status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x40);
if (status < 0)
return status;
msleep(5);
/* exit tuning */
- status =
- cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE3,
- 2, 0x00, 1);
+ status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x00);
return status;
}
-int cx231xx_colibri_init_channels(struct cx231xx *dev)
+int cx231xx_afe_init_channels(struct cx231xx *dev)
{
int status = 0;
/* power up all 3 channels, clear pd_buffer */
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1);
+ status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, 0x00);
+ status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, 0x00);
+ status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, 0x00);
/* Enable quantizer calibration */
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_COM_QUANT, 2, 0x02, 1);
+ status = afe_write_byte(dev, ADC_COM_QUANT, 0x02);
/* channel initialize, force modulator (fb) reset */
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_FB_FRCRST_CH1, 2, 0x17, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_FB_FRCRST_CH2, 2, 0x17, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_FB_FRCRST_CH3, 2, 0x17, 1);
+ status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x17);
+ status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x17);
+ status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x17);
/* start quantilizer calibration */
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_CAL_ATEST_CH1, 2, 0x10, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_CAL_ATEST_CH2, 2, 0x10, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_CAL_ATEST_CH3, 2, 0x10, 1);
+ status = afe_write_byte(dev, ADC_CAL_ATEST_CH1, 0x10);
+ status = afe_write_byte(dev, ADC_CAL_ATEST_CH2, 0x10);
+ status = afe_write_byte(dev, ADC_CAL_ATEST_CH3, 0x10);
msleep(5);
/* exit modulator (fb) reset */
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_FB_FRCRST_CH1, 2, 0x07, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_FB_FRCRST_CH2, 2, 0x07, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_FB_FRCRST_CH3, 2, 0x07, 1);
+ status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x07);
+ status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x07);
+ status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x07);
/* enable the pre_clamp in each channel for single-ended input */
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_NTF_PRECLMP_EN_CH1, 2, 0xf0, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_NTF_PRECLMP_EN_CH2, 2, 0xf0, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_NTF_PRECLMP_EN_CH3, 2, 0xf0, 1);
+ status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH1, 0xf0);
+ status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH2, 0xf0);
+ status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, 0xf0);
/* use diode instead of resistor, so set term_en to 0, res_en to 0 */
- status = cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8,
+ status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
ADC_QGAIN_RES_TRM_CH1, 3, 7, 0x00);
- status = cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8,
+ status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
ADC_QGAIN_RES_TRM_CH2, 3, 7, 0x00);
- status = cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8,
+ status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
ADC_QGAIN_RES_TRM_CH3, 3, 7, 0x00);
/* dynamic element matching off */
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_DCSERVO_DEM_CH1, 2, 0x03, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_DCSERVO_DEM_CH2, 2, 0x03, 1);
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_DCSERVO_DEM_CH3, 2, 0x03, 1);
+ status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH1, 0x03);
+ status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH2, 0x03);
+ status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, 0x03);
return status;
}
-int cx231xx_colibri_setup_AFE_for_baseband(struct cx231xx *dev)
+int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev)
{
- u32 c_value = 0;
+ u8 c_value = 0;
int status = 0;
- status =
- cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH2, 2, &c_value, 1);
+ status = afe_read_byte(dev, ADC_PWRDN_CLAMP_CH2, &c_value);
c_value &= (~(0x50));
- status =
- cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH2, 2, c_value, 1);
+ status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, c_value);
return status;
}
@@ -214,52 +211,44 @@ int cx231xx_colibri_setup_AFE_for_baseband(struct cx231xx *dev)
channel 2 ----- pin 5 to pin8(in reg is 5-8)
channel 3 ----- pin 9 to pin 12(in reg is 9-11)
*/
-int cx231xx_colibri_set_input_mux(struct cx231xx *dev, u32 input_mux)
+int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux)
{
u8 ch1_setting = (u8) input_mux;
u8 ch2_setting = (u8) (input_mux >> 8);
u8 ch3_setting = (u8) (input_mux >> 16);
int status = 0;
- u32 value = 0;
+ u8 value = 0;
if (ch1_setting != 0) {
- status =
- cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_INPUT_CH1, 2, &value, 1);
+ status = afe_read_byte(dev, ADC_INPUT_CH1, &value);
value &= (!INPUT_SEL_MASK);
value |= (ch1_setting - 1) << 4;
value &= 0xff;
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_INPUT_CH1, 2, value, 1);
+ status = afe_write_byte(dev, ADC_INPUT_CH1, value);
}
if (ch2_setting != 0) {
- status =
- cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_INPUT_CH2, 2, &value, 1);
+ status = afe_read_byte(dev, ADC_INPUT_CH2, &value);
value &= (!INPUT_SEL_MASK);
value |= (ch2_setting - 1) << 4;
value &= 0xff;
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_INPUT_CH2, 2, value, 1);
+ status = afe_write_byte(dev, ADC_INPUT_CH2, value);
}
/* For ch3_setting, the value to put in the register is
7 less than the input number */
if (ch3_setting != 0) {
- status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_INPUT_CH3, 2, &value, 1);
+ status = afe_read_byte(dev, ADC_INPUT_CH3, &value);
value &= (!INPUT_SEL_MASK);
value |= (ch3_setting - 1) << 4;
value &= 0xff;
- status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_INPUT_CH3, 2, value, 1);
+ status = afe_write_byte(dev, ADC_INPUT_CH3, value);
}
return status;
}
-int cx231xx_colibri_set_mode(struct cx231xx *dev, enum AFE_MODE mode)
+int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode)
{
int status = 0;
@@ -273,7 +262,7 @@ int cx231xx_colibri_set_mode(struct cx231xx *dev, enum AFE_MODE mode)
/* SetupAFEforLowIF(); */
break;
case AFE_MODE_BASEBAND:
- status = cx231xx_colibri_setup_AFE_for_baseband(dev);
+ status = cx231xx_afe_setup_AFE_for_baseband(dev);
break;
case AFE_MODE_EU_HI_IF:
/* SetupAFEforEuHiIF(); */
@@ -286,110 +275,76 @@ int cx231xx_colibri_set_mode(struct cx231xx *dev, enum AFE_MODE mode)
break;
}
- if ((mode != dev->colibri_mode) &&
+ if ((mode != dev->afe_mode) &&
(dev->video_input == CX231XX_VMUX_TELEVISION))
- status = cx231xx_colibri_adjust_ref_count(dev,
+ status = cx231xx_afe_adjust_ref_count(dev,
CX231XX_VMUX_TELEVISION);
- dev->colibri_mode = mode;
+ dev->afe_mode = mode;
return status;
}
-int cx231xx_colibri_update_power_control(struct cx231xx *dev,
+int cx231xx_afe_update_power_control(struct cx231xx *dev,
enum AV_MODE avmode)
{
- u32 colibri_power_status = 0;
+ u8 afe_power_status = 0;
int status = 0;
switch (dev->model) {
case CX231XX_BOARD_CNXT_RDE_250:
case CX231XX_BOARD_CNXT_RDU_250:
if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
- while (colibri_power_status != (FLD_PWRDN_TUNING_BIAS |
+ while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL)) {
- status = cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
+ status = afe_write_byte(dev, SUP_BLK_PWRDN,
FLD_PWRDN_TUNING_BIAS |
- FLD_PWRDN_ENABLE_PLL,
- 1);
- status |= cx231xx_read_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
- &colibri_power_status,
- 1);
+ FLD_PWRDN_ENABLE_PLL);
+ status |= afe_read_byte(dev, SUP_BLK_PWRDN,
+ &afe_power_status);
if (status < 0)
break;
}
- status = cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH1, 2, 0x00,
- 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH2, 2, 0x00,
- 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH3, 2, 0x00,
- 1);
+ status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
+ 0x00);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
+ 0x00);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
+ 0x00);
} else if (avmode == POLARIS_AVMODE_DIGITAL) {
- status = cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH1, 2, 0x70,
- 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH2, 2, 0x70,
- 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH3, 2, 0x70,
- 1);
-
- status |= cx231xx_read_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
- &colibri_power_status, 1);
- colibri_power_status |= FLD_PWRDN_PD_BANDGAP |
+ status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
+ 0x70);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
+ 0x70);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
+ 0x70);
+
+ status |= afe_read_byte(dev, SUP_BLK_PWRDN,
+ &afe_power_status);
+ afe_power_status |= FLD_PWRDN_PD_BANDGAP |
FLD_PWRDN_PD_BIAS |
FLD_PWRDN_PD_TUNECK;
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
- colibri_power_status, 1);
+ status |= afe_write_byte(dev, SUP_BLK_PWRDN,
+ afe_power_status);
} else if (avmode == POLARIS_AVMODE_ENXTERNAL_AV) {
- while (colibri_power_status != (FLD_PWRDN_TUNING_BIAS |
+ while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL)) {
- status = cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
+ status = afe_write_byte(dev, SUP_BLK_PWRDN,
FLD_PWRDN_TUNING_BIAS |
- FLD_PWRDN_ENABLE_PLL,
- 1);
- status |= cx231xx_read_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
- &colibri_power_status,
- 1);
+ FLD_PWRDN_ENABLE_PLL);
+ status |= afe_read_byte(dev, SUP_BLK_PWRDN,
+ &afe_power_status);
if (status < 0)
break;
}
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH1, 2, 0x00,
- 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH2, 2, 0x00,
- 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH3, 2, 0x00,
- 1);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
+ 0x00);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
+ 0x00);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
+ 0x00);
} else {
cx231xx_info("Invalid AV mode input\n");
status = -1;
@@ -397,92 +352,56 @@ int cx231xx_colibri_update_power_control(struct cx231xx *dev,
break;
default:
if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
- while (colibri_power_status != (FLD_PWRDN_TUNING_BIAS |
+ while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL)) {
- status = cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
+ status = afe_write_byte(dev, SUP_BLK_PWRDN,
FLD_PWRDN_TUNING_BIAS |
- FLD_PWRDN_ENABLE_PLL,
- 1);
- status |= cx231xx_read_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
- &colibri_power_status,
- 1);
+ FLD_PWRDN_ENABLE_PLL);
+ status |= afe_read_byte(dev, SUP_BLK_PWRDN,
+ &afe_power_status);
if (status < 0)
break;
}
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH1, 2,
- 0x40, 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH2, 2,
- 0x40, 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH3, 2,
- 0x00, 1);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
+ 0x40);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
+ 0x40);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
+ 0x00);
} else if (avmode == POLARIS_AVMODE_DIGITAL) {
- status = cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH1, 2,
- 0x70, 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH2, 2,
- 0x70, 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH3, 2,
- 0x70, 1);
-
- status |= cx231xx_read_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
- &colibri_power_status,
- 1);
- colibri_power_status |= FLD_PWRDN_PD_BANDGAP |
+ status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
+ 0x70);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
+ 0x70);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
+ 0x70);
+
+ status |= afe_read_byte(dev, SUP_BLK_PWRDN,
+ &afe_power_status);
+ afe_power_status |= FLD_PWRDN_PD_BANDGAP |
FLD_PWRDN_PD_BIAS |
FLD_PWRDN_PD_TUNECK;
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
- colibri_power_status,
- 1);
+ status |= afe_write_byte(dev, SUP_BLK_PWRDN,
+ afe_power_status);
} else if (avmode == POLARIS_AVMODE_ENXTERNAL_AV) {
- while (colibri_power_status != (FLD_PWRDN_TUNING_BIAS |
+ while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL)) {
- status = cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
+ status = afe_write_byte(dev, SUP_BLK_PWRDN,
FLD_PWRDN_TUNING_BIAS |
- FLD_PWRDN_ENABLE_PLL,
- 1);
- status |= cx231xx_read_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- SUP_BLK_PWRDN, 2,
- &colibri_power_status,
- 1);
+ FLD_PWRDN_ENABLE_PLL);
+ status |= afe_read_byte(dev, SUP_BLK_PWRDN,
+ &afe_power_status);
if (status < 0)
break;
}
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH1, 2,
- 0x00, 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH2, 2,
- 0x00, 1);
- status |= cx231xx_write_i2c_data(dev,
- Colibri_DEVICE_ADDRESS,
- ADC_PWRDN_CLAMP_CH3, 2,
- 0x40, 1);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
+ 0x00);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
+ 0x00);
+ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
+ 0x40);
} else {
cx231xx_info("Invalid AV mode input\n");
status = -1;
@@ -492,48 +411,44 @@ int cx231xx_colibri_update_power_control(struct cx231xx *dev,
return status;
}
-int cx231xx_colibri_adjust_ref_count(struct cx231xx *dev, u32 video_input)
+int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input)
{
- u32 input_mode = 0;
- u32 ntf_mode = 0;
+ u8 input_mode = 0;
+ u8 ntf_mode = 0;
int status = 0;
dev->video_input = video_input;
if (video_input == CX231XX_VMUX_TELEVISION) {
- status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_INPUT_CH3, 2, &input_mode, 1);
- status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_NTF_PRECLMP_EN_CH3, 2, &ntf_mode,
- 1);
+ status = afe_read_byte(dev, ADC_INPUT_CH3, &input_mode);
+ status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3,
+ &ntf_mode);
} else {
- status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_INPUT_CH1, 2, &input_mode, 1);
- status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
- ADC_NTF_PRECLMP_EN_CH1, 2, &ntf_mode,
- 1);
+ status = afe_read_byte(dev, ADC_INPUT_CH1, &input_mode);
+ status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH1,
+ &ntf_mode);
}
input_mode = (ntf_mode & 0x3) | ((input_mode & 0x6) << 1);
switch (input_mode) {
case SINGLE_ENDED:
- dev->colibri_ref_count = 0x23C;
+ dev->afe_ref_count = 0x23C;
break;
case LOW_IF:
- dev->colibri_ref_count = 0x24C;
+ dev->afe_ref_count = 0x24C;
break;
case EU_IF:
- dev->colibri_ref_count = 0x258;
+ dev->afe_ref_count = 0x258;
break;
case US_IF:
- dev->colibri_ref_count = 0x260;
+ dev->afe_ref_count = 0x260;
break;
default:
break;
}
- status = cx231xx_colibri_init_super_block(dev, dev->colibri_ref_count);
+ status = cx231xx_afe_init_super_block(dev, dev->afe_ref_count);
return status;
}
@@ -541,6 +456,35 @@ int cx231xx_colibri_adjust_ref_count(struct cx231xx *dev, u32 video_input)
/******************************************************************************
* V I D E O / A U D I O D E C O D E R C O N T R O L functions *
******************************************************************************/
+static int vid_blk_write_byte(struct cx231xx *dev, u16 saddr, u8 data)
+{
+ return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS,
+ saddr, 2, data, 1);
+}
+
+static int vid_blk_read_byte(struct cx231xx *dev, u16 saddr, u8 *data)
+{
+ int status;
+ u32 temp = 0;
+
+ status = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
+ saddr, 2, &temp, 1);
+ *data = (u8) temp;
+ return status;
+}
+
+static int vid_blk_write_word(struct cx231xx *dev, u16 saddr, u32 data)
+{
+ return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS,
+ saddr, 2, data, 4);
+}
+
+static int vid_blk_read_word(struct cx231xx *dev, u16 saddr, u32 *data)
+{
+ return cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
+ saddr, 2, data, 4);
+}
+
int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input)
{
int status = 0;
@@ -601,29 +545,27 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
u32 value = 0;
if (pin_type != dev->video_input) {
- status = cx231xx_colibri_adjust_ref_count(dev, pin_type);
+ status = cx231xx_afe_adjust_ref_count(dev, pin_type);
if (status < 0) {
cx231xx_errdev("%s: adjust_ref_count :Failed to set"
- "Colibri input mux - errCode [%d]!\n",
+ "AFE input mux - errCode [%d]!\n",
__func__, status);
return status;
}
}
- /* call colibri block to set video inputs */
- status = cx231xx_colibri_set_input_mux(dev, input);
+ /* call afe block to set video inputs */
+ status = cx231xx_afe_set_input_mux(dev, input);
if (status < 0) {
cx231xx_errdev("%s: set_input_mux :Failed to set"
- " Colibri input mux - errCode [%d]!\n",
+ " AFE input mux - errCode [%d]!\n",
__func__, status);
return status;
}
switch (pin_type) {
case CX231XX_VMUX_COMPOSITE1:
- status = cx231xx_read_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- AFE_CTRL, 2, &value, 4);
+ status = vid_blk_read_word(dev, AFE_CTRL, &value);
value |= (0 << 13) | (1 << 4);
value &= ~(1 << 5);
@@ -631,18 +573,15 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
value &= (~(0x1ff8000));
/* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
value |= 0x1000000;
- status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
- AFE_CTRL, 2, value, 4);
+ status = vid_blk_write_word(dev, AFE_CTRL, value);
- status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
- OUT_CTRL1, 2, &value, 4);
+ status = vid_blk_read_word(dev, OUT_CTRL1, &value);
value |= (1 << 7);
- status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
- OUT_CTRL1, 2, value, 4);
+ status = vid_blk_write_word(dev, OUT_CTRL1, value);
/* Set vip 1.1 output mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
OUT_CTRL1,
FLD_OUT_MODE,
OUT_MODE_VIP11);
@@ -657,8 +596,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
}
/* Read the DFE_CTRL1 register */
- status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
- DFE_CTRL1, 2, &value, 4);
+ status = vid_blk_read_word(dev, DFE_CTRL1, &value);
/* enable the VBI_GATE_EN */
value |= FLD_VBI_GATE_EN;
@@ -667,35 +605,31 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
value |= FLD_VGA_AUTO_EN;
/* Write it back */
- status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
- DFE_CTRL1, 2, value, 4);
+ status = vid_blk_write_word(dev, DFE_CTRL1, value);
/* Disable auto config of registers */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_ACFG_DIS,
cx231xx_set_field(FLD_ACFG_DIS, 1));
/* Set CVBS input mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_INPUT_MODE,
cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_CVBS_0));
break;
case CX231XX_VMUX_SVIDEO:
/* Disable the use of DIF */
- status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
- AFE_CTRL, 2, &value, 4);
+ status = vid_blk_read_word(dev, AFE_CTRL, &value);
/* set [24:23] [22:15] to 0 */
value &= (~(0x1ff8000));
/* set FUNC_MODE[24:23] = 2
IF_MOD[22:15] = 0 DCR_BYP_CH2[4:4] = 1; */
value |= 0x1000010;
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- AFE_CTRL, 2, value, 4);
+ status = vid_blk_write_word(dev, AFE_CTRL, value);
/* Tell DIF object to go to baseband mode */
status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
@@ -707,9 +641,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
}
/* Read the DFE_CTRL1 register */
- status = cx231xx_read_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- DFE_CTRL1, 2, &value, 4);
+ status = vid_blk_read_word(dev, DFE_CTRL1, &value);
/* enable the VBI_GATE_EN */
value |= FLD_VBI_GATE_EN;
@@ -718,27 +650,23 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
value |= FLD_VGA_AUTO_EN;
/* Write it back */
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- DFE_CTRL1, 2, value, 4);
+ status = vid_blk_write_word(dev, DFE_CTRL1, value);
/* Disable auto config of registers */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_ACFG_DIS,
cx231xx_set_field(FLD_ACFG_DIS, 1));
/* Set YC input mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
MODE_CTRL,
FLD_INPUT_MODE,
cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_YC_1));
/* Chroma to ADC2 */
- status = cx231xx_read_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- AFE_CTRL, 2, &value, 4);
+ status = vid_blk_read_word(dev, AFE_CTRL, &value);
value |= FLD_CHROMA_IN_SEL; /* set the chroma in select */
/* Clear VGA_SEL_CH2 and VGA_SEL_CH3 (bits 7 and 8)
@@ -746,11 +674,9 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
rather than audio. Only one of the two will be in use. */
value &= ~(FLD_VGA_SEL_CH2 | FLD_VGA_SEL_CH3);
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- AFE_CTRL, 2, value, 4);
+ status = vid_blk_write_word(dev, AFE_CTRL, value);
- status = cx231xx_colibri_set_mode(dev, AFE_MODE_BASEBAND);
+ status = cx231xx_afe_set_mode(dev, AFE_MODE_BASEBAND);
break;
case CX231XX_VMUX_TELEVISION:
case CX231XX_VMUX_CABLE:
@@ -760,10 +686,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
case CX231XX_BOARD_CNXT_RDU_250:
/* Disable the use of DIF */
- status = cx231xx_read_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- AFE_CTRL, 2,
- &value, 4);
+ status = vid_blk_read_word(dev, AFE_CTRL, &value);
value |= (0 << 13) | (1 << 4);
value &= ~(1 << 5);
@@ -771,24 +694,15 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
value &= (~(0x1FF8000));
/* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
value |= 0x1000000;
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- AFE_CTRL, 2,
- value, 4);
-
- status = cx231xx_read_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- OUT_CTRL1, 2,
- &value, 4);
+ status = vid_blk_write_word(dev, AFE_CTRL, value);
+
+ status = vid_blk_read_word(dev, OUT_CTRL1, &value);
value |= (1 << 7);
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- OUT_CTRL1, 2,
- value, 4);
+ status = vid_blk_write_word(dev, OUT_CTRL1, value);
/* Set vip 1.1 output mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
OUT_CTRL1, FLD_OUT_MODE,
OUT_MODE_VIP11);
@@ -803,10 +717,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
}
/* Read the DFE_CTRL1 register */
- status = cx231xx_read_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- DFE_CTRL1, 2,
- &value, 4);
+ status = vid_blk_read_word(dev, DFE_CTRL1, &value);
/* enable the VBI_GATE_EN */
value |= FLD_VBI_GATE_EN;
@@ -815,20 +726,17 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
value |= FLD_VGA_AUTO_EN;
/* Write it back */
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- DFE_CTRL1, 2,
- value, 4);
+ status = vid_blk_write_word(dev, DFE_CTRL1, value);
/* Disable auto config of registers */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_ACFG_DIS,
cx231xx_set_field(FLD_ACFG_DIS, 1));
/* Set CVBS input mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_INPUT_MODE,
cx231xx_set_field(FLD_INPUT_MODE,
INPUT_MODE_CVBS_0));
@@ -846,25 +754,16 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
}
/* Make sure bypass is cleared */
- status = cx231xx_read_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- DIF_MISC_CTRL,
- 2, &value, 4);
+ status = vid_blk_read_word(dev, DIF_MISC_CTRL, &value);
/* Clear the bypass bit */
value &= ~FLD_DIF_DIF_BYPASS;
/* Enable the use of the DIF block */
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- DIF_MISC_CTRL,
- 2, value, 4);
+ status = vid_blk_write_word(dev, DIF_MISC_CTRL, value);
/* Read the DFE_CTRL1 register */
- status = cx231xx_read_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- DFE_CTRL1, 2,
- &value, 4);
+ status = vid_blk_read_word(dev, DFE_CTRL1, &value);
/* Disable the VBI_GATE_EN */
value &= ~FLD_VBI_GATE_EN;
@@ -874,10 +773,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
value |= FLD_VGA_AUTO_EN | FLD_AGC_AUTO_EN | 0x00200000;
/* Write it back */
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- DFE_CTRL1, 2,
- value, 4);
+ status = vid_blk_write_word(dev, DFE_CTRL1, value);
/* Wait until AGC locks up */
msleep(1);
@@ -886,39 +782,30 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
value &= ~(FLD_VGA_AUTO_EN);
/* Write it back */
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- DFE_CTRL1, 2,
- value, 4);
+ status = vid_blk_write_word(dev, DFE_CTRL1, value);
/* Enable Polaris B0 AGC output */
- status = cx231xx_read_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- PIN_CTRL, 2,
- &value, 4);
+ status = vid_blk_read_word(dev, PIN_CTRL, &value);
value |= (FLD_OEF_AGC_RF) |
(FLD_OEF_AGC_IFVGA) |
(FLD_OEF_AGC_IF);
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- PIN_CTRL, 2,
- value, 4);
+ status = vid_blk_write_word(dev, PIN_CTRL, value);
/* Set vip 1.1 output mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
OUT_CTRL1, FLD_OUT_MODE,
OUT_MODE_VIP11);
/* Disable auto config of registers */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_ACFG_DIS,
cx231xx_set_field(FLD_ACFG_DIS, 1));
/* Set CVBS input mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
- HAMMERHEAD_I2C_ADDRESS,
+ VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_INPUT_MODE,
cx231xx_set_field(FLD_INPUT_MODE,
INPUT_MODE_CVBS_0));
@@ -928,17 +815,11 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
/* Clear clamp for channels 2 and 3 (bit 16-17) */
/* Clear droop comp (bit 19-20) */
/* Set VGA_SEL (for audio control) (bit 7-8) */
- status = cx231xx_read_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- AFE_CTRL, 2,
- &value, 4);
+ status = vid_blk_read_word(dev, AFE_CTRL, &value);
value |= FLD_VGA_SEL_CH3 | FLD_VGA_SEL_CH2;
- status = cx231xx_write_i2c_data(dev,
- HAMMERHEAD_I2C_ADDRESS,
- AFE_CTRL, 2,
- value, 4);
+ status = vid_blk_write_word(dev, AFE_CTRL, value);
break;