diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2007-05-11 20:13:10 +0200 |
|---|---|---|
| committer | Chris Wright <chrisw@sous-sol.org> | 2007-06-11 11:36:43 -0700 |
| commit | 27140776e1051f8d453b90155cf73f6156ecb73b (patch) | |
| tree | beae5d32601228ab765ad4cdff38aaae5e3ec899 | |
| parent | e95907f256676ca48ae66d071ca0c9c066cb79ab (diff) | |
[PATCH] i386: HPET, check if the counter works
Some systems have a HPET which is not incrementing, which leads to a
complete hang. Detect it during HPET setup.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| -rw-r--r-- | arch/i386/kernel/hpet.c | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/arch/i386/kernel/hpet.c b/arch/i386/kernel/hpet.c index 17d73459fc5..cbb47519e0c 100644 --- a/arch/i386/kernel/hpet.c +++ b/arch/i386/kernel/hpet.c @@ -226,7 +226,8 @@ int __init hpet_enable(void) { unsigned long id; uint64_t hpet_freq; - u64 tmp; + u64 tmp, start, now; + cycle_t t1; if (!is_hpet_capable()) return 0; @@ -273,6 +274,27 @@ int __init hpet_enable(void) /* Start the counter */ hpet_start_counter(); + /* Verify whether hpet counter works */ + t1 = read_hpet(); + rdtscll(start); + + /* + * We don't know the TSC frequency yet, but waiting for + * 200000 TSC cycles is safe: + * 4 GHz == 50us + * 1 GHz == 200us + */ + do { + rep_nop(); + rdtscll(now); + } while ((now - start) < 200000UL); + + if (t1 == read_hpet()) { + printk(KERN_WARNING + "HPET counter not counting. HPET disabled\n"); + goto out_nohpet; + } + /* Initialize and register HPET clocksource * * hpet period is in femto seconds per cycle |