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authorFlorian Fainelli <f.fainelli@gmail.com>2013-05-31 13:07:44 +0000
committerRalf Baechle <ralf@linux-mips.org>2013-07-01 15:10:59 +0200
commitedd4201ebc2f1a7ab2158ad91ddc0af71e58dce7 (patch)
tree558b5967c924762d7c779bf485a9238741a72931
parent78857614104a26cdada4c53eea104752042bf5a1 (diff)
MIPS: define write{b,w,l,q}_relaxed
MIPS does define read{b,w,l,q}_relaxed but does not define their write counterparts: write{b,w,l,q}_relaxed. This patch adds the missing definitions for the write*_relaxed I/O accessors. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5352/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/io.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index b84e1fb3fab..3321dd5a887 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -454,6 +454,11 @@ __BUILDIO(q, u64)
#define readl_relaxed readl
#define readq_relaxed readq
+#define writeb_relaxed writeb
+#define writew_relaxed writew
+#define writel_relaxed writel
+#define writeq_relaxed writeq
+
#define readb_be(addr) \
__raw_readb((__force unsigned *)(addr))
#define readw_be(addr) \