diff options
| author | Andi Kleen <ak@suse.de> | 2007-05-21 14:31:45 +0200 |
|---|---|---|
| committer | Willy Tarreau <w@1wt.eu> | 2007-08-15 10:02:20 +0200 |
| commit | 5c648b32393875e46f767405eb41911a149eb008 (patch) | |
| tree | da034981d28e36c012598274e2265c6fbbc9302b | |
| parent | cd4a337ed99dc212ce396b319f96d3e867a816f9 (diff) | |
[PATCH] i386: Fix K8/core2 oprofile on multiple CPUs
Only try to allocate MSRs once instead of for every CPU.
This assumes the MSRs are the same on all CPUs which is currently
true. P4-HT is a special case for different SMT threads, but the code
always saves/restores all MSRs so it works identical.
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| -rw-r--r-- | arch/i386/oprofile/nmi_int.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/i386/oprofile/nmi_int.c b/arch/i386/oprofile/nmi_int.c index 3700eef7874..be4a9a8377a 100644 --- a/arch/i386/oprofile/nmi_int.c +++ b/arch/i386/oprofile/nmi_int.c @@ -131,7 +131,6 @@ static void nmi_save_registers(void * dummy) { int cpu = smp_processor_id(); struct op_msrs * msrs = &cpu_msrs[cpu]; - model->fill_in_addresses(msrs); nmi_cpu_save_registers(msrs); } @@ -195,6 +194,7 @@ static struct notifier_block profile_exceptions_nb = { static int nmi_setup(void) { int err=0; + int cpu; if (!allocate_msrs()) return -ENOMEM; @@ -207,6 +207,13 @@ static int nmi_setup(void) /* We need to serialize save and setup for HT because the subset * of msrs are distinct for save and setup operations */ + + /* Assume saved/restored counters are the same on all CPUs */ + model->fill_in_addresses(&cpu_msrs[0]); + for_each_possible_cpu (cpu) { + if (cpu != 0) + cpu_msrs[cpu] = cpu_msrs[0]; + } on_each_cpu(nmi_save_registers, NULL, 0, 1); on_each_cpu(nmi_cpu_setup, NULL, 0, 1); nmi_enabled = 1; |