diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-12 16:25:35 -0800 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-12 16:25:35 -0800 |
commit | 9219a3b9889dbc7dae68e472f239672ff48860b0 (patch) | |
tree | c6446d63dd7ffb0f118804e354eee3d80041717e | |
parent | 23ead7291269db3be71b442324381c8d63e5d0b3 (diff) | |
parent | cde15b5927fea3e1b4de0b277008cf273d8b000b (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (37 commits)
MIPS: Only write c0_framemask on CPUs which have this register.
MIPS: Alchemy: new userspace suspend interface for development boards.
MIPS: Alchemy: dbdma suspend/resume support.
MIPS: Alchemy: Fix up PM code on Au1550/Au1200
MIPS: Alchemy: move calc_clock function.
MIPS: Alchemy: RTC counter clocksource / clockevent support.
MIPS: make cp0 counter clocksource/event usable as fallback.
MIPS: Alchemy: remove cpu_table.
MIPS: Alchemy: remove get/set_au1x00_lcd_clock().
MIPS: Print irq handler description
MIPS: Alchemy: pb1200: update CPLD cascade irq handler.
MIPS: Alchemy: update core interrupt code.
MIPS: Alchemy: move commandline mangling out of common code
MIPS: Alchemy: devboards: consolidate files
MIPS: Alchemy: Move development board code to common subdirectory
MIPS: Add Cavium OCTEON to arch/mips/Kconfig
MIPS: Add defconfig for Cavium OCTEON.
MIPS: Adjust the dma-common.c platform hooks.
MIPS: Add Cavium OCTEON slot into proper tlb category.
MIPS: Compute branch returns for Cavium OCTEON specific branch instructions.
...
126 files changed, 18974 insertions, 2031 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a5255e7c79e..52c80c2a57f 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -595,6 +595,44 @@ config WR_PPMC This enables support for the Wind River MIPS32 4KC PPMC evaluation board, which is based on GT64120 bridge chip. +config CAVIUM_OCTEON_SIMULATOR + bool "Support for the Cavium Networks Octeon Simulator" + select CEVT_R4K + select 64BIT_PHYS_ADDR + select DMA_COHERENT + select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select CPU_CAVIUM_OCTEON + help + The Octeon simulator is software performance model of the Cavium + Octeon Processor. It supports simulating Octeon processors on x86 + hardware. + +config CAVIUM_OCTEON_REFERENCE_BOARD + bool "Support for the Cavium Networks Octeon reference board" + select CEVT_R4K + select 64BIT_PHYS_ADDR < |