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authorNicolas Ferre <nicolas.ferre@atmel.com>2012-04-16 14:46:30 +0200
committerVinod Koul <vinod.koul@linux.intel.com>2012-04-20 15:38:05 +0530
commited8b0d67f33518a16c6b2450fe5ebebf180c2d04 (patch)
tree2e512cc9d9a21fb5d0d991dd9865a9b8b38b5ab1
parentd04525ed0323709711277563a2c76e446a017423 (diff)
dmaengine: at_hdmac: remove clear-on-read in atc_dostart()
This loop on EBCISR register was designed to clear IRQ sources before enabling a DMA channel. This register is clear-on-read so a race condition can appear if another channel is already active and has just finished its transfer. Removing this read on EBCISR is fixing the issue as there is no case where an IRQ could be pending: we already make sure that this register is drained at probe() time and during resume. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
-rw-r--r--drivers/dma/at_hdmac.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index 7aa58d20489..445fdf81169 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -221,10 +221,6 @@ static void atc_dostart(struct at_dma_chan *atchan, struct at_desc *first)
vdbg_dump_regs(atchan);
- /* clear any pending interrupt */
- while (dma_readl(atdma, EBCISR))
- cpu_relax();
-
channel_writel(atchan, SADDR, 0);
channel_writel(atchan, DADDR, 0);
channel_writel(atchan, CTRLA, 0);