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authorMathias Nyman <mathias.nyman@linux.intel.com>2011-07-08 10:02:18 +0100
committerGrant Likely <grant.likely@secretlab.ca>2011-07-08 09:32:01 -0600
commit2345b20fd9160d99f7cdf34e7b028ea351bf9c25 (patch)
treefd0ed3845b64d9972abb332f4c39d20c5b5a1536
parent58956ba23e2dce83e78cd212cc8305261647684f (diff)
gpio/langwell_gpio: ack the correct bit for langwell gpio interrupts
The wrong bit was masked when acking langwell gpio interrupts. Reason for maskig the wrong bit was probably because__ffs() and ffs() functions return bit indexes differently (0..31 vs 1..32) This fixes langwell based devices from hanging when a gpio interrupt is triggered and undoes the breakage which occurred in change set 732063b92bb727b27e61580ce278dddefe31c6ad Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
-rw-r--r--drivers/gpio/langwell_gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c
index bd6571e0097..644ba1255d3 100644
--- a/drivers/gpio/langwell_gpio.c
+++ b/drivers/gpio/langwell_gpio.c
@@ -223,7 +223,7 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc)
gedr = gpio_reg(&lnw->chip, base, GEDR);
pending = readl(gedr);
while (pending) {
- gpio = __ffs(pending) - 1;
+ gpio = __ffs(pending);
mask = BIT(gpio);
pending &= ~mask;
/* Clear before handling so we can't lose an edge */