diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-08-07 11:01:36 +0100 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-08-26 16:45:55 -0700 |
commit | 4f2624fb7b37bf8d8b36bb01e2e86939ca049dbc (patch) | |
tree | 6caec0a79058927b730fa7a1f95db1fabbb0e157 | |
parent | 8a8c25a716100dc9a50e5546fadf03e56588ee09 (diff) |
drm/i915/edp: Flush the write before waiting for PLLs
commit 5ddb954b9ee50824977d2931e0ff58b3050b337d upstream.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0a552c884e4..e9a4b125d66 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1502,6 +1502,7 @@ static void ironlake_enable_pll_edp (struct drm_crtc *crtc) dpa_ctl = I915_READ(DP_A); dpa_ctl |= DP_PLL_ENABLE; I915_WRITE(DP_A, dpa_ctl); + POSTING_READ(DP_A); udelay(200); } |