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authorTakashi Iwai <tiwai@suse.de>2008-11-05 17:41:23 +0100
committerTakashi Iwai <tiwai@suse.de>2008-11-05 17:41:23 +0100
commit6834d7ce224a6f6a1dd05da3a867730c40943154 (patch)
treea2d9376fb24f35d3e376c5cc11d21939028a9aa9
parent4074ea21493fe668501bfc7548d10657ca6f14c2 (diff)
ALSA: ice1724 - Re-fix IRQ mask initialization
The previous IRQ mask initialization was wrong. It must set the bits to be masked. Signed-off-by: Takashi Iwai <tiwai@suse.de>
-rw-r--r--sound/pci/ice1712/ice1724.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/sound/pci/ice1712/ice1724.c b/sound/pci/ice1712/ice1724.c
index 40725dfdc86..0dfa0540ce2 100644
--- a/sound/pci/ice1712/ice1724.c
+++ b/sound/pci/ice1712/ice1724.c
@@ -395,8 +395,8 @@ static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
"status = 0x%x\n", status);
if (status & VT1724_IRQ_MPU_TX) {
printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
- outb(inb(ICEREG1724(ice, IRQMASK)) &
- ~VT1724_IRQ_MPU_TX,
+ outb(inb(ICEREG1724(ice, IRQMASK)) |
+ VT1724_IRQ_MPU_TX,
ICEREG1724(ice, IRQMASK));
}
break;
@@ -2413,8 +2413,8 @@ static int __devinit snd_vt1724_create(struct snd_card *card,
return -EIO;
}
- /* clear interrupts -- otherwise you'll get irq problems later */
- outb(0, ICEREG1724(ice, IRQMASK));
+ /* MPU_RX and TX irq masks are cleared later dynamically */
+ outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
/* don't handle FIFO overrun/underruns (just yet),
* since they cause machine lockups