diff options
author | Andreas Herrmann <herrmann.der.user@googlemail.com> | 2010-04-27 12:13:48 +0200 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-05-26 14:29:18 -0700 |
commit | f46c7299a930469f51e30b7be281c33630917244 (patch) | |
tree | 8f323a0a589655bcce8fdd39b70de5bc0fbe618a | |
parent | 798e99d358157dfcec37c1b0b911ed711d0e0da6 (diff) |
x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRs
commit f01487119dda3d9f58c9729c7361ecc50a61c188 upstream.
If host CPU is exposed to a guest the OSVW MSRs are not guaranteed
to be present and a GP fault occurs. Thus checking the feature flag is
essential.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
LKML-Reference: <20100427101348.GC4489@alberich.amd.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r-- | arch/x86/kernel/process.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index d0ba10778e9..5fd5b07bf3a 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -459,11 +459,13 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c) * check OSVW bit for CPUs that are not affected * by erratum #400 */ - rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val); - if (val >= 2) { - rdmsrl(MSR_AMD64_OSVW_STATUS, val); - if (!(val & BIT(1))) - goto no_c1e_idle; + if (cpu_has(c, X86_FEATURE_OSVW)) { + rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val); + if (val >= 2) { + rdmsrl(MSR_AMD64_OSVW_STATUS, val); + if (!(val & BIT(1))) + goto no_c1e_idle; + } } return 1; } |