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authorMichael Hennerich <michael.hennerich@analog.com>2007-07-12 16:20:21 +0800
committerBryan Wu <bryan.wu@analog.com>2007-07-12 16:20:21 +0800
commit157cc5aad94fb7025c41a60788c1bfb5299010aa (patch)
tree2f2c2f0e82b0f9ec79afe5845fb7487d3803b467
parentf40d24d909ad99c802a6813ff32b6feb20ab8c71 (diff)
Blackfin arch: Disable CACHELINE_ALIGNED_L1 for BF54x by default
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
-rw-r--r--arch/blackfin/Kconfig3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 6d23bcc6194..2372b0382a6 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -540,7 +540,8 @@ config IP_CHECKSUM_L1
config CACHELINE_ALIGNED_L1
bool "Locate cacheline_aligned data to L1 Data Memory"
- default y
+ default y if !BF54x
+ default n if BF54x
depends on !BF531
help
If enabled cacheline_anligned data is linked