Linux kernel source tree https://git.amat.us/linux/atom/drivers/regulator?h=v3.12.14 2014-03-05T16:13:50Z 2014-03-05T16:13:50Z Steve Twiss stwiss.opensource@diasemi.com 2014-02-12T09:57:52Z urn:sha1:d57db0b6149ad74940b07f8939fcdb3e578eea70 commit ebf6dad0de89677aa58a4d8b009014ff88a23452 upstream. Bug fix to allow the setting of maximum voltage for certain LDOs. What the bug is: There is a problem caused by an invalid calculation of n_voltages in the driver. This n_voltages value has the potential to be different for each regulator. The value for linear_min_sel is set as DA9063_V##regl_name# which can be different depending upon the regulator. This is chosen according to the following definitions in the DA9063 registers.h file: DA9063_VLDO1_BIAS 0 DA9063_VLDO2_BIAS 0 DA9063_VLDO3_BIAS 0 DA9063_VLDO4_BIAS 0 DA9063_VLDO5_BIAS 2 DA9063_VLDO6_BIAS 2 DA9063_VLDO7_BIAS 2 DA9063_VLDO8_BIAS 2 DA9063_VLDO9_BIAS 3 DA9063_VLDO10_BIAS 2 DA9063_VLDO11_BIAS 2 The calculation for n_voltages is valid for LDOs whose BIAS value is zero but this is not correct for those LDOs which have a non-zero value. What the fix is: In order to take into account the non-zero linear_min_sel value which is set for the regulators LDO5, LDO6, LDO7, LDO8, LDO9, LDO10 and LDO11, the calculation for n_voltages should take into account the missing term defined by DA9063_V##regl_name#. This will in turn allow the core constraints calculation to set the maximum voltage limits correctly and therefore allow users to apply the maximum expected voltage to all of the LDOs. Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 2013-12-20T15:48:57Z Axel Lin axel.lin@ingics.com 2013-12-09T07:24:19Z urn:sha1:1f02a127dd7b35ebe3df64320347c6ee904a8338 commit a1b6fa85c639ad0d5447d1a5e7d1463bbe29fcd3 upstream. According to the datasheet, the address of FABID is 0x4. Fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Robin Gong <b38343@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2013-12-04T19:05:41Z Tim Harvey tharvey@gateworks.com 2013-11-06T05:17:25Z urn:sha1:644c38f1f6feb49bcddd882596948db40344868c commit 88baf7148e899db7e0b676e4363647f50e48eaed upstream. prior to week 08 of 2013 Freescale misprogrammed between 1 and 3% of PFUZE1000 parts with a ID=0x8 instead of the expected ID=0x0 Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2013-12-04T19:05:10Z Nishanth Menon nm@ti.com 2013-10-11T10:04:12Z urn:sha1:154e8594db590b8a39d18c3112e1cb217bbe4d10 commit 9a633a2bced158c57b73cf4d8e87be60473de1d2 upstream. commit 40b1936e (regulator: Introduce TI Adaptive Body Bias(ABB) on-chip LDO driver) missed a pair of brackets which cause the wrong vset data to be picked up from efuse, resulting in bad VBB voltage values. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2013-09-30T11:04:33Z Mark Brown broonie@linaro.org 2013-09-30T11:04:33Z urn:sha1:f3d17a7e4d9ea9301fd2608c25de7802239e5fbb 2013-09-30T11:04:33Z Mark Brown broonie@linaro.org 2013-09-30T11:04:33Z urn:sha1:60c32f3ec879d7e75a5b7d1c57ba8acb6583d1bf 2013-09-30T11:04:32Z Mark Brown broonie@linaro.org 2013-09-30T11:04:32Z urn:sha1:0f5da28f93fb847a0aa64d359d46b99c73cd1d6e 2013-09-30T11:04:31Z Mark Brown broonie@linaro.org 2013-09-30T11:04:31Z urn:sha1:780a0ff76e9527fe7c784aa7250dcfc449560535 2013-09-30T11:04:29Z Mark Brown broonie@linaro.org 2013-09-30T11:04:29Z urn:sha1:e7b87825e8100e1e1456840fc0d99a951631c036 2013-09-27T14:02:04Z Nishanth Menon nm@ti.com 2013-09-27T13:25:14Z urn:sha1:bf00ca35cec8f0894dcfd90f88b03af1d5c7b86f As documented in Application Note SWPA117 v2.1(NDA), LDO override has a requirement that when switching from Bias active + override active mode(FBB/RBB) to Bypass(nominal) mode, LDO reset must be performed *after* LDO transitions to Bypass(nominal) mode. The same rule in reverse applies when switching from a ABB bypass mode to ABB enabled - LDO override *must* be performed prior to transition to required ABB mode, if we do not do that, the same glitch takes place. Currently while transitioning to ABB bypass, we reset the LDO overide prior to the transition which causes a few milliseconds where ABB LDO voltage could go all the way to 800mV(based on SoC process node), during this period, the delta voltage between VDD rail and VBB rail could cause the system to improperly function. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org