<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/net/phy/Makefile, branch v3.10.2</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/drivers/net/phy/Makefile?h=v3.10.2</id>
<link rel='self' href='https://git.amat.us/linux/atom/drivers/net/phy/Makefile?h=v3.10.2'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2012-10-18T19:34:30Z</updated>
<entry>
<title>phy: add AT803x driver</title>
<updated>2012-10-18T19:34:30Z</updated>
<author>
<name>Matus Ujhelyi</name>
<email>ujhelyi.m@gmail.com</email>
</author>
<published>2012-10-14T19:07:16Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=0ca7111a38f053ae7b8829ee32fca6f9ef47550a'/>
<id>urn:sha1:0ca7111a38f053ae7b8829ee32fca6f9ef47550a</id>
<content type='text'>
This driver add support for wake over lan on AT803x phys.

Signed-off-by: Matus Ujhelyi &lt;ujhelyi.m@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>netdev/phy: add MDIO bus multiplexer driven by a memory-mapped device</title>
<updated>2012-08-30T16:54:48Z</updated>
<author>
<name>Timur Tabi</name>
<email>timur@freescale.com</email>
</author>
<published>2012-08-24T09:10:53Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=6cc2ff82492d89f763e69ea6b8681926aceda610'/>
<id>urn:sha1:6cc2ff82492d89f763e69ea6b8681926aceda610</id>
<content type='text'>
Add support for an MDIO bus multiplexer controlled by a simple memory-mapped
device, like an FPGA.  The device must be memory-mapped and contain only
8-bit registers (which keeps things simple).

Tested on a Freescale P5020DS board which uses the "PIXIS" FPGA attached
to the localbus.

Signed-off-by: Timur Tabi &lt;timur@freescale.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>netdev/phy: Add driver for Broadcom BCM87XX 10G Ethernet PHYs</title>
<updated>2012-06-28T04:23:25Z</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2012-06-27T07:33:38Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=e9976d7c96423ac1991396aa82335206ded55bcf'/>
<id>urn:sha1:e9976d7c96423ac1991396aa82335206ded55bcf</id>
<content type='text'>
Add a driver for BCM8706 and BCM8727 devices.  These are a 10Gig PHYs
which use MII_ADDR_C45 addressing.  They are always 10G full duplex, so
there is no autonegotiation.  All we do is report link state and send
interrupts when it changes.

If the PHY has a device tree of_node associated with it, the
"broadcom,c45-reg-init" property is used to supply register
initialization values when config_init() is called.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>netdev/of/phy: Add MDIO bus multiplexer driven by GPIO lines.</title>
<updated>2012-05-08T02:58:09Z</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2012-05-02T15:16:39Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=416912a129349788372e6ac27ab86bd9b18c8cc0'/>
<id>urn:sha1:416912a129349788372e6ac27ab86bd9b18c8cc0</id>
<content type='text'>
The GPIO pins select which sub bus is connected to the master.

Initially tested with an sn74cbtlv3253 switch device wired into the
MDIO bus.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>netdev/of/phy: Add MDIO bus multiplexer support.</title>
<updated>2012-05-08T02:58:09Z</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2012-05-02T15:16:38Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=0ca2997d145268e6b4ef000692061849cdab8348'/>
<id>urn:sha1:0ca2997d145268e6b4ef000692061849cdab8348</id>
<content type='text'>
This patch adds a somewhat generic framework for MDIO bus
multiplexers.  It is modeled on the I2C multiplexer.

The multiplexer is needed if there are multiple PHYs with the same
address connected to the same MDIO bus adepter, or if there is
insufficient electrical drive capability for all the connected PHY
devices.

Conceptually it could look something like this:

                   ------------------
                   | Control Signal |
                   --------+---------
                           |
 ---------------   --------+------
 | MDIO MASTER |---| Multiplexer |
 ---------------   --+-------+----
                     |       |
                     C       C
                     h       h
                     i       i
                     l       l
                     d       d
                     |       |
     ---------       A       B   ---------
     |       |       |       |   |       |
     | PHY@1 +-------+       +---+ PHY@1 |
     |       |       |       |   |       |
     ---------       |       |   ---------
     ---------       |       |   ---------
     |       |       |       |   |       |
     | PHY@2 +-------+       +---+ PHY@2 |
     |       |                   |       |
     ---------                   ---------

This framework configures the bus topology from device tree data.  The
mechanics of switching the multiplexer is left to device specific
drivers.

The follow-on patch contains a multiplexer driven by GPIO lines.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy: add am79c874 PHY support</title>
<updated>2012-03-19T22:02:05Z</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2012-03-18T11:03:05Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=49099122a403b907dc12a5e66033678a07c68ba3'/>
<id>urn:sha1:49099122a403b907dc12a5e66033678a07c68ba3</id>
<content type='text'>
Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy: Micrel KS8995MA 5-ports 10/100 managed Ethernet switch support added</title>
<updated>2011-12-19T21:30:40Z</updated>
<author>
<name>Frederic LAMBERT</name>
<email>frdrc66@gmail.com</email>
</author>
<published>2011-12-18T07:33:41Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=a8e510f682fe6d7671c11887e07c55f86caaf3c1'/>
<id>urn:sha1:a8e510f682fe6d7671c11887e07c55f86caaf3c1</id>
<content type='text'>
Signed-off-by: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Signed-off-by: Frederic Lambert &lt;frdrc66@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>ptp: Added a clock driver for the National Semiconductor PHYTER.</title>
<updated>2011-05-23T20:10:23Z</updated>
<author>
<name>Richard Cochran</name>
<email>richardcochran@gmail.com</email>
</author>
<published>2011-04-22T10:04:55Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=cb646e2b02b27a33a1d1eabd016749606254071c'/>
<id>urn:sha1:cb646e2b02b27a33a1d1eabd016749606254071c</id>
<content type='text'>
This patch adds support for the PTP clock found on the DP83640.
The basic clock operations and one external time stamp have
been implemented.

Signed-off-by: Richard Cochran &lt;richard.cochran@omicron.at&gt;
Signed-off-by: John Stultz &lt;john.stultz@linaro.org&gt;
</content>
</entry>
<entry>
<title>drivers/net/phy: micrel phy driver</title>
<updated>2010-05-03T22:43:26Z</updated>
<author>
<name>David J. Choi</name>
<email>david.choi@micrel.com</email>
</author>
<published>2010-04-29T06:12:41Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d05070091849015f8c5b7d55cd75b86ebb61b3ec'/>
<id>urn:sha1:d05070091849015f8c5b7d55cd75b86ebb61b3ec</id>
<content type='text'>
This is the first version of phy driver from Micrel Inc.

Signed-off-by: David J. Choi &lt;david.choi@micrel.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>NET: Add driver for Octeon MDIO buses.</title>
<updated>2009-12-17T01:56:58Z</updated>
<author>
<name>David Daney</name>
<email>ddaney@caviumnetworks.com</email>
</author>
<published>2009-10-14T19:04:38Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=25d967b72a92d72b6e0263a0337dfc940bd6c044'/>
<id>urn:sha1:25d967b72a92d72b6e0263a0337dfc940bd6c044</id>
<content type='text'>
The Octeon SOC has two types of Ethernet ports, each type with its own
driver.  However, the PHYs for all the ports are controlled by a
common MDIO bus.  Because the mdio driver is not associated with a
particular driver, but is instead a system level resource, we create s
stand-alone driver for it.

As for the driver, we put the register definitions in
arch/mips/include/asm/octeon where most of the other Octeon register
definitions live.  This is a platform driver with the platform device
for "mdio-octeon" being registered in the platform startup code.

Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Acked-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
