linux/drivers/gpu, branch v2.6.29.2

drm/i915: fix TV mode setting in property change

2009-04-27T17:36:53Z

upstream commit: 7d6ff7851c23740c3813bdf457be638381774b69 Only set TV DAC in property change seems doesn't work, we have to setup whole crtc pipe which assigned to TV alone. Signed-off-by: Zhenyu Wang [anholt: Note that this should also fix the oops at startup with new 2D] Signed-off-by: Eric Anholt Signed-off-by: Chris Wright

drm/i915: only set TV mode when any property changed

2009-04-27T17:36:53Z

upstream commit: ebcc8f2eade76946dbb5d5c545b91f8157051aa8 If there's no real property change, don't need to set TV mode again. Signed-off-by: Zhenyu Wang [anholt: checkpatch.pl fix] Signed-off-by: Eric Anholt Signed-off-by: Chris Wright

drm: Use pgprot_writecombine in GEM GTT mapping to get the right bits for !PAT.

2009-04-27T17:36:53Z

upstream commit: 1055f9ddad093f54dfd708a0f976582034d4ce1a Otherwise, the PAGE_CACHE_WC would end up getting us a UC-only mapping, and the write performance of GTT maps dropped 10x. Signed-off-by: Jesse Barnes [anholt: cleaned up unused var] Signed-off-by: Eric Anholt Signed-off-by: Chris Wright

drm/i915: check for -EINVAL from vm_insert_pfn

2009-04-27T17:36:53Z

upstream commit: 959b887cf42fd63cf10e28a7f26126f78aa1c0b0 Indicates something is wrong with the mapping; and apparently triggers in current kernels. Signed-off-by: Jesse Barnes Signed-off-by: Eric Anholt Signed-off-by: Chris Wright

drm/i915: Check for dev->primary->master before dereference.

2009-04-27T17:36:53Z

upstream commit: 98787c057fdefdce6230ff46f2c1105835005a4c I've hit the occasional oops inside i915_wait_ring() with an indication of a NULL derefence of dev->primary->master. Adding a NULL check is consistent with the other potential users of dev->primary->master. Signed-off-by: Chris Wilson Signed-off-by: Eric Anholt Signed-off-by: Chris Wright

drm/i915: Sync crt hotplug detection with intel video driver

2009-04-27T17:36:53Z

upstream commit: 771cb081354161eea21534ba58e5cc1a2db94a25 This covers: Use long crt hotplug activation time on GM45. Signed-off-by: Zhao Yakui Signed-off-by: Eric Anholt Signed-off-by: Chris Wright

drm/i915: Read the right SDVO register when detecting SVDO/HDMI.

2009-04-27T17:36:52Z

upstream commit: 13520b051e8888dd3af9bda639d83e7df76613d1 This fixes incorrect detection of the second SDVO/HDMI output on G4X, and extra boot time on pre-G4X. Signed-off-by: Kristian Høgsberg Signed-off-by: Eric Anholt Signed-off-by: Chris Wright

drm/i915: Change DCC tiling detection case to cover only mobile parts.

2009-04-27T17:36:52Z

upstream commit: 568d9a8f6d4bf81e0672c74573dc02981d31e3ea Later spec investigation has revealed that every 9xx mobile part has had this register in this format. Also, no non-mobile parts have been shown to have this register. So make all mobile use the same code, and all non-mobile use the hack 965 detection. Signed-off-by: Eric Anholt Signed-off-by: Chris Wright

drm/i915: fix 945 fence register writes for fence 8 and above.

2009-03-11T18:02:06Z

The last 8 fence registers sit at a different offset, so when we went to set fence number 8 in the lower offset, we instead set PGETBL_CTL, and the GPU got all sorts of angry at us. fd.o bug #20567. Easily reproducible by running glxgears and killing it about 6 times. Signed-off-by: Eric Anholt

drm/i915: Protect active fences on i915

2009-03-11T17:33:28Z

The i915 also uses the fence registers for GPU access to tiled buffers so we cannot reallocate one whilst it is on the active list. By performing a LRU scan of the fenced buffers we also avoid waiting the possibility of waiting on a pinned, or otherwise unusable, buffer. Signed-off-by: Chris Wilson Signed-off-by: Eric Anholt