<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/crypto/Makefile, branch v3.6</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/drivers/crypto/Makefile?h=v3.6</id>
<link rel='self' href='https://git.amat.us/linux/atom/drivers/crypto/Makefile?h=v3.6'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2012-07-11T03:08:28Z</updated>
<entry>
<title>crypto: atmel - add Atmel SHA1/SHA256 driver</title>
<updated>2012-07-11T03:08:28Z</updated>
<author>
<name>Nicolas Royer</name>
<email>nicolas@eukrea.com</email>
</author>
<published>2012-07-01T17:19:46Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=ebc82efa1cd64efba0f41455460411b852b5b89c'/>
<id>urn:sha1:ebc82efa1cd64efba0f41455460411b852b5b89c</id>
<content type='text'>
Signed-off-by: Nicolas Royer &lt;nicolas@eukrea.com&gt;
Acked-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
Acked-by: Eric Bénard &lt;eric@eukrea.com&gt;
Tested-by: Eric Bénard &lt;eric@eukrea.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: atmel - add Atmel DES/TDES driver</title>
<updated>2012-07-11T03:08:14Z</updated>
<author>
<name>Nicolas Royer</name>
<email>nicolas@eukrea.com</email>
</author>
<published>2012-07-01T17:19:45Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=13802005d8f2db244ec1f5d7f6923de8f7a463db'/>
<id>urn:sha1:13802005d8f2db244ec1f5d7f6923de8f7a463db</id>
<content type='text'>
Signed-off-by: Nicolas Royer &lt;nicolas@eukrea.com&gt;
Acked-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
Acked-by: Eric Bénard &lt;eric@eukrea.com&gt;
Tested-by: Eric Bénard &lt;eric@eukrea.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: atmel - add Atmel AES driver</title>
<updated>2012-07-11T03:07:40Z</updated>
<author>
<name>Nicolas Royer</name>
<email>nicolas@eukrea.com</email>
</author>
<published>2012-07-01T17:19:44Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=bd3c7b5c2aba0d806285700848f588ca482094d8'/>
<id>urn:sha1:bd3c7b5c2aba0d806285700848f588ca482094d8</id>
<content type='text'>
Signed-off-by: Nicolas Royer &lt;nicolas@eukrea.com&gt;
Acked-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
Acked-by: Eric Bénard &lt;eric@eukrea.com&gt;
Tested-by: Eric Bénard &lt;eric@eukrea.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: nx - move nx build to driver/crypto Makefile</title>
<updated>2012-06-27T06:42:00Z</updated>
<author>
<name>Seth Jennings</name>
<email>sjenning@linux.vnet.ibm.com</email>
</author>
<published>2012-06-13T18:22:42Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=95ead5d7ff824a01cb07921c9211a7e29437a929'/>
<id>urn:sha1:95ead5d7ff824a01cb07921c9211a7e29437a929</id>
<content type='text'>
When the nx driver was pulled, the Makefile that actually
builds it is arch/powerpc/Makefile. This is unnatural.

This patch moves the line that builds the nx driver from
arch/powerpc/Makefile to drivers/crypto/Makefile where it
belongs.

Signed-off-by: Seth Jennings &lt;sjenning@linux.vnet.ibm.com&gt;
Acked-by: Kent Yoder &lt;key@linux.vnet.ibm.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: bfin_crc - CRC hardware driver for BF60x family processors.</title>
<updated>2012-06-12T08:37:19Z</updated>
<author>
<name>Sonic Zhang</name>
<email>sonic.zhang@analog.com</email>
</author>
<published>2012-06-04T04:24:47Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=b8840098b70c11d70c29263e0765f103e6cbe55e'/>
<id>urn:sha1:b8840098b70c11d70c29263e0765f103e6cbe55e</id>
<content type='text'>
The CRC peripheral is a hardware block used to compute the CRC of the block
of data. This is based on a CRC32 engine which computes the CRC value of 32b
data words presented to it. For data words of &lt; 32b in size, this driver
pack 0 automatically into 32b data units. This driver implements the async
hash crypto framework API.

Signed-off-by: Sonic Zhang &lt;sonic.zhang@analog.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ux500 - Add driver for CRYP hardware</title>
<updated>2012-05-04T09:04:51Z</updated>
<author>
<name>Andreas Westin</name>
<email>andreas.westin@stericsson.com</email>
</author>
<published>2012-04-30T08:11:17Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=2789c08fffeae270820dda5d096634aecc810af5'/>
<id>urn:sha1:2789c08fffeae270820dda5d096634aecc810af5</id>
<content type='text'>
This adds a driver for the ST-Ericsson ux500 crypto hardware
module. It supports AES, DES and 3DES, the driver implements
support for AES-ECB,CBC and CTR.

Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Andreas Westin &lt;andreas.westin@stericsson.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: driver for Tegra AES hardware</title>
<updated>2012-01-13T05:38:37Z</updated>
<author>
<name>Varun Wadekar</name>
<email>vwadekar@nvidia.com</email>
</author>
<published>2012-01-13T05:38:37Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=f1df57d02a0f83e764b4dc9187f58665d70f190e'/>
<id>urn:sha1:f1df57d02a0f83e764b4dc9187f58665d70f190e</id>
<content type='text'>
driver supports ecb/cbc/ofb/ansi_x9.31rng modes,
128, 192 and 256-bit key sizes

Signed-off-by: Varun Wadekar &lt;vwadekar@nvidia.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: s5p-sss - add S5PV210 advanced crypto engine support</title>
<updated>2011-04-08T12:40:51Z</updated>
<author>
<name>Vladimir Zapolskiy</name>
<email>vzapolskiy@gmail.com</email>
</author>
<published>2011-04-08T12:40:51Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=a49e490c7a8a5c6c9474b1936ad8048f3e4440fc'/>
<id>urn:sha1:a49e490c7a8a5c6c9474b1936ad8048f3e4440fc</id>
<content type='text'>
This change adds support for AES encrypting and decrypting using
advanced crypto engine found on Samsung S5PV210 and S5PC110 SoCs.

Signed-off-by: Vladimir Zapolskiy &lt;vzapolskiy@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Add support for the Freescale SEC4/CAAM</title>
<updated>2011-03-27T02:45:16Z</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2011-03-13T08:54:26Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=8e8ec596e6c0144e2dd500a57ee23dde9684df46'/>
<id>urn:sha1:8e8ec596e6c0144e2dd500a57ee23dde9684df46</id>
<content type='text'>
The SEC4 supercedes the SEC2.x/3.x as Freescale's
Integrated Security Engine.  Its programming model is
incompatible with all prior versions of the SEC (talitos).

The SEC4 is also known as the Cryptographic Accelerator
and Assurance Module (CAAM); this driver is named caam.

This initial submission does not include support for Data Path
mode operation - AEAD descriptors are submitted via the job
ring interface, while the Queue Interface (QI) is enabled
for use by others.  Only AEAD algorithms are implemented
at this time, for use with IPsec.

Many thanks to the Freescale STC team for their contributions
to this driver.

Signed-off-by: Steve Cornelius &lt;sec@pobox.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: picoxcell - add support for the picoxcell crypto engines</title>
<updated>2011-02-21T11:42:40Z</updated>
<author>
<name>Jamie Iles</name>
<email>jamie@jamieiles.com</email>
</author>
<published>2011-02-21T05:43:21Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=ce92136843cb6e14aba5fd7bc4e88dbe71e70c5a'/>
<id>urn:sha1:ce92136843cb6e14aba5fd7bc4e88dbe71e70c5a</id>
<content type='text'>
Picochip picoXcell devices have two crypto engines, one targeted
at IPSEC offload and the other at WCDMA layer 2 ciphering.

Signed-off-by: Jamie Iles &lt;jamie@jamieiles.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
