<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/crypto/Makefile, branch v3.12.10</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/drivers/crypto/Makefile?h=v3.12.10</id>
<link rel='self' href='https://git.amat.us/linux/atom/drivers/crypto/Makefile?h=v3.12.10'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2013-05-28T07:43:03Z</updated>
<entry>
<title>crypto: dcp - Added support for Freescale's DCP co-processor</title>
<updated>2013-05-28T07:43:03Z</updated>
<author>
<name>Tobias Rauter</name>
<email>tobiasrauter@gmail.com</email>
</author>
<published>2013-05-19T19:59:38Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=519d8b1a9d81be7e4ffad8aa6b0e3ea03984bb86'/>
<id>urn:sha1:519d8b1a9d81be7e4ffad8aa6b0e3ea03984bb86</id>
<content type='text'>
This patch enables the DCP crypto functionality on imx28.
Currently, only aes-128-cbc is supported.
Moreover, the dcpboot misc-device, which is used by Freescale's
SDK tools and uses a non-software-readable OTP-key, is added.

Changes of v2:
- ring buffer for hardware-descriptors
- use of ablkcipher walk
- OTP key encryption/decryption via misc-device
  (compatible to Freescale-SDK)
- overall cleanup

The DCP is also capable of sha1/sha256 but I won't be able to add
that anytime soon.
Tested with built-in runtime-self-test, tcrypt and openssl via
cryptodev 1.6 on imx28-evk and a custom built imx28-board.

Signed-off-by: Tobias Rauter &lt;tobias.rauter@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: sahara - Add driver for SAHARA2 accelerator.</title>
<updated>2013-03-21T09:44:41Z</updated>
<author>
<name>Javier Martin</name>
<email>javier.martin@vista-silicon.com</email>
</author>
<published>2013-03-01T11:37:53Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=5de8875281e1db024d67cbd5c792264194bfca2a'/>
<id>urn:sha1:5de8875281e1db024d67cbd5c792264194bfca2a</id>
<content type='text'>
SAHARA2 HW module is included in the i.MX27 SoC from
Freescale. It is capable of performing cipher algorithms
such as AES, 3DES..., hashing and RNG too.

This driver provides support for AES-CBC and AES-ECB
by now.

Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Javier Martin &lt;javier.martin@vista-silicon.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: atmel - add Atmel SHA1/SHA256 driver</title>
<updated>2012-07-11T03:08:28Z</updated>
<author>
<name>Nicolas Royer</name>
<email>nicolas@eukrea.com</email>
</author>
<published>2012-07-01T17:19:46Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=ebc82efa1cd64efba0f41455460411b852b5b89c'/>
<id>urn:sha1:ebc82efa1cd64efba0f41455460411b852b5b89c</id>
<content type='text'>
Signed-off-by: Nicolas Royer &lt;nicolas@eukrea.com&gt;
Acked-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
Acked-by: Eric Bénard &lt;eric@eukrea.com&gt;
Tested-by: Eric Bénard &lt;eric@eukrea.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: atmel - add Atmel DES/TDES driver</title>
<updated>2012-07-11T03:08:14Z</updated>
<author>
<name>Nicolas Royer</name>
<email>nicolas@eukrea.com</email>
</author>
<published>2012-07-01T17:19:45Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=13802005d8f2db244ec1f5d7f6923de8f7a463db'/>
<id>urn:sha1:13802005d8f2db244ec1f5d7f6923de8f7a463db</id>
<content type='text'>
Signed-off-by: Nicolas Royer &lt;nicolas@eukrea.com&gt;
Acked-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
Acked-by: Eric Bénard &lt;eric@eukrea.com&gt;
Tested-by: Eric Bénard &lt;eric@eukrea.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: atmel - add Atmel AES driver</title>
<updated>2012-07-11T03:07:40Z</updated>
<author>
<name>Nicolas Royer</name>
<email>nicolas@eukrea.com</email>
</author>
<published>2012-07-01T17:19:44Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=bd3c7b5c2aba0d806285700848f588ca482094d8'/>
<id>urn:sha1:bd3c7b5c2aba0d806285700848f588ca482094d8</id>
<content type='text'>
Signed-off-by: Nicolas Royer &lt;nicolas@eukrea.com&gt;
Acked-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
Acked-by: Eric Bénard &lt;eric@eukrea.com&gt;
Tested-by: Eric Bénard &lt;eric@eukrea.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: nx - move nx build to driver/crypto Makefile</title>
<updated>2012-06-27T06:42:00Z</updated>
<author>
<name>Seth Jennings</name>
<email>sjenning@linux.vnet.ibm.com</email>
</author>
<published>2012-06-13T18:22:42Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=95ead5d7ff824a01cb07921c9211a7e29437a929'/>
<id>urn:sha1:95ead5d7ff824a01cb07921c9211a7e29437a929</id>
<content type='text'>
When the nx driver was pulled, the Makefile that actually
builds it is arch/powerpc/Makefile. This is unnatural.

This patch moves the line that builds the nx driver from
arch/powerpc/Makefile to drivers/crypto/Makefile where it
belongs.

Signed-off-by: Seth Jennings &lt;sjenning@linux.vnet.ibm.com&gt;
Acked-by: Kent Yoder &lt;key@linux.vnet.ibm.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: bfin_crc - CRC hardware driver for BF60x family processors.</title>
<updated>2012-06-12T08:37:19Z</updated>
<author>
<name>Sonic Zhang</name>
<email>sonic.zhang@analog.com</email>
</author>
<published>2012-06-04T04:24:47Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=b8840098b70c11d70c29263e0765f103e6cbe55e'/>
<id>urn:sha1:b8840098b70c11d70c29263e0765f103e6cbe55e</id>
<content type='text'>
The CRC peripheral is a hardware block used to compute the CRC of the block
of data. This is based on a CRC32 engine which computes the CRC value of 32b
data words presented to it. For data words of &lt; 32b in size, this driver
pack 0 automatically into 32b data units. This driver implements the async
hash crypto framework API.

Signed-off-by: Sonic Zhang &lt;sonic.zhang@analog.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ux500 - Add driver for CRYP hardware</title>
<updated>2012-05-04T09:04:51Z</updated>
<author>
<name>Andreas Westin</name>
<email>andreas.westin@stericsson.com</email>
</author>
<published>2012-04-30T08:11:17Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=2789c08fffeae270820dda5d096634aecc810af5'/>
<id>urn:sha1:2789c08fffeae270820dda5d096634aecc810af5</id>
<content type='text'>
This adds a driver for the ST-Ericsson ux500 crypto hardware
module. It supports AES, DES and 3DES, the driver implements
support for AES-ECB,CBC and CTR.

Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Andreas Westin &lt;andreas.westin@stericsson.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: driver for Tegra AES hardware</title>
<updated>2012-01-13T05:38:37Z</updated>
<author>
<name>Varun Wadekar</name>
<email>vwadekar@nvidia.com</email>
</author>
<published>2012-01-13T05:38:37Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=f1df57d02a0f83e764b4dc9187f58665d70f190e'/>
<id>urn:sha1:f1df57d02a0f83e764b4dc9187f58665d70f190e</id>
<content type='text'>
driver supports ecb/cbc/ofb/ansi_x9.31rng modes,
128, 192 and 256-bit key sizes

Signed-off-by: Varun Wadekar &lt;vwadekar@nvidia.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: s5p-sss - add S5PV210 advanced crypto engine support</title>
<updated>2011-04-08T12:40:51Z</updated>
<author>
<name>Vladimir Zapolskiy</name>
<email>vzapolskiy@gmail.com</email>
</author>
<published>2011-04-08T12:40:51Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=a49e490c7a8a5c6c9474b1936ad8048f3e4440fc'/>
<id>urn:sha1:a49e490c7a8a5c6c9474b1936ad8048f3e4440fc</id>
<content type='text'>
This change adds support for AES encrypting and decrypting using
advanced crypto engine found on Samsung S5PV210 and S5PC110 SoCs.

Signed-off-by: Vladimir Zapolskiy &lt;vzapolskiy@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
