<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/base/regmap, branch v3.2.38</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/drivers/base/regmap?h=v3.2.38</id>
<link rel='self' href='https://git.amat.us/linux/atom/drivers/base/regmap?h=v3.2.38'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2013-01-03T03:33:32Z</updated>
<entry>
<title>regmap: debugfs: Avoid overflows for very small reads</title>
<updated>2013-01-03T03:33:32Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2012-12-10T16:14:11Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=71f1e737a5ab8cc3c1384117222ef82c99bc056d'/>
<id>urn:sha1:71f1e737a5ab8cc3c1384117222ef82c99bc056d</id>
<content type='text'>
commit db04328c167ff8e7c57f4a3532214aeada3a82fd upstream.

If count is less than the size of a register then we may hit integer
wraparound when trying to move backwards to check if we're still in
the buffer. Instead move the position forwards to check if it's still
in the buffer, we are unlikely to be able to allocate a buffer
sufficiently big to overflow here.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
[bwh: Backported to 3.2: formatted length is tot_len]
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
</entry>
<entry>
<title>regmap: Fix cache defaults initialization from raw cache defaults</title>
<updated>2012-03-01T00:30:52Z</updated>
<author>
<name>Lars-Peter Clausen</name>
<email>lars@metafoo.de</email>
</author>
<published>2012-02-15T09:23:25Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=2a66303d51a096182e881319aef517e4847de32b'/>
<id>urn:sha1:2a66303d51a096182e881319aef517e4847de32b</id>
<content type='text'>
commit 61cddc57dc14a5dffa0921d9a24fd68edbb374ac upstream.

Currently registers with a value of 0 are ignored when initializing the register
defaults from raw defaults. This worked in the past, because registers without a
explicit default were assumed to have a default value of 0. This was changed in
commit b03622a8 ("regmap: Ensure rbtree syncs registers set to zero properly").
As a result registers, which have a raw default value of 0 are now assumed to
have no default. This again can result in unnecessary writes when syncing the
cache. It will also result in unnecessary reads for e.g. the first update
operation. In the case where readback is not possible this will even let the
update operation fail, if the register has not been written to before.

So this patch removes the check. Instead it adds a check to ignore raw defaults
for registers which are volatile, since those registers are not cached.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drivers/base: Add export.h for EXPORT_SYMBOL/THIS_MODULE as required.</title>
<updated>2011-10-31T23:31:38Z</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2011-05-27T11:12:15Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=1b6bc32f0a7380102499deb6aa99a59e789efb33'/>
<id>urn:sha1:1b6bc32f0a7380102499deb6aa99a59e789efb33</id>
<content type='text'>
Most of these files were implicitly getting EXPORT_SYMBOL via
device.h which was including module.h, but that path will be broken
soon.

[ with input from Stephen Rothwell &lt;sfr@canb.auug.org.au&gt; ]

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://opensource.wolfsonmicro.com/regmap</title>
<updated>2011-10-25T11:57:45Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2011-10-25T11:57:45Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=4e7e2a2008f5d8c49791c412849d5b0232d39bb3'/>
<id>urn:sha1:4e7e2a2008f5d8c49791c412849d5b0232d39bb3</id>
<content type='text'>
* 'for-linus' of git://opensource.wolfsonmicro.com/regmap: (62 commits)
  mfd: Enable rbtree cache for wm831x devices
  regmap: Support some block operations on cached devices
  regmap: Allow caches for devices with no defaults
  regmap: Ensure rbtree syncs registers set to zero properly
  regmap: Allow rbtree to cache zero default values
  regmap: Warn on raw I/O as well as bulk reads that bypass cache
  regmap: Return a sensible error code if we fail to read the cache
  regmap: Use bsearch() to search the register defaults
  regmap: Fix doc comment
  regmap: Optimize the lookup path to use binary search
  regmap: Ensure we scream if we enable cache bypass/only at the same time
  regmap: Implement regcache_cache_bypass helper function
  regmap: Save/restore the bypass state upon syncing
  regmap: Lock the sync path, ensure we use the lockless _regmap_write()
  regmap: Fix apostrophe usage
  regmap: Make _regmap_write() global
  regmap: Fix lock used for regcache_cache_only()
  regmap: Grab the lock in regcache_cache_only()
  regmap: Modify map-&gt;cache_bypass directly
  regmap: Fix regcache_sync generic implementation
  ...
</content>
</entry>
<entry>
<title>regmap: Support some block operations on cached devices</title>
<updated>2011-10-13T10:41:54Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2011-10-10T12:24:52Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=de2d808f4de091321978d05a85ef0819e8f3561a'/>
<id>urn:sha1:de2d808f4de091321978d05a85ef0819e8f3561a</id>
<content type='text'>
Support raw reads if all the registers being read are volatile, the cache
will have no impact for tem.

Support bulk reads either directly (if all the registers are volatile) or
by falling back to iterating over single register reads otherwise.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: Allow caches for devices with no defaults</title>
<updated>2011-10-10T10:55:32Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2011-10-09T12:13:58Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=8528bdd450d34687b380c0f87992d105bdf54ca3'/>
<id>urn:sha1:8528bdd450d34687b380c0f87992d105bdf54ca3</id>
<content type='text'>
We only really need the defaults in order to cut down the number of
registers we sync and to satisfy reads while the device is powered off
but not all devices are going to need to do that (always on devices like
PMICs being the prime example) so don't require those devices to supply
a default.  Instead only try to fall back to hardware defaults if the
driver told us to.

Devices using LZO won't be able to instantiate with this, that will require
some updates in the LZO code to handle this case.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
Acked-by: Dimitris Papastamos &lt;dp@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: Ensure rbtree syncs registers set to zero properly</title>
<updated>2011-10-10T09:26:48Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2011-10-09T11:54:25Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=b03622a80d2206c4179d6a41a0dc5cfbdfc853ee'/>
<id>urn:sha1:b03622a80d2206c4179d6a41a0dc5cfbdfc853ee</id>
<content type='text'>
Simplify the check for registers set at their default value by avoiding
picking a default value in the case where we don't have one. Instead we
only compare the current value to the current value when we looked one
up. This fixes the case where we don't have a default stored but the value
was set to zero when that isn't the chip default.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
Acked-by: Dimitris Papastamos &lt;dp@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: Allow rbtree to cache zero default values</title>
<updated>2011-10-10T09:25:00Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2011-10-09T13:30:02Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=e42c5a9a4230c38ceba0a890b30a2d0dd9314bff'/>
<id>urn:sha1:e42c5a9a4230c38ceba0a890b30a2d0dd9314bff</id>
<content type='text'>
Ensure that when we start up in cache only mode we can store defaults of
zero, otherwise if the hardware is unavailable we won't be able to read.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
Acked-by: Dimitris Papastamos &lt;dp@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: Warn on raw I/O as well as bulk reads that bypass cache</title>
<updated>2011-10-10T09:24:33Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2011-10-09T12:35:43Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=04e016adcae28b65ddc9e756947fa1526a51c0b5'/>
<id>urn:sha1:04e016adcae28b65ddc9e756947fa1526a51c0b5</id>
<content type='text'>
As with the bulk reads we really should be able to make these play
nicely with the cache but warn for now.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
Acked-by: Dimitris Papastamos &lt;dp@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: Return a sensible error code if we fail to read the cache</title>
<updated>2011-10-10T09:24:03Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2011-10-09T12:23:31Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=6e6ace00a045251bd172b9b9c2379857bbff3dc7'/>
<id>urn:sha1:6e6ace00a045251bd172b9b9c2379857bbff3dc7</id>
<content type='text'>
If a register isn't cached then let callers know that so they can fall
back or error handle appropriately.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
Acked-by: Dimitris Papastamos &lt;dp@opensource.wolfsonmicro.com&gt;
</content>
</entry>
</feed>
