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<title>linux/drivers/base/regmap/regcache.c, branch v3.15-rc7</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/drivers/base/regmap/regcache.c?h=v3.15-rc7</id>
<link rel='self' href='https://git.amat.us/linux/atom/drivers/base/regmap/regcache.c?h=v3.15-rc7'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2014-03-28T11:50:43Z</updated>
<entry>
<title>Merge remote-tracking branches 'regmap/topic/cache', 'regmap/topic/irq', 'regmap/topic/lock', 'regmap/topic/mmio', 'regmap/topic/nodev', 'regmap/topic/parse-val' and 'regmap/topic/patch' into regmap-next</title>
<updated>2014-03-28T11:50:43Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@linaro.org</email>
</author>
<published>2014-03-28T11:50:43Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=6012b1f3424c4dc36369697845a9ca699887b0c7'/>
<id>urn:sha1:6012b1f3424c4dc36369697845a9ca699887b0c7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>regmap: cache: Don't attempt to sync non-writeable registers</title>
<updated>2014-03-19T10:38:56Z</updated>
<author>
<name>Dylan Reid</name>
<email>dgreid@chromium.org</email>
</author>
<published>2014-03-18T20:45:09Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=83f8475ce99fa1c44b03059b6cc5dcaae69b4819'/>
<id>urn:sha1:83f8475ce99fa1c44b03059b6cc5dcaae69b4819</id>
<content type='text'>
In the regcache_default_sync, if a register isn't writeable, then
_regmap_write will return an error and the rest of the sync will be
aborted.  Avoid this by checking if a register is writeable before
trying to sync it.

Signed-off-by: Dylan Reid &lt;dgreid@chromium.org&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: cache: Step by stride in default sync</title>
<updated>2014-03-19T10:38:54Z</updated>
<author>
<name>Dylan Reid</name>
<email>dgreid@chromium.org</email>
</author>
<published>2014-03-18T20:45:08Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=756173285e87c792c6fa8eaaaf1217cfcf1416dd'/>
<id>urn:sha1:756173285e87c792c6fa8eaaaf1217cfcf1416dd</id>
<content type='text'>
The default sync operation was still assuming a stride of one, fix it
to respect the reg_stride set in the map.

Signed-off-by: Dylan Reid &lt;dgreid@chromium.org&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: Check stride of register patch as we register it</title>
<updated>2014-02-22T02:15:13Z</updated>
<author>
<name>Charles Keepax</name>
<email>ckeepax@opensource.wolfsonmicro.com</email>
</author>
<published>2014-02-21T19:37:10Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=7a7a70b49b51e90593ae072a9402d6615d05e895'/>
<id>urn:sha1:7a7a70b49b51e90593ae072a9402d6615d05e895</id>
<content type='text'>
Currently, we check the registers in the patch are aligned to the
register stride everytime we sync the cache and the first time the patch
is written out is unchecked.

This patch checks the register patch when we first register it so the
first writes are no longer unchecked and then doesn't check on
subsequent syncs as the patch will be unchanged.

Signed-off-by: Charles Keepax &lt;ckeepax@opensource.wolfsonmicro.com&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: cache: Handle stride &gt; 1 in sync_block_raw_flush</title>
<updated>2014-01-27T18:25:11Z</updated>
<author>
<name>Dylan Reid</name>
<email>dgreid@chromium.org</email>
</author>
<published>2014-01-24T23:40:39Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=78ba73eecd2256790926859849801c0446766c0a'/>
<id>urn:sha1:78ba73eecd2256790926859849801c0446766c0a</id>
<content type='text'>
regcache_sync_block_raw_flush takes the address of the base register
and the address of one past the last register to write to.  "count" is
the number of registers in the range, not the number of bytes, it
should be (end addr - start addr) / stride. Without accounting for
strides greater than one, registers past the end might be synced or
the writeable_reg callback at the beginning of _regmap_raw_write will
fail and nothing will be written.

Signed-off-by: Dylan Reid &lt;dgreid@chromium.org&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: Use async I/O during cache sync</title>
<updated>2013-10-10T20:15:23Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@linaro.org</email>
</author>
<published>2013-10-10T20:06:32Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=affbe886e712437c25b575eac5fde5886bb42aec'/>
<id>urn:sha1:affbe886e712437c25b575eac5fde5886bb42aec</id>
<content type='text'>
Try to speed up I/O a little by not synchronising until we are finished
scheduling writes. A brief survey of existing users suggests we have none
that would currently benefit from an async cache sync.

Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: Simplify the initiation of async I/O</title>
<updated>2013-10-09T13:05:24Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@linaro.org</email>
</author>
<published>2013-10-09T11:28:52Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=0a8198094da895c8d5db95812fe9de7027d808e4'/>
<id>urn:sha1:0a8198094da895c8d5db95812fe9de7027d808e4</id>
<content type='text'>
Rather than passing a flag around through the entire call stack store it
in the regmap struct and read it when required. This minimises the
visibility of the feature through the API, minimising the code updates
needed to use it more widely.

Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: rbtree: Make cache_present bitmap per node</title>
<updated>2013-08-29T12:32:41Z</updated>
<author>
<name>Lars-Peter Clausen</name>
<email>lars@metafoo.de</email>
</author>
<published>2013-08-29T08:26:34Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=3f4ff561bc88b074d5e868dde4012d89cbb06c87'/>
<id>urn:sha1:3f4ff561bc88b074d5e868dde4012d89cbb06c87</id>
<content type='text'>
With devices which have a dense and small register map but placed at a large
offset the global cache_present bitmap imposes a huge memory overhead. Making
the cache_present per rbtree node avoids the issue and easily reduces the memory
footprint by a factor of ten. For devices with a more sparse map or without a
large base register offset the memory usage might increase slightly by a few
bytes, but not significantly. E.g. for a device which has ~50 registers at
offset 0x4000 the memory footprint of the register cache goes down form 2496
bytes to 175 bytes.

Moving the bitmap to a per node basis means that the handling of the bitmap is
now cache implementation specific and can no longer be managed by the core. The
regcache_sync_block() function is extended by a additional parameter so that the
cache implementation can tell the core which registers in the block are set and
which are not. The parameter is optional and if NULL the core assumes that all
registers are set. The rbtree cache also needs to implement its own drop
callback instead of relying on the core to handle this.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'regmap/topic/cache' into regmap-rbtree</title>
<updated>2013-08-29T12:32:36Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@linaro.org</email>
</author>
<published>2013-08-29T12:32:36Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=65c180fd95993abc31c8770e014ebedade46b623'/>
<id>urn:sha1:65c180fd95993abc31c8770e014ebedade46b623</id>
<content type='text'>
</content>
</entry>
<entry>
<title>regmap: regcache: allow read-only regs to be cached</title>
<updated>2013-08-09T11:47:29Z</updated>
<author>
<name>Ionut Nicu</name>
<email>ioan.nicu.ext@nsn.com</email>
</author>
<published>2013-08-09T10:09:20Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=515f2261703d09c6b647a5687b7d657dd5911065'/>
<id>urn:sha1:515f2261703d09c6b647a5687b7d657dd5911065</id>
<content type='text'>
The regmap_writeable() check should not be done in
regcache_write() because this prevents read-only
registers to be cached. After a read on a read-only
register its value will not be stored in the cache
and the next time someone will try to read it the
value will be read from the bus instead of the
cache.

Instead the regmap_writeable() check should be done
in _regmap_write() to prevent callers from writing
to read-only registers.

Signed-off-by: Ionut Nicu &lt;ioan.nicu.ext@nsn.com&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
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