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<title>linux/drivers/base/regmap/regcache.c, branch v3.12.14</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/drivers/base/regmap/regcache.c?h=v3.12.14</id>
<link rel='self' href='https://git.amat.us/linux/atom/drivers/base/regmap/regcache.c?h=v3.12.14'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2013-08-29T12:32:41Z</updated>
<entry>
<title>regmap: rbtree: Make cache_present bitmap per node</title>
<updated>2013-08-29T12:32:41Z</updated>
<author>
<name>Lars-Peter Clausen</name>
<email>lars@metafoo.de</email>
</author>
<published>2013-08-29T08:26:34Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=3f4ff561bc88b074d5e868dde4012d89cbb06c87'/>
<id>urn:sha1:3f4ff561bc88b074d5e868dde4012d89cbb06c87</id>
<content type='text'>
With devices which have a dense and small register map but placed at a large
offset the global cache_present bitmap imposes a huge memory overhead. Making
the cache_present per rbtree node avoids the issue and easily reduces the memory
footprint by a factor of ten. For devices with a more sparse map or without a
large base register offset the memory usage might increase slightly by a few
bytes, but not significantly. E.g. for a device which has ~50 registers at
offset 0x4000 the memory footprint of the register cache goes down form 2496
bytes to 175 bytes.

Moving the bitmap to a per node basis means that the handling of the bitmap is
now cache implementation specific and can no longer be managed by the core. The
regcache_sync_block() function is extended by a additional parameter so that the
cache implementation can tell the core which registers in the block are set and
which are not. The parameter is optional and if NULL the core assumes that all
registers are set. The rbtree cache also needs to implement its own drop
callback instead of relying on the core to handle this.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'regmap/topic/cache' into regmap-rbtree</title>
<updated>2013-08-29T12:32:36Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@linaro.org</email>
</author>
<published>2013-08-29T12:32:36Z</published>
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<id>urn:sha1:65c180fd95993abc31c8770e014ebedade46b623</id>
<content type='text'>
</content>
</entry>
<entry>
<title>regmap: regcache: allow read-only regs to be cached</title>
<updated>2013-08-09T11:47:29Z</updated>
<author>
<name>Ionut Nicu</name>
<email>ioan.nicu.ext@nsn.com</email>
</author>
<published>2013-08-09T10:09:20Z</published>
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<id>urn:sha1:515f2261703d09c6b647a5687b7d657dd5911065</id>
<content type='text'>
The regmap_writeable() check should not be done in
regcache_write() because this prevents read-only
registers to be cached. After a read on a read-only
register its value will not be stored in the cache
and the next time someone will try to read it the
value will be read from the bus instead of the
cache.

Instead the regmap_writeable() check should be done
in _regmap_write() to prevent callers from writing
to read-only registers.

Signed-off-by: Ionut Nicu &lt;ioan.nicu.ext@nsn.com&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: cache: Make sure to sync the last register in a block</title>
<updated>2013-08-05T14:51:09Z</updated>
<author>
<name>Lars-Peter Clausen</name>
<email>lars@metafoo.de</email>
</author>
<published>2013-08-05T09:21:29Z</published>
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<id>urn:sha1:2d49b5987561e480bdbd8692b27fc5f49a1e2f0b</id>
<content type='text'>
regcache_sync_block_raw_flush() expects the address of the register after last
register that needs to be synced as its parameter. But the last call to
regcache_sync_block_raw_flush() in regcache_sync_block_raw() passes the address
of the last register in the block. This effectively always skips over the last
register in a block, even if it needs to be synced. In order to fix it increase
the address by one register.

The issue was introduced in commit 75a5f89 ("regmap: cache: Write consecutive
registers in a single block write").

Cc: stable@vger.kernel.org # 3.10+
Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: Implemented default cache sync operation</title>
<updated>2013-06-03T10:50:50Z</updated>
<author>
<name>Maarten ter Huurne</name>
<email>maarten@treewalker.org</email>
</author>
<published>2013-06-02T22:15:26Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d856fce41b74ecf2004d99f781e44abd7815d7f8'/>
<id>urn:sha1:d856fce41b74ecf2004d99f781e44abd7815d7f8</id>
<content type='text'>
This can be used for cache types for which syncing values one by one is
equally efficient as syncing a range, such as the flat cache.

Signed-off-by: Maarten ter Huurne &lt;maarten@treewalker.org&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: regcache: Fixup locking for custom lock callbacks</title>
<updated>2013-05-23T14:07:33Z</updated>
<author>
<name>Lars-Peter Clausen</name>
<email>lars@metafoo.de</email>
</author>
<published>2013-05-23T13:06:15Z</published>
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<id>urn:sha1:81485f5220770c381ac076573642ac44f13723af</id>
<content type='text'>
The parameter passed to the regmap lock/unlock callbacks needs to be
map-&gt;lock_arg, regcache passes just map. This works fine in the case that no
custom locking callbacks are used, since in this case map-&gt;lock_arg equals map,
but will break when custom locking callbacks are used. The issue was introduced
in commit 0d4529c5 ("regmap: make lock/unlock functions customizable") and is
fixed by this patch.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: Add support for discarding parts of the register cache</title>
<updated>2013-05-12T14:46:47Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2013-05-08T12:55:22Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=697e85bc6a9aa44ecd73392586fe9cfd7e0467ba'/>
<id>urn:sha1:697e85bc6a9aa44ecd73392586fe9cfd7e0467ba</id>
<content type='text'>
Allow drivers to discard parts of the register cache, for example if part
of the hardware has been reset.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: cache: Fix format specifier in dev_dbg</title>
<updated>2013-04-05T10:28:12Z</updated>
<author>
<name>Stratos Karafotis</name>
<email>stratosk@semaphore.gr</email>
</author>
<published>2013-04-04T16:40:45Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=9659293c1784f3d9df2235f6ebf92f6f9059a563'/>
<id>urn:sha1:9659293c1784f3d9df2235f6ebf92f6f9059a563</id>
<content type='text'>
Fix format specifier in dev_dbg and suppress the following warning

drivers/base/regmap/regcache.c: In function
‘regcache_sync_block_raw_flush’:
drivers/base/regmap/regcache.c:593:2: warning: format ‘%d’ expects
argument of type ‘int’, but argument 4 has type ‘size_t’ [-Wformat]

Signed-off-by: Stratos Karafotis &lt;stratosk@semaphore.gr&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: cache: Make regcache_sync_block_raw static</title>
<updated>2013-04-05T10:28:12Z</updated>
<author>
<name>Sachin Kamat</name>
<email>sachin.kamat@linaro.org</email>
</author>
<published>2013-04-04T09:06:18Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=f52687afb87cfb2d26699d7f84088c2b04adde50'/>
<id>urn:sha1:f52687afb87cfb2d26699d7f84088c2b04adde50</id>
<content type='text'>
regcache_sync_block_raw is used only in this file. Hence make it static.
Silences the following warning:
drivers/base/regmap/regcache.c:608:5: warning:
symbol 'regcache_sync_block_raw' was not declared. Should it be static?

Signed-off-by: Sachin Kamat &lt;sachin.kamat@linaro.org&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
</content>
</entry>
<entry>
<title>regmap: cache: Write consecutive registers in a single block write</title>
<updated>2013-03-30T13:52:36Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2013-03-29T20:50:07Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=75a5f89f635c2b7cd1f94fcaef5f764d480c8481'/>
<id>urn:sha1:75a5f89f635c2b7cd1f94fcaef5f764d480c8481</id>
<content type='text'>
When syncing blocks of data using raw writes combine the writes into a
single block write, saving us bus overhead for setup, addressing and
teardown.

Currently the block write is done unconditionally as it is expected that
hardware which has a register format which can support raw writes will
support auto incrementing writes, this decision may need to be revised in
future.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
Reviewed-by: Dimitris Papastamos &lt;dp@opensource.wolfsonmicro.com&gt;
</content>
</entry>
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