<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/crypto/Kconfig, branch v3.8</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/crypto/Kconfig?h=v3.8</id>
<link rel='self' href='https://git.amat.us/linux/atom/crypto/Kconfig?h=v3.8'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2012-12-06T09:16:26Z</updated>
<entry>
<title>crypto: cast5/cast6 - move lookup tables to shared module</title>
<updated>2012-12-06T09:16:26Z</updated>
<author>
<name>Jussi Kivilinna</name>
<email>jussi.kivilinna@mbnet.fi</email>
</author>
<published>2012-11-13T09:43:14Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=044ab5257806310a0150146df3b74b8adaa4ebcf'/>
<id>urn:sha1:044ab5257806310a0150146df3b74b8adaa4ebcf</id>
<content type='text'>
CAST5 and CAST6 both use same lookup tables, which can be moved shared module
'cast_common'.

Signed-off-by: Jussi Kivilinna &lt;jussi.kivilinna@mbnet.fi&gt;
Acked-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: camellia - add AES-NI/AVX/x86_64 assembler implementation of camellia cipher</title>
<updated>2012-11-09T09:32:32Z</updated>
<author>
<name>Jussi Kivilinna</name>
<email>jussi.kivilinna@mbnet.fi</email>
</author>
<published>2012-10-26T11:49:01Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d9b1d2e7e10d2e926775b1d3da39da0f51491e54'/>
<id>urn:sha1:d9b1d2e7e10d2e926775b1d3da39da0f51491e54</id>
<content type='text'>
This patch adds AES-NI/AVX/x86_64 assembler implementation of Camellia block
cipher. Implementation process data in sixteen block chunks, which are
byte-sliced and AES SubBytes is reused for Camellia s-box with help of pre-
and post-filtering.

Patch has been tested with tcrypt and automated filesystem tests.

tcrypt test results:

Intel Core i5-2450M:

camellia-aesni-avx vs camellia-asm-x86_64-2way:
128bit key:                                             (lrw:256bit)    (xts:256bit)
size    ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec
16B     0.98x   0.96x   0.99x   0.96x   0.96x   0.95x   0.95x   0.94x   0.97x   0.98x
64B     0.99x   0.98x   1.00x   0.98x   0.98x   0.99x   0.98x   0.93x   0.99x   0.98x
256B    2.28x   2.28x   1.01x   2.29x   2.25x   2.24x   1.96x   1.97x   1.91x   1.90x
1024B   2.57x   2.56x   1.00x   2.57x   2.51x   2.53x   2.19x   2.17x   2.19x   2.22x
8192B   2.49x   2.49x   1.00x   2.53x   2.48x   2.49x   2.17x   2.17x   2.22x   2.22x

256bit key:                                             (lrw:384bit)    (xts:512bit)
size    ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec
16B     0.97x   0.98x   0.99x   0.97x   0.97x   0.96x   0.97x   0.98x   0.98x   0.99x
64B     1.00x   1.00x   1.01x   0.99x   0.98x   0.99x   0.99x   0.99x   0.99x   0.99x
256B    2.37x   2.37x   1.01x   2.39x   2.35x   2.33x   2.10x   2.11x   1.99x   2.02x
1024B   2.58x   2.60x   1.00x   2.58x   2.56x   2.56x   2.28x   2.29x   2.28x   2.29x
8192B   2.50x   2.52x   1.00x   2.56x   2.51x   2.51x   2.24x   2.25x   2.26x   2.29x

Signed-off-by: Jussi Kivilinna &lt;jussi.kivilinna@mbnet.fi&gt;
Acked-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: crc32c - Optimize CRC32C calculation with PCLMULQDQ instruction</title>
<updated>2012-10-15T14:18:24Z</updated>
<author>
<name>Tim Chen</name>
<email>tim.c.chen@linux.intel.com</email>
</author>
<published>2012-09-27T22:44:22Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=6a8ce1ef3940e0cab5ff5f11e1cff5301f83fef6'/>
<id>urn:sha1:6a8ce1ef3940e0cab5ff5f11e1cff5301f83fef6</id>
<content type='text'>
This patch adds the crc_pcl function that calculates CRC32C checksum using the
PCLMULQDQ instruction on processors that support this feature. This will
provide speedup over using CRC32 instruction only.
The usage of PCLMULQDQ necessitate the invocation of kernel_fpu_begin and
kernel_fpu_end and incur some overhead.  So the new crc_pcl function is only
invoked for buffer size of 512 bytes or more.  Larger sized
buffers will expect to see greater speedup.  This feature is best used coupled
with eager_fpu which reduces the kernel_fpu_begin/end overhead.  For
buffer size of 1K the speedup is around 1.6x and for buffer size greater than
4K, the speedup is around 3x compared to original implementation in crc32c-intel
module. Test was performed on Sandy Bridge based platform with constant frequency
set for cpu.

A white paper detailing the algorithm can be found here:
http://download.intel.com/design/intarch/papers/323405.pdf

Signed-off-by: Tim Chen &lt;tim.c.chen@linux.intel.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>Merge branch 'modules-next' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux</title>
<updated>2012-10-14T20:39:34Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-10-14T20:39:34Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d25282d1c9b9bc4cda7f9d3c0205108e99aa7a9d'/>
<id>urn:sha1:d25282d1c9b9bc4cda7f9d3c0205108e99aa7a9d</id>
<content type='text'>
Pull module signing support from Rusty Russell:
 "module signing is the highlight, but it's an all-over David Howells frenzy..."

Hmm "Magrathea: Glacier signing key". Somebody has been reading too much HHGTTG.

* 'modules-next' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: (37 commits)
  X.509: Fix indefinite length element skip error handling
  X.509: Convert some printk calls to pr_devel
  asymmetric keys: fix printk format warning
  MODSIGN: Fix 32-bit overflow in X.509 certificate validity date checking
  MODSIGN: Make mrproper should remove generated files.
  MODSIGN: Use utf8 strings in signer's name in autogenerated X.509 certs
  MODSIGN: Use the same digest for the autogen key sig as for the module sig
  MODSIGN: Sign modules during the build process
  MODSIGN: Provide a script for generating a key ID from an X.509 cert
  MODSIGN: Implement module signature checking
  MODSIGN: Provide module signing public keys to the kernel
  MODSIGN: Automatically generate module signing keys if missing
  MODSIGN: Provide Kconfig options
  MODSIGN: Provide gitignore and make clean rules for extra files
  MODSIGN: Add FIPS policy
  module: signature checking hook
  X.509: Add a crypto key parser for binary (DER) X.509 certificates
  MPILIB: Provide a function to read raw data into an MPI
  X.509: Add an ASN.1 decoder
  X.509: Add simple ASN.1 grammar compiler
  ...
</content>
</entry>
<entry>
<title>KEYS: Implement asymmetric key type</title>
<updated>2012-10-08T03:20:12Z</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2012-09-13T14:17:21Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=964f3b3bf49eb84b5831121446a28b76de3fb23a'/>
<id>urn:sha1:964f3b3bf49eb84b5831121446a28b76de3fb23a</id>
<content type='text'>
Create a key type that can be used to represent an asymmetric key type for use
in appropriate cryptographic operations, such as encryption, decryption,
signature generation and signature verification.

The key type is "asymmetric" and can provide access to a variety of
cryptographic algorithms.

Possibly, this would be better as "public_key" - but that has the disadvantage
that "public key" is an overloaded term.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
Signed-off-by: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6</title>
<updated>2012-10-04T16:06:34Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-10-04T16:06:34Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d66e6737d454553e1e62109d8298ede5351178a4'/>
<id>urn:sha1:d66e6737d454553e1e62109d8298ede5351178a4</id>
<content type='text'>
Pull crypto update from Herbert Xu:
 - Optimised AES/SHA1 for ARM.
 - IPsec ESN support in talitos and caam.
 - x86_64/avx implementation of cast5/cast6.
 - Add/use multi-algorithm registration helpers where possible.
 - Added IBM Power7+ in-Nest support.
 - Misc fixes.

Fix up trivial conflicts in crypto/Kconfig due to the sparc64 crypto
config options being added next to the new ARM ones.

[ Side note: cut-and-paste duplicate help texts make those conflicts
  harder to read than necessary, thanks to git being smart about
  minimizing conflicts and maximizing the common parts... ]

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (71 commits)
  crypto: x86/glue_helper - fix storing of new IV in CBC encryption
  crypto: cast5/avx - fix storing of new IV in CBC encryption
  crypto: tcrypt - add missing tests for camellia and ghash
  crypto: testmgr - make test_aead also test 'dst != src' code paths
  crypto: testmgr - make test_skcipher also test 'dst != src' code paths
  crypto: testmgr - add test vectors for CTR mode IV increasement
  crypto: testmgr - add test vectors for partial ctr(cast5) and ctr(cast6)
  crypto: testmgr - allow non-multi page and multi page skcipher tests from same test template
  crypto: caam - increase TRNG clocks per sample
  crypto, tcrypt: remove local_bh_disable/enable() around local_irq_disable/enable()
  crypto: tegra-aes - fix error return code
  crypto: crypto4xx - fix error return code
  crypto: hifn_795x - fix error return code
  crypto: ux500 - fix error return code
  crypto: caam - fix error IDs for SEC v5.x RNG4
  hwrng: mxc-rnga - Access data via structure
  hwrng: mxc-rnga - Adapt clocks to new i.mx clock framework
  crypto: caam - add IPsec ESN support
  crypto: 842 - remove .cra_list initialization
  Revert "[CRYPTO] cast6: inline bloat--"
  ...
</content>
</entry>
<entry>
<title>crypto: Build SPARC DES algorithms on SPARC only.</title>
<updated>2012-10-03T03:03:14Z</updated>
<author>
<name>Dave Jones</name>
<email>davej@redhat.com</email>
</author>
<published>2012-10-02T21:13:20Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=97da37b35fc56ed7b2b1583208be0d1327ddcf30'/>
<id>urn:sha1:97da37b35fc56ed7b2b1583208be0d1327ddcf30</id>
<content type='text'>
Asking for this option on x86 seems a bit pointless.

Signed-off-by: Dave Jones &lt;davej@redhat.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>arm/crypto: Add optimized AES and SHA1 routines</title>
<updated>2012-09-06T20:17:02Z</updated>
<author>
<name>David McCullough</name>
<email>david_mccullough@mcafee.com</email>
</author>
<published>2012-09-06T20:17:02Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=f0be44f4fb1faee42635ca5ea06dc9c3e820a35d'/>
<id>urn:sha1:f0be44f4fb1faee42635ca5ea06dc9c3e820a35d</id>
<content type='text'>
Add assembler versions of AES and SHA1 for ARM platforms.  This has provided
up to a 50% improvement in IPsec/TCP throughout for tunnels using AES128/SHA1.

Platform   CPU SPeed    Endian   Before (bps)   After (bps)   Improvement

IXP425      533 MHz      big     11217042        15566294        ~38%
KS8695      166 MHz     little    3828549         5795373        ~51%

Signed-off-by: David McCullough &lt;ucdevel@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>sparc64: Add CAMELLIA driver making use of the new camellia opcodes.</title>
<updated>2012-08-29T03:51:24Z</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2012-08-28T19:05:54Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=81658ad0d92306ceb271994b90cd49ffde10eeda'/>
<id>urn:sha1:81658ad0d92306ceb271994b90cd49ffde10eeda</id>
<content type='text'>
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc64: Add DES driver making use of the new des opcodes.</title>
<updated>2012-08-26T05:37:23Z</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2012-08-26T05:37:23Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=c5aac2df6577636ef526d87ec6d92796a190b27f'/>
<id>urn:sha1:c5aac2df6577636ef526d87ec6d92796a190b27f</id>
<content type='text'>
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
</feed>
