<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch, branch v3.8.5</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch?h=v3.8.5</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch?h=v3.8.5'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2013-03-28T19:18:14Z</updated>
<entry>
<title>ARM: DMA-mapping: add missing GFP_DMA flag for atomic buffer allocation</title>
<updated>2013-03-28T19:18:14Z</updated>
<author>
<name>Marek Szyprowski</name>
<email>m.szyprowski@samsung.com</email>
</author>
<published>2013-02-26T06:46:24Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=36bd37a9716002fc074b55638ff9583c03cea7ad'/>
<id>urn:sha1:36bd37a9716002fc074b55638ff9583c03cea7ad</id>
<content type='text'>
commit 9d1400cf79afb49584b4873eb22cd5130cb341db upstream.

Atomic pool should always be allocated from DMA zone if such zone is
available in the system to avoid issues caused by limited dma mask of
any of the devices used for making an atomic allocation.

Reported-by: Krzysztof Halasa &lt;khc@pm.waw.pl&gt;
Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>x86-64: Fix the failure case in copy_user_handle_tail()</title>
<updated>2013-03-28T19:18:02Z</updated>
<author>
<name>CQ Tang</name>
<email>cq.tang@intel.com</email>
</author>
<published>2013-03-18T15:02:21Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=45bcdf4fabc7d4b972a0a7dddf742b15bba85382'/>
<id>urn:sha1:45bcdf4fabc7d4b972a0a7dddf742b15bba85382</id>
<content type='text'>
commit 66db3feb486c01349f767b98ebb10b0c3d2d021b upstream.

The increment of "to" in copy_user_handle_tail() will have incremented
before a failure has been noted.  This causes us to skip a byte in the
failure case.

Only do the increment when assured there is no failure.

Signed-off-by: CQ Tang &lt;cq.tang@intel.com&gt;
Link: http://lkml.kernel.org/r/20130318150221.8439.993.stgit@phlsvslse11.ph.intel.com
Signed-off-by: Mike Marciniszyn &lt;mike.marciniszyn@intel.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>ARM: tegra: fix register address of slink controller</title>
<updated>2013-03-28T19:17:48Z</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2013-03-22T18:35:06Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=28608858a1511b64575860e4efc007ebb9340a64'/>
<id>urn:sha1:28608858a1511b64575860e4efc007ebb9340a64</id>
<content type='text'>
commit 57471c8d3c22873f70813820e6b4d2d1fea9629d upstream.

Fix typo on register address of slink3 controller where register
address is wrongly set as 0x7000d480 but it is 0x7000d800.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>s390/mm: fix flush_tlb_kernel_range()</title>
<updated>2013-03-20T20:10:56Z</updated>
<author>
<name>Heiko Carstens</name>
<email>heiko.carstens@de.ibm.com</email>
</author>
<published>2013-03-04T13:14:11Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=38130595db91b30c5ff7965e393b3754077703f2'/>
<id>urn:sha1:38130595db91b30c5ff7965e393b3754077703f2</id>
<content type='text'>
commit f6a70a07079518280022286a1dceb797d12e1edf upstream.

Our flush_tlb_kernel_range() implementation calls __tlb_flush_mm() with
&amp;init_mm as argument. __tlb_flush_mm() however will only flush tlbs
for the passed in mm if its mm_cpumask is not empty.

For the init_mm however its mm_cpumask has never any bits set. Which in
turn means that our flush_tlb_kernel_range() implementation doesn't
work at all.

This can be easily verified with a vmalloc/vfree loop which allocates
a page, writes to it and then frees the page again. A crash will follow
almost instantly.

To fix this remove the cpumask_empty() check in __tlb_flush_mm() since
there shouldn't be too many mms with a zero mm_cpumask, besides the
init_mm of course.

Signed-off-by: Heiko Carstens &lt;heiko.carstens@de.ibm.com&gt;
Signed-off-by: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>s390: critical section cleanup vs. machine checks</title>
<updated>2013-03-20T20:10:56Z</updated>
<author>
<name>Martin Schwidefsky</name>
<email>schwidefsky@de.ibm.com</email>
</author>
<published>2013-02-28T15:28:41Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=49f3b963417563122962c47d359349a2e5b497a3'/>
<id>urn:sha1:49f3b963417563122962c47d359349a2e5b497a3</id>
<content type='text'>
commit 6551fbdfd8b85d1ab5822ac98abb4fb449bcfae0 upstream.

The current machine check code uses the registers stored by the machine
in the lowcore at __LC_GPREGS_SAVE_AREA as the registers of the interrupted
context. The registers 0-7 of a user process can get clobbered if a machine
checks interrupts the execution of a critical section in entry[64].S.

The reason is that the critical section cleanup code may need to modify
the PSW and the registers for the previous context to get to the end of a
critical section. If registers 0-7 have to be replaced the relevant copy
will be in the registers, which invalidates the copy in the lowcore. The
machine check handler needs to explicitly store registers 0-7 to the stack.

Signed-off-by: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>perf,x86: fix wrmsr_on_cpu() warning on suspend/resume</title>
<updated>2013-03-20T20:10:56Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2013-03-17T22:44:43Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=df4331e0e19abeb2630bbb0ad762dc95d1a1c0ec'/>
<id>urn:sha1:df4331e0e19abeb2630bbb0ad762dc95d1a1c0ec</id>
<content type='text'>
commit 2a6e06b2aed6995af401dcd4feb5e79a0c7ea554 upstream.

Commit 1d9d8639c063 ("perf,x86: fix kernel crash with PEBS/BTS after
suspend/resume") fixed a crash when doing PEBS performance profiling
after resuming, but in using init_debug_store_on_cpu() to restore the
DS_AREA mtrr it also resulted in a new WARN_ON() triggering.

init_debug_store_on_cpu() uses "wrmsr_on_cpu()", which in turn uses CPU
cross-calls to do the MSR update.  Which is not really valid at the
early resume stage, and the warning is quite reasonable.  Now, it all
happens to _work_, for the simple reason that smp_call_function_single()
ends up just doing the call directly on the CPU when the CPU number
matches, but we really should just do the wrmsr() directly instead.

This duplicates the wrmsr() logic, but hopefully we can just remove the
wrmsr_on_cpu() version eventually.

Reported-and-tested-by: Parag Warudkar &lt;parag.lkml@gmail.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>ARM: davinci: edma: fix dmaengine induced null pointer dereference on da830</title>
<updated>2013-03-20T20:10:55Z</updated>
<author>
<name>Matt Porter</name>
<email>mporter@ti.com</email>
</author>
<published>2013-03-05T15:58:22Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=2f9969215930e3273ed9dfc7db0ffbb5d495fbc0'/>
<id>urn:sha1:2f9969215930e3273ed9dfc7db0ffbb5d495fbc0</id>
<content type='text'>
commit 069552777a121eb39da29de4bc0383483dbe1f7e upstream.

This adds additional error checking to the private edma api implementation
to catch the case where the edma_alloc_slot() has an invalid controller
parameter. The edma dmaengine wrapper driver relies on this condition
being handled in order to avoid setting up a second edma dmaengine
instance on DA830.

Verfied using a DA850 with the second EDMA controller platform instance
removed to simulate a DA830 which only has a single EDMA controller.

Reported-by: Tomas Novotny &lt;tomas@novotny.cz&gt;
Signed-off-by: Matt Porter &lt;mporter@ti.com&gt;
Tested-by: Tomas Novotny &lt;tomas@novotny.cz&gt;
Signed-off-by: Sekhar Nori &lt;nsekhar@ti.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>powerpc: Rename USER_ESID_BITS* to ESID_BITS*</title>
<updated>2013-03-20T20:10:55Z</updated>
<author>
<name>Aneesh Kumar K.V</name>
<email>aneesh.kumar@linux.vnet.ibm.com</email>
</author>
<published>2013-03-13T03:34:55Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=0fab6a93766984b3cac6e2ca61ac86090663495b'/>
<id>urn:sha1:0fab6a93766984b3cac6e2ca61ac86090663495b</id>
<content type='text'>
commit af81d7878c641629f2693ae3fdaf74b4af14dfca upstream.

Now we use ESID_BITS of kernel address to build proto vsid. So rename
USER_ESIT_BITS to ESID_BITS

Acked-by: Paul Mackerras &lt;paulus@samba.org&gt;
Signed-off-by: Aneesh Kumar K.V &lt;aneesh.kumar@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>powerpc: Update kernel VSID range</title>
<updated>2013-03-20T20:10:55Z</updated>
<author>
<name>Aneesh Kumar K.V</name>
<email>aneesh.kumar@linux.vnet.ibm.com</email>
</author>
<published>2013-03-13T03:34:54Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=7684eb4f4596ca2b83932a7e9b76c5b125d7838e'/>
<id>urn:sha1:7684eb4f4596ca2b83932a7e9b76c5b125d7838e</id>
<content type='text'>
commit c60ac5693c47df32a2b4b18af97fca5635def015 upstream.

This patch change the kernel VSID range so that we limit VSID_BITS to 37.
This enables us to support 64TB with 65 bit VA (37+28). Without this patch
we have boot hangs on platforms that only support 65 bit VA.

With this patch we now have proto vsid generated as below:

We first generate a 37-bit "proto-VSID". Proto-VSIDs are generated
from mmu context id and effective segment id of the address.

For user processes max context id is limited to ((1ul &lt;&lt; 19) - 5)
for kernel space, we use the top 4 context ids to map address as below
0x7fffc -  [ 0xc000000000000000 - 0xc0003fffffffffff ]
0x7fffd -  [ 0xd000000000000000 - 0xd0003fffffffffff ]
0x7fffe -  [ 0xe000000000000000 - 0xe0003fffffffffff ]
0x7ffff -  [ 0xf000000000000000 - 0xf0003fffffffffff ]

Acked-by: Paul Mackerras &lt;paulus@samba.org&gt;
Signed-off-by: Aneesh Kumar K.V &lt;aneesh.kumar@linux.vnet.ibm.com&gt;
Tested-by: Geoff Levand &lt;geoff@infradead.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>powerpc: Make VSID_BITS* dependency explicit</title>
<updated>2013-03-20T20:10:55Z</updated>
<author>
<name>Aneesh Kumar K.V</name>
<email>aneesh.kumar@linux.vnet.ibm.com</email>
</author>
<published>2013-03-13T03:34:53Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=ce1cd9571a1cbdd1367128843116589dfa4c8f87'/>
<id>urn:sha1:ce1cd9571a1cbdd1367128843116589dfa4c8f87</id>
<content type='text'>
commit e39d1a471484662620651cd9520250d33843f235 upstream.

VSID_BITS and VSID_BITS_1T depends on the context bits  and user esid
bits. Make the dependency explicit

Acked-by: Paul Mackerras &lt;paulus@samba.org&gt;
Signed-off-by: Aneesh Kumar K.V &lt;aneesh.kumar@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
</feed>
