<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch, branch v3.4.80</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch?h=v3.4.80</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch?h=v3.4.80'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2014-02-06T19:05:48Z</updated>
<entry>
<title>powerpc: Make sure "cache" directory is removed when offlining cpu</title>
<updated>2014-02-06T19:05:48Z</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@samba.org</email>
</author>
<published>2014-01-18T10:14:47Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=988e453293f02271214645c7887638124095aa88'/>
<id>urn:sha1:988e453293f02271214645c7887638124095aa88</id>
<content type='text'>
commit 91b973f90c1220d71923e7efe1e61f5329806380 upstream.

The code in remove_cache_dir() is supposed to remove the "cache"
subdirectory from the sysfs directory for a CPU when that CPU is
being offlined.  It tries to do this by calling kobject_put() on
the kobject for the subdirectory.  However, the subdirectory only
gets removed once the last reference goes away, and the reference
being put here may well not be the last reference.  That means
that the "cache" subdirectory may still exist when the offlining
operation has finished.  If the same CPU subsequently gets onlined,
the code tries to add a new "cache" subdirectory.  If the old
subdirectory has not yet been removed, we get a WARN_ON in the
sysfs code, with stack trace, and an error message printed on the
console.  Further, we ultimately end up with an online cpu with no
"cache" subdirectory.

This fixes it by doing an explicit kobject_del() at the point where
we want the subdirectory to go away.  kobject_del() removes the sysfs
directory even though the object still exists in memory.  The object
will get freed at some point in the future.  A subsequent onlining
operation can create a new sysfs directory, even if the old object
still exists in memory, without causing any problems.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>KVM: x86: Fix potential divide by 0 in lapic (CVE-2013-6367)</title>
<updated>2014-02-06T19:05:48Z</updated>
<author>
<name>Andy Honig</name>
<email>ahonig@google.com</email>
</author>
<published>2013-11-19T22:12:18Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=cd1e02030a6f006234061a306454c4e3e4d4701a'/>
<id>urn:sha1:cd1e02030a6f006234061a306454c4e3e4d4701a</id>
<content type='text'>
commit b963a22e6d1a266a67e9eecc88134713fd54775c upstream.

Under guest controllable circumstances apic_get_tmcct will execute a
divide by zero and cause a crash.  If the guest cpuid support
tsc deadline timers and performs the following sequence of requests
the host will crash.
- Set the mode to periodic
- Set the TMICT to 0
- Set the mode bits to 11 (neither periodic, nor one shot, nor tsc deadline)
- Set the TMICT to non-zero.
Then the lapic_timer.period will be 0, but the TMICT will not be.  If the
guest then reads from the TMCCT then the host will perform a divide by 0.

This patch ensures that if the lapic_timer.period is 0, then the division
does not occur.

Reported-by: Andrew Honig &lt;ahonig@google.com&gt;
Signed-off-by: Andrew Honig &lt;ahonig@google.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
[bwh: Backported to 3.2: s/kvm_apic_get_reg/apic_get_reg/]
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
Cc: Vinson Lee &lt;vlee@twopensource.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>ARM: at91: smc: bug fix in sam9_smc_cs_read()</title>
<updated>2014-02-06T19:05:47Z</updated>
<author>
<name>Jean-Jacques Hiblot</name>
<email>jjhiblot@traphandler.com</email>
</author>
<published>2014-01-09T15:01:54Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=fbc32582959394e3932b9eb1688d6991c9a42ea2'/>
<id>urn:sha1:fbc32582959394e3932b9eb1688d6991c9a42ea2</id>
<content type='text'>
commit 1588c51cf6d782e63a8719681d905ef0ac22ee62 upstream.

There was a copy/paste error when reading the nwe_pulse value.

Signed-off-by: Jean-Jacques Hiblot &lt;jjhiblot@traphandler.com&gt;
Acked-by: Boris BREZILLON &lt;b.brezillon@overkiz.com&gt;
Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
Signed-off-by: Kevin Hilman &lt;khilman@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>perf/x86/amd/ibs: Fix waking up from S3 for AMD family 10h</title>
<updated>2014-01-29T13:10:42Z</updated>
<author>
<name>Robert Richter</name>
<email>rric@kernel.org</email>
</author>
<published>2014-01-15T14:57:29Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=7e99f2168460c70d96241da3e8ff749f05416222'/>
<id>urn:sha1:7e99f2168460c70d96241da3e8ff749f05416222</id>
<content type='text'>
commit bee09ed91cacdbffdbcd3b05de8409c77ec9fcd6 upstream.

On AMD family 10h we see following error messages while waking up from
S3 for all non-boot CPUs leading to a failed IBS initialization:

 Enabling non-boot CPUs ...
 smpboot: Booting Node 0 Processor 1 APIC 0x1
 [Firmware Bug]: cpu 1, try to use APIC500 (LVT offset 0) for vector 0x400, but the register is already in use for vector 0xf9 on another cpu
 perf: IBS APIC setup failed on cpu #1
 process: Switch to broadcast mode on CPU1
 CPU1 is up
 ...
 ACPI: Waking up from system sleep state S3

Reason for this is that during suspend the LVT offset for the IBS
vector gets lost and needs to be reinialized while resuming.

The offset is read from the IBSCTL msr. On family 10h the offset needs
to be 1 as offset 0 is used for the MCE threshold interrupt, but
firmware assings it for IBS to 0 too. The kernel needs to reprogram
the vector. The msr is a readonly node msr, but a new value can be
written via pci config space access. The reinitialization is
implemented for family 10h in setup_ibs_ctl() which is forced during
IBS setup.

This patch fixes IBS setup after waking up from S3 by adding
resume/supend hooks for the boot cpu which does the offset
reinitialization.

Marking it as stable to let distros pick up this fix.

Signed-off-by: Robert Richter &lt;rric@kernel.org&gt;
Signed-off-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Link: http://lkml.kernel.org/r/1389797849-5565-1-git-send-email-rric.net@gmail.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>KVM: x86: Convert vapic synchronization to _cached functions (CVE-2013-6368)</title>
<updated>2014-01-29T13:10:42Z</updated>
<author>
<name>Andy Honig</name>
<email>ahonig@google.com</email>
</author>
<published>2013-11-20T18:23:22Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=777f8f3bcde8dc29bac9ab7e4e94dd84887ba50d'/>
<id>urn:sha1:777f8f3bcde8dc29bac9ab7e4e94dd84887ba50d</id>
<content type='text'>
commit fda4e2e85589191b123d31cdc21fd33ee70f50fd upstream.

In kvm_lapic_sync_from_vapic and kvm_lapic_sync_to_vapic there is the
potential to corrupt kernel memory if userspace provides an address that
is at the end of a page.  This patches concerts those functions to use
kvm_write_guest_cached and kvm_read_guest_cached.  It also checks the
vapic_address specified by userspace during ioctl processing and returns
an error to userspace if the address is not a valid GPA.

This is generally not guest triggerable, because the required write is
done by firmware that runs before the guest.  Also, it only affects AMD
processors and oldish Intel that do not have the FlexPriority feature
(unless you disable FlexPriority, of course; then newer processors are
also affected).

Fixes: b93463aa59d6 ('KVM: Accelerated apic support')

Reported-by: Andrew Honig &lt;ahonig@google.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Andrew Honig &lt;ahonig@google.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
[ lizf: backported to 3.4: based on Paolo's backport hints for &lt;3.10 ]
Signed-off-by: Li Zefan &lt;lizefan@huawei.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>x86, fpu, amd: Clear exceptions in AMD FXSAVE workaround</title>
<updated>2014-01-15T23:27:11Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-01-12T03:15:52Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=a63f31f1f2cdb459b121f644ccbd07ae84f45d4e'/>
<id>urn:sha1:a63f31f1f2cdb459b121f644ccbd07ae84f45d4e</id>
<content type='text'>
commit 26bef1318adc1b3a530ecc807ef99346db2aa8b0 upstream.

Before we do an EMMS in the AMD FXSAVE information leak workaround we
need to clear any pending exceptions, otherwise we trap with a
floating-point exception inside this code.

Reported-by: halfdog &lt;me@halfdog.net&gt;
Tested-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: http://lkml.kernel.org/r/CA%2B55aFxQnY_PCG_n4=0w-VG=YLXL-yr7oMxyy0WU2gCBAf3ydg@mail.gmail.com
Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>ARM: shmobile: mackerel: Fix coherent DMA mask</title>
<updated>2014-01-15T23:27:11Z</updated>
<author>
<name>Laurent Pinchart</name>
<email>laurent.pinchart+renesas@ideasonboard.com</email>
</author>
<published>2013-12-16T18:16:09Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=925ece07657be96df688f010dbfec851a0306341'/>
<id>urn:sha1:925ece07657be96df688f010dbfec851a0306341</id>
<content type='text'>
commit b6328a6b7ba57fc84c38248f6f0e387e1170f1a8 upstream.

Commit 4dcfa60071b3d23f0181f27d8519f12e37cefbb9 ("ARM: DMA-API: better
handing of DMA masks for coherent allocations") added an additional
check to the coherent DMA mask that results in an error when the mask is
larger than what dma_addr_t can address.

Set the LCDC coherent DMA mask to DMA_BIT_MASK(32) instead of ~0 to fix
the problem.

Signed-off-by: Laurent Pinchart &lt;laurent.pinchart+renesas@ideasonboard.com&gt;
Signed-off-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>ARM: fix "bad mode in ... handler" message for undefined instructions</title>
<updated>2014-01-15T23:27:11Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-01-03T15:01:39Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=10252aa2278e1d53c420bacdf9ee239784712541'/>
<id>urn:sha1:10252aa2278e1d53c420bacdf9ee239784712541</id>
<content type='text'>
commit 29c350bf28da333e41e30497b649fe335712a2ab upstream.

The array was missing the final entry for the undefined instruction
exception handler; this commit adds it.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>sh: always link in helper functions extracted from libgcc</title>
<updated>2014-01-08T17:42:12Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert@linux-m68k.org</email>
</author>
<published>2013-12-19T01:08:48Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=7a12bcd95b59dcf1a715827846baa7c81d1946f9'/>
<id>urn:sha1:7a12bcd95b59dcf1a715827846baa7c81d1946f9</id>
<content type='text'>
commit 84ed8a99058e61567f495cc43118344261641c5f upstream.

E.g. landisk_defconfig, which has CONFIG_NTFS_FS=m:

  ERROR: "__ashrdi3" [fs/ntfs/ntfs.ko] undefined!

For "lib-y", if no symbols in a compilation unit are referenced by other
units, the compilation unit will not be included in vmlinux.  This
breaks modules that do reference those symbols.

Use "obj-y" instead to fix this.

http://kisskb.ellerman.id.au/kisskb/buildresult/8838077/

This doesn't fix all cases. There are others, e.g. udivsi3.
This is also not limited to sh, many architectures handle this in the
same way.

A simple solution is to unconditionally include all helper functions.
A more complex solution is to make the choice of "lib-y" or "obj-y" depend
on CONFIG_MODULES:

  obj-$(CONFIG_MODULES) += ...
  lib-y($CONFIG_MODULES) += ...

Signed-off-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: Paul Mundt &lt;lethal@linux-sh.org&gt;
Tested-by: Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;
Reviewed-by: Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>powerpc: Align p_end</title>
<updated>2014-01-08T17:42:11Z</updated>
<author>
<name>Anton Blanchard</name>
<email>anton@samba.org</email>
</author>
<published>2013-12-23T01:19:51Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=70a9450d1b854b02a0e7d19c6b18f48ed9d7b4db'/>
<id>urn:sha1:70a9450d1b854b02a0e7d19c6b18f48ed9d7b4db</id>
<content type='text'>
commit 286e4f90a72c0b0621dde0294af6ed4b0baddabb upstream.

p_end is an 8 byte value embedded in the text section. This means it
is only 4 byte aligned when it should be 8 byte aligned. Fix this
by adding an explicit alignment.

This fixes an issue where POWER7 little endian builds with
CONFIG_RELOCATABLE=y fail to boot.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
</feed>
