<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch, branch v3.2.2</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch?h=v3.2.2</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch?h=v3.2.2'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2012-01-26T00:13:56Z</updated>
<entry>
<title>score: fix off-by-one index into syscall table</title>
<updated>2012-01-26T00:13:56Z</updated>
<author>
<name>Dan Rosenberg</name>
<email>drosenberg@vsecurity.com</email>
</author>
<published>2012-01-20T22:34:27Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=5f4972712d070a70b2ac50c7f75a6b2dac1be74b'/>
<id>urn:sha1:5f4972712d070a70b2ac50c7f75a6b2dac1be74b</id>
<content type='text'>
commit c25a785d6647984505fa165b5cd84cfc9a95970b upstream.

If the provided system call number is equal to __NR_syscalls, the
current check will pass and a function pointer just after the system
call table may be called, since sys_call_table is an array with total
size __NR_syscalls.

Whether or not this is a security bug depends on what the compiler puts
immediately after the system call table.  It's likely that this won't do
anything bad because there is an additional NULL check on the syscall
entry, but if there happens to be a non-NULL value immediately after the
system call table, this may result in local privilege escalation.

Signed-off-by: Dan Rosenberg &lt;drosenberg@vsecurity.com&gt;
Cc: Chen Liqin &lt;liqin.chen@sunplusct.com&gt;
Cc: Lennox Wu &lt;lennox.wu@gmail.com&gt;
Cc: Eugene Teo &lt;eugeneteo@kernel.sg&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86/UV2: Work around BAU bug</title>
<updated>2012-01-26T00:13:53Z</updated>
<author>
<name>Cliff Wickman</name>
<email>cpw@sgi.com</email>
</author>
<published>2012-01-16T21:19:47Z</published>
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<id>urn:sha1:ebd11e15ac4b85124de9f41c335bd3b00661e49d</id>
<content type='text'>
commit c5d35d399e685acccc85a675e8765c26b2a9813a upstream.

This patch implements a workaround for a UV2 hardware bug.
The bug is a non-atomic update of a memory-mapped register. When
hardware message delivery and software message acknowledge occur
simultaneously the pending message acknowledge for the arriving
message may be lost.  This causes the sender's message status to
stay busy.

Part of the workaround is to not acknowledge a completed message
until it is verified that no other message is actually using the
resource that is mistakenly recorded in the completed message.

Part of the workaround is to test for long elapsed time in such
a busy condition, then handle it by using a spare sending
descriptor. The stay-busy condition is eventually timed out by
hardware, and then the original sending descriptor can be
re-used. Most of that logic change is in keeping track of the
current descriptor and the state of the spares.

The occurrences of the workaround are added to the BAU
statistics.

Signed-off-by: Cliff Wickman &lt;cpw@sgi.com&gt;
Link: http://lkml.kernel.org/r/20120116211947.GC5767@sgi.com
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86/UV2: Fix BAU destination timeout initialization</title>
<updated>2012-01-26T00:13:53Z</updated>
<author>
<name>Cliff Wickman</name>
<email>cpw@sgi.com</email>
</author>
<published>2012-01-16T21:18:48Z</published>
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<id>urn:sha1:5869dc3cc783cea391d787832f2b925e5c5159c0</id>
<content type='text'>
commit d059f9fa84a30e04279c6ff615e9e2cf3b260191 upstream.

Move the call to enable_timeouts() forward so that
BAU_MISC_CONTROL is initialized before using it in
calculate_destination_timeout().

Fix the calculation of a BAU destination timeout
for UV2 (in calculate_destination_timeout()).

Signed-off-by: Cliff Wickman &lt;cpw@sgi.com&gt;
Link: http://lkml.kernel.org/r/20120116211848.GB5767@sgi.com
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86/UV2: Fix new UV2 hardware by using native UV2 broadcast mode</title>
<updated>2012-01-26T00:13:53Z</updated>
<author>
<name>Cliff Wickman</name>
<email>cpw@sgi.com</email>
</author>
<published>2012-01-16T21:17:50Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=40434094065aaa6ec566725be43f0da70ab56172'/>
<id>urn:sha1:40434094065aaa6ec566725be43f0da70ab56172</id>
<content type='text'>
commit da87c937e5a2374686edd58df06cfd5050b125fa upstream.

Update the use of the Broadcast Assist Unit on SGI Altix UV2 to
the use of native UV2 mode on new hardware (not the legacy mode).

UV2 native mode has a different format for a broadcast message.
We also need quick differentiaton between UV1 and UV2.

Signed-off-by: Cliff Wickman &lt;cpw@sgi.com&gt;
Link: http://lkml.kernel.org/r/20120116211750.GA5767@sgi.com
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>ACPI, ia64: Use SRAT table rev to use 8bit or 16/32bit PXM fields (ia64)</title>
<updated>2012-01-26T00:13:47Z</updated>
<author>
<name>Kurt Garloff</name>
<email>kurt@garloff.de</email>
</author>
<published>2012-01-17T09:21:49Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=a591555d5dad4b3ab47ced3f775dce73e8ce00e6'/>
<id>urn:sha1:a591555d5dad4b3ab47ced3f775dce73e8ce00e6</id>
<content type='text'>
commit 9f10f6a520deb3639fac78d81151a3ade88b4e7f upstream.

In SRAT v1, we had 8bit proximity domain (PXM) fields; SRAT v2 provides
32bits for these. The new fields were reserved before.
According to the ACPI spec, the OS must disregrard reserved fields.

ia64 did handle the PXM fields almost consistently, but depending on
sgi's sn2 platform. This patch leaves the sn2 logic in, but does also
use 16/32 bits for PXM if the SRAT has rev 2 or higher.

The patch also adds __init to the two pxm accessor functions, as they
access __initdata now and are called from an __init function only anyway.

Note that the code only uses 16 bits for the PXM field in the processor
proximity field; the patch does not address this as 16 bits are more than
enough.

Signed-off-by: Kurt Garloff &lt;kurt@garloff.de&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>ACPI, x86: Use SRAT table rev to use 8bit or 32bit PXM fields (x86/x86-64)</title>
<updated>2012-01-26T00:13:47Z</updated>
<author>
<name>Kurt Garloff</name>
<email>kurt@garloff.de</email>
</author>
<published>2012-01-17T09:20:31Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=f318322990f13f251a650209f541546faec03a19'/>
<id>urn:sha1:f318322990f13f251a650209f541546faec03a19</id>
<content type='text'>
commit cd298f60a2451a16e0f077404bf69b62ec868733 upstream.

In SRAT v1, we had 8bit proximity domain (PXM) fields; SRAT v2 provides
32bits for these. The new fields were reserved before.
According to the ACPI spec, the OS must disregrard reserved fields.

x86/x86-64 was rather inconsistent prior to this patch; it used 8 bits
for the pxm field in cpu_affinity, but 32 bits in mem_affinity.
This patch makes it consistent: Either use 8 bits consistently (SRAT
rev 1 or lower) or 32 bits (SRAT rev 2 or higher).

cc: x86@kernel.org
Signed-off-by: Kurt Garloff &lt;kurt@garloff.de&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86, UV: Update Boot messages for SGI UV2 platform</title>
<updated>2012-01-26T00:13:33Z</updated>
<author>
<name>Jack Steiner</name>
<email>steiner@sgi.com</email>
</author>
<published>2012-01-06T19:19:00Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=4f62b2e5111695e3aae8970a5d467d2e34eb481b'/>
<id>urn:sha1:4f62b2e5111695e3aae8970a5d467d2e34eb481b</id>
<content type='text'>
commit da517a08ac5913cd80ce3507cddd00f2a091b13c upstream.

SGI UV systems print a message during boot:

	UV: Found &lt;num&gt; blades

Due to packaging changes, the blade count is not accurate for
on the next generation of the platform. This patch corrects the
count.

Signed-off-by: Jack Steiner &lt;steiner@sgi.com&gt;
Link: http://lkml.kernel.org/r/20120106191900.GA19772@sgi.com
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86: Fix mmap random address range</title>
<updated>2012-01-26T00:13:24Z</updated>
<author>
<name>Ludwig Nussel</name>
<email>ludwig.nussel@suse.de</email>
</author>
<published>2011-11-15T22:46:46Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=5b781fb93a30489403b4237fb68492953aa170b0'/>
<id>urn:sha1:5b781fb93a30489403b4237fb68492953aa170b0</id>
<content type='text'>
commit 9af0c7a6fa860698d080481f24a342ba74b68982 upstream.

On x86_32 casting the unsigned int result of get_random_int() to
long may result in a negative value.  On x86_32 the range of
mmap_rnd() therefore was -255 to 255.  The 32bit mode on x86_64
used 0 to 255 as intended.

The bug was introduced by 675a081 ("x86: unify mmap_{32|64}.c")
in January 2008.

Signed-off-by: Ludwig Nussel &lt;ludwig.nussel@suse.de&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: harvey.harrison@gmail.com
Cc: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Cc: Harvey Harrison &lt;harvey.harrison@gmail.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Link: http://lkml.kernel.org/r/201111152246.pAFMklOB028527@wpaz5.hot.corp.google.com
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86/PCI: build amd_bus.o only when CONFIG_AMD_NB=y</title>
<updated>2012-01-26T00:13:18Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2012-01-12T15:01:40Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=8caedf258f365a5dd81af920fcef8be798305a74'/>
<id>urn:sha1:8caedf258f365a5dd81af920fcef8be798305a74</id>
<content type='text'>
commit 5cf9a4e69c1ff0ccdd1d2b7404f95c0531355274 upstream.

We only need amd_bus.o for AMD systems with PCI.  arch/x86/pci/Makefile
already depends on CONFIG_PCI=y, so this patch just adds the dependency
on CONFIG_AMD_NB.

Cc: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86/PCI: amd: factor out MMCONFIG discovery</title>
<updated>2012-01-26T00:13:18Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2012-01-05T21:27:19Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=dc106336ae990903ef9c1ccc459b719166ec504e'/>
<id>urn:sha1:dc106336ae990903ef9c1ccc459b719166ec504e</id>
<content type='text'>
commit 24d25dbfa63c376323096660bfa9ad45a08870ce upstream.

This factors out the AMD native MMCONFIG discovery so we can use it
outside amd_bus.c.

amd_bus.c reads AMD MSRs so it can remove the MMCONFIG area from the
PCI resources.  We may also need the MMCONFIG information to work
around BIOS defects in the ACPI MCFG table.

Cc: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Cc: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
</feed>
